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authorGabor Juhos <juhosg@openwrt.org>2009-08-02 13:27:43 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-08-02 13:27:43 +0000
commit116576b3ba468e0823179656a679e4a325b1b5da (patch)
tree69d007b860cf6d0c79c7d3a14a0e94664bb70f58 /target/linux/ar71xx
parentcf176f82dbb0914ae3b7a9e64aa28ba116f9d385 (diff)
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fix MISC IRQ handling on the AR7240
SVN-Revision: 17098
Diffstat (limited to 'target/linux/ar71xx')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/irq.c23
1 files changed, 9 insertions, 14 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
index 0f7190ade9..6dcd9870f9 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
@@ -297,37 +297,30 @@ static void ar71xx_misc_irq_unmask(unsigned int irq)
ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
}
-static void ar724x_misc_irq_unmask(unsigned int irq)
+static void ar71xx_misc_irq_mask(unsigned int irq)
{
irq -= AR71XX_MISC_IRQ_BASE;
ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE,
- ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) | (1 << irq));
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) & ~(1 << irq));
/* flush write */
ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
-
- ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS,
- ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) & ~(1 << irq));
-
- /* flush write */
- ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS);
}
-static void ar71xx_misc_irq_mask(unsigned int irq)
+static void ar724x_misc_irq_ack(unsigned int irq)
{
irq -= AR71XX_MISC_IRQ_BASE;
- ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE,
- ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) & ~(1 << irq));
+ ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS,
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) & ~(1 << irq));
/* flush write */
- ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
+ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS);
}
static struct irq_chip ar71xx_misc_irq_chip = {
.name = "AR71XX MISC",
.unmask = ar71xx_misc_irq_unmask,
.mask = ar71xx_misc_irq_mask,
- .mask_ack = ar71xx_misc_irq_mask,
};
static struct irqaction ar71xx_misc_irqaction = {
@@ -343,7 +336,9 @@ static void __init ar71xx_misc_irq_init(void)
ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS, 0);
if (ar71xx_soc == AR71XX_SOC_AR7240)
- ar71xx_misc_irq_chip.unmask = ar724x_misc_irq_unmask;
+ ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
+ else
+ ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
for (i = AR71XX_MISC_IRQ_BASE;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {