ar71xx: Add kernel 4.9 support

This add support for kernel 4.9 to the ar71xx target.
It was compile tested with the generic, NAND and mikrotik subtarget.
Multiple members of the community tested it on their boards and did not
report any major problem so far.

Especially the NAND part received some changes to adapt to the new
kernel APIs. The serial driver hack used for the Arduino Yun was not
ported because the kernel changed there a lot.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

1 files changed, 123 insertions, 0 deletions

diff --git a/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch
new file mode 100644
index 0000000000..740ffec4ac
--- /dev/null
+++ b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch
@@ -0,0 +1,123 @@
+--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+@@ -659,6 +659,7 @@
+ 
+ #define AR933X_BOOTSTRAP_MDIO_GPIO_EN	BIT(18)
+ #define AR933X_BOOTSTRAP_EEPBUSY	BIT(4)
++#define AR933X_BOOTSTRAP_USB_MODE_HOST	BIT(3)
+ #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)
+ 
+ #define AR934X_BOOTSTRAP_SW_OPTION8	BIT(23)
+@@ -688,6 +689,8 @@
+ 
+ #define QCA956X_BOOTSTRAP_REF_CLK_40	BIT(2)
+ 
++#define AR933X_USB_CONFIG_HOST_ONLY   BIT(8)
++
+ #define AR934X_PCIE_WMAC_INT_WMAC_MISC		BIT(0)
+ #define AR934X_PCIE_WMAC_INT_WMAC_TX		BIT(1)
+ #define AR934X_PCIE_WMAC_INT_WMAC_RXLP		BIT(2)
+--- a/arch/mips/ath79/dev-usb.c
++++ b/arch/mips/ath79/dev-usb.c
+@@ -19,6 +19,9 @@
+ #include <linux/platform_device.h>
+ #include <linux/usb/ehci_pdriver.h>
+ #include <linux/usb/ohci_pdriver.h>
++#include <linux/usb/otg.h>
++#include <linux/usb/chipidea.h>
++#include <linux/usb/usb_phy_generic.h>
+ 
+ #include <asm/mach-ath79/ath79.h>
+ #include <asm/mach-ath79/ar71xx_regs.h>
+@@ -170,6 +173,67 @@ static void __init ar913x_usb_setup(void
+ 			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
+ }
+ 
++static void __init ar933x_usb_setup_ctrl_config(void)
++{
++	void __iomem *usb_ctrl_base, *usb_config_reg;
++	u32 usb_config;
++
++	usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
++	usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG;
++	usb_config = __raw_readl(usb_config_reg);
++	usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY;
++	__raw_writel(usb_config, usb_config_reg);
++	iounmap(usb_ctrl_base);
++}
++
++static void __init ar9xxx_ci_usb_setup(void)
++{
++	struct ci_hdrc_platform_data ci_pdata;
++	enum usb_dr_mode dr_mode;
++	bool host_mode = true;
++
++	if (soc_is_ar933x())
++		host_mode = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) &
++			    AR933X_BOOTSTRAP_USB_MODE_HOST;
++	else if (soc_is_ar934x() || soc_is_qca955x())
++		host_mode = !(ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP) &
++			      AR934X_BOOTSTRAP_USB_MODE_DEVICE);
++
++	if (host_mode) {
++		dr_mode = USB_DR_MODE_HOST;
++	} else {
++		dr_mode = USB_DR_MODE_PERIPHERAL;
++		if (soc_is_ar933x())
++			ar933x_usb_setup_ctrl_config();
++	}
++
++	memset(&ci_pdata, 0, sizeof(ci_pdata));
++	ci_pdata.name = "ci_hdrc_ar9xxx";
++	ci_pdata.capoffset = DEF_CAPOFFSET;
++	ci_pdata.dr_mode = dr_mode;
++	ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP;
++	ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV);
++	ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV);
++	ci_pdata.itc_setting = 1;
++
++	platform_device_register_simple("usb_phy_generic",
++					PLATFORM_DEVID_AUTO, NULL, 0);
++
++	ath79_usb_register("ci_hdrc", -1,
++			   AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
++			   ATH79_CPU_IRQ(3),
++			   &ci_pdata, sizeof(ci_pdata));
++
++	if (!host_mode)
++		return;
++
++	ath79_usb_register("ehci-platform", -1,
++			   AR934X_EHCI_BASE, AR934X_EHCI_SIZE,
++			   ATH79_CPU_IRQ(3),
++			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
++
++}
++
+ static void __init ar933x_usb_setup(void)
+ {
+ 	ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
+@@ -181,10 +245,7 @@ static void __init ar933x_usb_setup(void
+ 	ath79_device_reset_clear(AR933X_RESET_USB_PHY);
+ 	mdelay(10);
+ 
+-	ath79_usb_register("ehci-platform", -1,
+-			   AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
+-			   ATH79_CPU_IRQ(3),
+-			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
++	ar9xxx_ci_usb_setup();
+ }
+ 
+ static void enable_tx_tx_idp_violation_fix(unsigned base)
+@@ -230,10 +291,7 @@ static void __init ar934x_usb_setup(void
+ 	if (ath79_soc_rev >= 3)
+ 		ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier;
+ 
+-	ath79_usb_register("ehci-platform", -1,
+-			   AR934X_EHCI_BASE, AR934X_EHCI_SIZE,
+-			   ATH79_CPU_IRQ(3),
+-			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
++	ar9xxx_ci_usb_setup();
+ }
+ 
+ static void __init qca953x_usb_setup(void)