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authorHauke Mehrtens <hauke@hauke-m.de>2017-10-03 18:02:59 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2017-10-11 22:32:39 +0200
commit7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c (patch)
treee42a4555f9845f78fb9baf7102da8d3d45adfacc /target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch
parent2909a4b78e2bce5f6b9c35361866d5e9477a1bdc (diff)
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ar71xx: Add kernel 4.9 support
This add support for kernel 4.9 to the ar71xx target. It was compile tested with the generic, NAND and mikrotik subtarget. Multiple members of the community tested it on their boards and did not report any major problem so far. Especially the NAND part received some changes to adapt to the new kernel APIs. The serial driver hack used for the Arduino Yun was not ported because the kernel changed there a lot. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch')
-rw-r--r--target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch67
1 files changed, 67 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch b/target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch
new file mode 100644
index 0000000000..afa7b69b43
--- /dev/null
+++ b/target/linux/ar71xx/patches-4.9/820-MIPS-ath79-add_gpio_function2_setup.patch
@@ -0,0 +1,67 @@
+Add access to the function2 gpio register. This probably has to be
+converted into a pimux driver later on. This is needed for some setup
+functions on the Arduino Yun.
+
+--- a/arch/mips/ath79/common.h
++++ b/arch/mips/ath79/common.h
+@@ -29,6 +29,7 @@ void ath79_ddr_ctrl_init(void);
+ void ath79_gpio_function_enable(u32 mask);
+ void ath79_gpio_function_disable(u32 mask);
+ void ath79_gpio_function_setup(u32 set, u32 clear);
++void ath79_gpio_function2_setup(u32 set, u32 clear);
+ void ath79_gpio_output_select(unsigned gpio, u8 val);
+ int ath79_gpio_direction_select(unsigned gpio, bool oe);
+ void ath79_gpio_init(void);
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -43,6 +43,31 @@ static void __iomem *ath79_gpio_get_func
+ return ath79_gpio_base + reg;
+ }
+
++static void __iomem *ath79_gpio_get_function2_reg(void)
++{
++ u32 reg = 0;
++
++ if (soc_is_ar71xx() ||
++ soc_is_ar724x() ||
++ soc_is_ar913x() ||
++ soc_is_ar933x())
++ reg = AR71XX_GPIO_REG_FUNC_2;
++ else
++ BUG();
++
++ return ath79_gpio_base + reg;
++}
++
++
++void ath79_gpio_function2_setup(u32 set, u32 clear)
++{
++ void __iomem *reg = ath79_gpio_get_function2_reg();
++
++ __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
++ /* flush write */
++ __raw_readl(reg);
++}
++
+ void ath79_gpio_function_setup(u32 set, u32 clear)
+ {
+ void __iomem *reg = ath79_gpio_get_function_reg();
+--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+@@ -865,6 +865,7 @@
+ #define AR71XX_GPIO_REG_INT_PENDING 0x20
+ #define AR71XX_GPIO_REG_INT_ENABLE 0x24
+ #define AR71XX_GPIO_REG_FUNC 0x28
++#define AR71XX_GPIO_REG_FUNC_2 0x30
+
+ #define AR934X_GPIO_REG_OUT_FUNC0 0x2c
+ #define AR934X_GPIO_REG_OUT_FUNC1 0x30
+@@ -989,6 +990,8 @@
+ #define AR724X_GPIO_FUNC_UART_EN BIT(1)
+ #define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
+
++#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9)
++
+ #define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22)
+ #define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
+ #define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20)