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| author | Matthias Schiffer <mschiffer@universe-factory.net> | 2018-01-11 00:22:42 +0100 |
|---|---|---|
| committer | Matthias Schiffer <mschiffer@universe-factory.net> | 2018-01-13 19:54:45 +0100 |
| commit | d04056e5ea64debd69b075f2fc9ed6a44a2f57a2 (patch) | |
| tree | 1affbfc6cca0a262ff9f9050e9761b8027e377d3 /target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch | |
| parent | e9fa0b9f3ae0711dd07d61b482f6bdb6446b4f9c (diff) | |
| download | upstream-d04056e5ea64debd69b075f2fc9ed6a44a2f57a2.tar.gz upstream-d04056e5ea64debd69b075f2fc9ed6a44a2f57a2.tar.bz2 upstream-d04056e5ea64debd69b075f2fc9ed6a44a2f57a2.zip | |
ar71xx: disable devicetree support
While we'd like to convert ar71xx to DT-based configuration
eventually, we aren't quite there yet, and shipping half-baked DT support
that is not used at all wastes precious space.
Saves ~120KB before LZMA, ~33KB after LZMA.
Run-tested on TP-Link CPE510 and TL-WR841 v7.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Diffstat (limited to 'target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch b/target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch new file mode 100644 index 0000000000..c0b5459e45 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/604-MIPS-ath79-no-of.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -195,7 +195,6 @@ config ATH79 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART_PROM +- select USE_OF + help + Support for the Atheros AR71XX/AR724X/AR913X SoCs. + +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -196,16 +196,20 @@ unsigned int get_c0_compare_int(void) + + void __init plat_mem_setup(void) + { ++#ifdef CONFIG_OF + unsigned long fdt_start; ++#endif + + set_io_port_base(KSEG1); + ++#ifdef CONFIG_OF + /* Get the position of the FDT passed by the bootloader */ + fdt_start = fw_getenvl("fdt_start"); + if (fdt_start) + __dt_setup_arch((void *)KSEG0ADDR(fdt_start)); + else if (fw_passed_dtb) + __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb)); ++#endif + + if (mips_machtype != ATH79_MACH_GENERIC_OF) { + ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, +@@ -301,17 +305,21 @@ static int __init ath79_setup(void) + + arch_initcall(ath79_setup); + ++#ifdef CONFIG_OF + void __init device_tree_init(void) + { + unflatten_and_copy_device_tree(); + } ++#endif + + MIPS_MACHINE(ATH79_MACH_GENERIC, + "Generic", + "Generic AR71XX/AR724X/AR913X based board", + NULL); + ++#ifdef CONFIG_OF + MIPS_MACHINE(ATH79_MACH_GENERIC_OF, + "DTB", + "Generic AR71XX/AR724X/AR913X based board (DT)", + NULL); ++#endif +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -33,10 +33,12 @@ + #define AR724X_BASE_FREQ 40000000 + + static struct clk *clks[ATH79_CLK_END]; ++#ifdef CONFIG_OF + static struct clk_onecell_data clk_data = { + .clks = clks, + .clk_num = ARRAY_SIZE(clks), + }; ++#endif + + static struct clk *__init ath79_add_sys_clkdev( + const char *id, unsigned long rate) |