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authorHauke Mehrtens <hauke@hauke-m.de>2017-10-03 18:02:59 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2017-10-11 22:32:39 +0200
commit7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c (patch)
treee42a4555f9845f78fb9baf7102da8d3d45adfacc /target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch
parent2909a4b78e2bce5f6b9c35361866d5e9477a1bdc (diff)
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ar71xx: Add kernel 4.9 support
This add support for kernel 4.9 to the ar71xx target. It was compile tested with the generic, NAND and mikrotik subtarget. Multiple members of the community tested it on their boards and did not report any major problem so far. Especially the NAND part received some changes to adapt to the new kernel APIs. The serial driver hack used for the Arduino Yun was not ported because the kernel changed there a lot. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch')
-rw-r--r--target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch42
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch b/target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch
new file mode 100644
index 0000000000..c0e96b2729
--- /dev/null
+++ b/target/linux/ar71xx/patches-4.9/504-MIPS-ath79-add-ath79_device_reset_get.patch
@@ -0,0 +1,42 @@
+--- a/arch/mips/include/asm/mach-ath79/ath79.h
++++ b/arch/mips/include/asm/mach-ath79/ath79.h
+@@ -145,6 +145,7 @@ static inline u32 ath79_reset_rr(unsigne
+
+ void ath79_device_reset_set(u32 mask);
+ void ath79_device_reset_clear(u32 mask);
++u32 ath79_device_reset_get(u32 mask);
+
+ void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3);
+ void ath79_misc_irq_init(void __iomem *regs, int irq,
+--- a/arch/mips/ath79/common.c
++++ b/arch/mips/ath79/common.c
+@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask)
+ spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
+ }
+ EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
++
++u32 ath79_device_reset_get(u32 mask)
++{
++ unsigned long flags;
++ u32 reg;
++ u32 ret;
++
++ if (soc_is_ar71xx())
++ reg = AR71XX_RESET_REG_RESET_MODULE;
++ else if (soc_is_ar724x())
++ reg = AR724X_RESET_REG_RESET_MODULE;
++ else if (soc_is_ar913x())
++ reg = AR913X_RESET_REG_RESET_MODULE;
++ else if (soc_is_ar933x())
++ reg = AR933X_RESET_REG_RESET_MODULE;
++ else if (soc_is_ar934x())
++ reg = AR934X_RESET_REG_RESET_MODULE;
++ else
++ BUG();
++
++ spin_lock_irqsave(&ath79_device_reset_lock, flags);
++ ret = ath79_reset_rr(reg);
++ spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
++ return ret;
++}
++EXPORT_SYMBOL_GPL(ath79_device_reset_get);