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authorRoger Pueyo Centelles <roger.pueyo@guifi.net>2018-01-08 12:30:28 +0100
committerDaniel Golle <daniel@makrotopia.org>2018-01-15 04:14:18 +0100
commit20e68f6d395d72ca8a5d5ec364bc7cf4c1862b87 (patch)
treee7ff68d8b2c8152a97287ff747b74d7a6be7d103 /target/linux/ar71xx/patches-4.4
parent5352669c2c470f2d2bb02deccfa758e1867e07b0 (diff)
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ar71xx: kernel: enable PCI on QCA9556 SoC
This patch enables the PCI bus on the QCA9556 SoC, the same way it is done on the same family SoC QCA9558. Tested on a MikroTik RouterBoard wAPG-5HacT2HnD (wAP AC). Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
Diffstat (limited to 'target/linux/ar71xx/patches-4.4')
-rw-r--r--target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch12
1 files changed, 12 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch b/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch
new file mode 100644
index 0000000000..3a6438ee89
--- /dev/null
+++ b/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch
@@ -0,0 +1,12 @@
+--- a/arch/mips/ath79/pci.c
++++ b/arch/mips/ath79/pci.c
+@@ -324,7 +324,8 @@ int __init ath79_register_pci(void)
+ QCA953X_PCI_MEM_SIZE,
+ 0,
+ ATH79_IP2_IRQ(0));
+- } else if (soc_is_qca9558()) {
++ } else if (soc_is_qca9558() ||
++ soc_is_qca9556()) {
+ pdev = ath79_register_pci_ar724x(0,
+ QCA955X_PCI_CFG_BASE0,
+ QCA955X_PCI_CTRL_BASE0,