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| author | John Crispin <john@phrozen.org> | 2018-08-09 15:59:41 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-08-22 08:09:00 +0200 |
| commit | 318e19ba6755105bb6cc19937d8fff26cbd2cc6f (patch) | |
| tree | 2f7c96140932a2770fb767141c7d1e93d29127b0 /target/linux/ar71xx/patches-4.14/504-MIPS-ath79-add-ath79_device_reset_get.patch | |
| parent | e5f56c07d7fab9a6f2201f4100b593349b8ef67d (diff) | |
| download | upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.tar.gz upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.tar.bz2 upstream-318e19ba6755105bb6cc19937d8fff26cbd2cc6f.zip | |
ar71xx: add v4.14 support
adds v4.14 patches for testing but leaves v4.9 as default for now.
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ar71xx/patches-4.14/504-MIPS-ath79-add-ath79_device_reset_get.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-4.14/504-MIPS-ath79-add-ath79_device_reset_get.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-4.14/504-MIPS-ath79-add-ath79_device_reset_get.patch b/target/linux/ar71xx/patches-4.14/504-MIPS-ath79-add-ath79_device_reset_get.patch new file mode 100644 index 0000000000..c0e96b2729 --- /dev/null +++ b/target/linux/ar71xx/patches-4.14/504-MIPS-ath79-add-ath79_device_reset_get.patch @@ -0,0 +1,42 @@ +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -145,6 +145,7 @@ static inline u32 ath79_reset_rr(unsigne + + void ath79_device_reset_set(u32 mask); + void ath79_device_reset_clear(u32 mask); ++u32 ath79_device_reset_get(u32 mask); + + void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3); + void ath79_misc_irq_init(void __iomem *regs, int irq, +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask) + spin_unlock_irqrestore(&ath79_device_reset_lock, flags); + } + EXPORT_SYMBOL_GPL(ath79_device_reset_clear); ++ ++u32 ath79_device_reset_get(u32 mask) ++{ ++ unsigned long flags; ++ u32 reg; ++ u32 ret; ++ ++ if (soc_is_ar71xx()) ++ reg = AR71XX_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar724x()) ++ reg = AR724X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar913x()) ++ reg = AR913X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar933x()) ++ reg = AR933X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar934x()) ++ reg = AR934X_RESET_REG_RESET_MODULE; ++ else ++ BUG(); ++ ++ spin_lock_irqsave(&ath79_device_reset_lock, flags); ++ ret = ath79_reset_rr(reg); ++ spin_unlock_irqrestore(&ath79_device_reset_lock, flags); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ath79_device_reset_get); |