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authorGabor Juhos <juhosg@openwrt.org>2013-02-21 17:47:15 +0000
committerGabor Juhos <juhosg@openwrt.org>2013-02-21 17:47:15 +0000
commitcf2324fd6b6752ce511b612fc192ab9f0b6a32cb (patch)
tree4f94e8ab5c7b998cb84115489594f670957f3d4b /target/linux/ar71xx/patches-3.8/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch
parent9cc3a60b5a6988759532b63a6fb513484b8ec9f9 (diff)
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ar71xx: add support for 3.8
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35728
Diffstat (limited to 'target/linux/ar71xx/patches-3.8/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch')
-rw-r--r--target/linux/ar71xx/patches-3.8/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch70
1 files changed, 70 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.8/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch b/target/linux/ar71xx/patches-3.8/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch
new file mode 100644
index 0000000000..d17ad52520
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.8/154-MIPS-pci-ar71xx-remove-static-PCI-controller-resourc.patch
@@ -0,0 +1,70 @@
+From 7dc3ccb5dc972b06c41b309653d132beaaedeb37 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Mon, 25 Jun 2012 09:52:23 +0200
+Subject: [PATCH 15/34] MIPS: pci-ar71xx: remove static PCI controller resources
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ arch/mips/pci/pci-ar71xx.c | 30 ++++++++++++++----------------
+ 1 files changed, 14 insertions(+), 16 deletions(-)
+
+--- a/arch/mips/pci/pci-ar71xx.c
++++ b/arch/mips/pci/pci-ar71xx.c
+@@ -54,6 +54,8 @@ struct ar71xx_pci_controller {
+ spinlock_t lock;
+ int irq;
+ struct pci_controller pci_ctrl;
++ struct resource io_res;
++ struct resource mem_res;
+ };
+
+ /* Byte lane enable bits */
+@@ -235,20 +237,6 @@ static struct pci_ops ar71xx_pci_ops = {
+ .write = ar71xx_pci_write_config,
+ };
+
+-static struct resource ar71xx_pci_io_resource = {
+- .name = "PCI IO space",
+- .start = 0,
+- .end = 0,
+- .flags = IORESOURCE_IO,
+-};
+-
+-static struct resource ar71xx_pci_mem_resource = {
+- .name = "PCI memory space",
+- .start = AR71XX_PCI_MEM_BASE,
+- .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,
+- .flags = IORESOURCE_MEM
+-};
+-
+ static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
+ {
+ void __iomem *base = ath79_reset_base;
+@@ -370,6 +358,16 @@ static int ar71xx_pci_probe(struct platf
+ if (apc->irq < 0)
+ return -EINVAL;
+
++ apc->io_res.name = "PCI IO space";
++ apc->io_res.start = 0;
++ apc->io_res.end = 0;
++ apc->io_res.flags = IORESOURCE_IO;
++
++ apc->mem_res.name = "PCI memory space";
++ apc->mem_res.start = AR71XX_PCI_MEM_BASE;
++ apc->mem_res.end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
++ apc->mem_res.flags = IORESOURCE_MEM;
++
+ ar71xx_pci_reset();
+
+ /* setup COMMAND register */
+@@ -383,8 +381,8 @@ static int ar71xx_pci_probe(struct platf
+ ar71xx_pci_irq_init(apc);
+
+ apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
+- apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource;
+- apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource;
++ apc->pci_ctrl.mem_resource = &apc->mem_res;
++ apc->pci_ctrl.io_resource = &apc->io_res;
+
+ register_pci_controller(&apc->pci_ctrl);
+