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authorFelix Fietkau <nbd@openwrt.org>2013-07-14 14:05:12 +0000
committerFelix Fietkau <nbd@openwrt.org>2013-07-14 14:05:12 +0000
commit8d5d96e8338d436d6e46925932b687fa875a072a (patch)
tree2f29408c0b63117563142f9aa9fb8e7c9fd88cf4 /target/linux/ar71xx/patches-3.8/032-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
parentd1238718c23a818b1be2fca068974d8fb916a599 (diff)
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ar71xx: remove linux 3.8
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 37290
Diffstat (limited to 'target/linux/ar71xx/patches-3.8/032-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch')
-rw-r--r--target/linux/ar71xx/patches-3.8/032-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch50
1 files changed, 0 insertions, 50 deletions
diff --git a/target/linux/ar71xx/patches-3.8/032-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch b/target/linux/ar71xx/patches-3.8/032-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
deleted file mode 100644
index 538da3c6f8..0000000000
--- a/target/linux/ar71xx/patches-3.8/032-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 8817bcbbaf64d54bd4d06659cc77d1bfc9e53dad Mon Sep 17 00:00:00 2001
-From: Gabor Juhos <juhosg@openwrt.org>
-Date: Fri, 15 Feb 2013 13:38:19 +0000
-Subject: [PATCH] MIPS: ath79: add GPIO setup code for the QCA955X SoCs
-
-commit f818ca3e6894d4a630a1ecc673c91df8fb6f6898 upstream.
-
-The existing code can handle the GPIO controller of
-the QCA955x SoCs. Add a minimal glue code to make it
-working.
-
-Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
-Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
-Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Patchwork: http://patchwork.linux-mips.org/patch/4947/
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- arch/mips/ath79/gpio.c | 4 +++-
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
- 2 files changed, 4 insertions(+), 1 deletion(-)
-
---- a/arch/mips/ath79/gpio.c
-+++ b/arch/mips/ath79/gpio.c
-@@ -194,12 +194,14 @@ void __init ath79_gpio_init(void)
- ath79_gpio_count = AR933X_GPIO_COUNT;
- else if (soc_is_ar934x())
- ath79_gpio_count = AR934X_GPIO_COUNT;
-+ else if (soc_is_qca955x())
-+ ath79_gpio_count = QCA955X_GPIO_COUNT;
- else
- BUG();
-
- ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
- ath79_gpio_chip.ngpio = ath79_gpio_count;
-- if (soc_is_ar934x()) {
-+ if (soc_is_ar934x() || soc_is_qca955x()) {
- ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
- ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
- }
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -510,6 +510,7 @@
- #define AR913X_GPIO_COUNT 22
- #define AR933X_GPIO_COUNT 30
- #define AR934X_GPIO_COUNT 23
-+#define QCA955X_GPIO_COUNT 24
-
- /*
- * SRIF block