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authorGabor Juhos <juhosg@openwrt.org>2012-12-29 16:02:31 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-12-29 16:02:31 +0000
commit87271e9f28796debd156da0b2466bc286ccbac0f (patch)
treef155ac33958d33a2f945aa9835c1e68a0d1619f4 /target/linux/ar71xx/patches-3.7/505-MIPS-ath79-add-ath79_gpio_function_select.patch
parenta3a6e0f0396714106c8942c89a55179213d85726 (diff)
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ar71xx: add support for 3.7
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 34920
Diffstat (limited to 'target/linux/ar71xx/patches-3.7/505-MIPS-ath79-add-ath79_gpio_function_select.patch')
-rw-r--r--target/linux/ar71xx/patches-3.7/505-MIPS-ath79-add-ath79_gpio_function_select.patch47
1 files changed, 47 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.7/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-3.7/505-MIPS-ath79-add-ath79_gpio_function_select.patch
new file mode 100644
index 0000000000..86e136f67e
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.7/505-MIPS-ath79-add-ath79_gpio_function_select.patch
@@ -0,0 +1,47 @@
+--- a/arch/mips/ath79/common.h
++++ b/arch/mips/ath79/common.h
+@@ -26,6 +26,7 @@ void ath79_ddr_wb_flush(unsigned int reg
+ void ath79_gpio_function_enable(u32 mask);
+ void ath79_gpio_function_disable(u32 mask);
+ void ath79_gpio_function_setup(u32 set, u32 clear);
++void ath79_gpio_output_select(unsigned gpio, u8 val);
+ void ath79_gpio_init(void);
+
+ #endif /* __ATH79_COMMON_H */
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -198,6 +198,34 @@ void ath79_gpio_function_setup(u32 set,
+ spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+ }
+
++void __init ath79_gpio_output_select(unsigned gpio, u8 val)
++{
++ void __iomem *base = ath79_gpio_base;
++ unsigned long flags;
++ unsigned int reg;
++ u32 t, s;
++
++ BUG_ON(!soc_is_ar934x());
++
++ if (gpio >= AR934X_GPIO_COUNT)
++ return;
++
++ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
++ s = 8 * (gpio % 4);
++
++ spin_lock_irqsave(&ath79_gpio_lock, flags);
++
++ t = __raw_readl(base + reg);
++ t &= ~(0xff << s);
++ t |= val << s;
++ __raw_writel(t, base + reg);
++
++ /* flush write */
++ (void) __raw_readl(base + reg);
++
++ spin_unlock_irqrestore(&ath79_gpio_lock, flags);
++}
++
+ void __init ath79_gpio_init(void)
+ {
+ int err;