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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-01-22 22:38:19 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-01-22 22:38:19 +0000 |
| commit | af015f956c35717909247a5732f6862d3de1476f (patch) | |
| tree | c72d67ef23e35b8dd3e8177c4811773ed6eed759 /target/linux/ar71xx/patches-3.2/129-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch | |
| parent | 386cbfe45bc521baa889a8c261b2c77e69fc956f (diff) | |
| download | upstream-af015f956c35717909247a5732f6862d3de1476f.tar.gz upstream-af015f956c35717909247a5732f6862d3de1476f.tar.bz2 upstream-af015f956c35717909247a5732f6862d3de1476f.zip | |
ar71xx: add initial support for 3.2
Tested on the following boards:
ALFA AP96
TL-MR3220 v1
TL-WR1043ND v1
TL-WR2543ND v1
TL-WR703N v1
TL-WR741ND v1
TL-WR741ND v4
WNDR3700 v1
WZR-HP-G300NH
SVN-Revision: 29868
Diffstat (limited to 'target/linux/ar71xx/patches-3.2/129-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch')
| -rw-r--r-- | target/linux/ar71xx/patches-3.2/129-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/129-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch b/target/linux/ar71xx/patches-3.2/129-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch new file mode 100644 index 0000000000..db5ae6164a --- /dev/null +++ b/target/linux/ar71xx/patches-3.2/129-MIPS-ath79-register-UART-device-for-AR934X-SoCs.patch @@ -0,0 +1,23 @@ +From 6b6803a249a27aa708bc5f24aa15270e30f3de61 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Sat, 10 Dec 2011 19:55:05 +0100 +Subject: [PATCH 29/35] MIPS: ath79: register UART device for AR934X SoCs + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> +--- + arch/mips/ath79/dev-common.c | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/arch/mips/ath79/dev-common.c ++++ b/arch/mips/ath79/dev-common.c +@@ -89,7 +89,8 @@ void __init ath79_register_uart(void) + + if (soc_is_ar71xx() || + soc_is_ar724x() || +- soc_is_ar913x()) { ++ soc_is_ar913x() || ++ soc_is_ar934x()) { + ath79_uart_data[0].uartclk = clk_get_rate(clk); + platform_device_register(&ath79_uart_device); + } else if (soc_is_ar933x()) { |