ar71xx: add initial support for 3.2

Tested on the following boards:
  ALFA AP96
  TL-MR3220 v1
  TL-WR1043ND v1
  TL-WR2543ND v1
  TL-WR703N v1
  TL-WR741ND v1
  TL-WR741ND v4
  WNDR3700 v1
  WZR-HP-G300NH

SVN-Revision: 29868

1 files changed, 151 insertions, 0 deletions

diff --git a/target/linux/ar71xx/patches-3.2/102-MIPS-ath79-separate-common-PCI-code.patch b/target/linux/ar71xx/patches-3.2/102-MIPS-ath79-separate-common-PCI-code.patch
new file mode 100644
index 0000000000..547f4fbd27
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.2/102-MIPS-ath79-separate-common-PCI-code.patch
@@ -0,0 +1,151 @@
+From c98b48027516a2e71688a5957e4e0120f4aa8c61 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Fri, 18 Nov 2011 09:47:44 +0100
+Subject: [PATCH 02/35] MIPS: ath79: separate common PCI code
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
+are common functions and only instance one of them
+can be present in a single kernel.
+
+Currently these functions can be built only if the
+CONFIG_SOC_AR724X option is selected. However the
+ath79 platform contain support for the AR71XX SoCs,.
+The AR71XX SoCs have a differnet PCI controller,
+and those will require a different code.
+
+Move the common PCI code into a separeate file in
+order to be able to use that with other SoCs as
+well.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Acked-by: René Bolldorf <xsecute@googlemail.com>
+
+v4: - add an Acked-by tag from René
+v3: - no changes
+v2: - no changes
+---
+ arch/mips/ath79/Makefile    |    1 +
+ arch/mips/ath79/pci.c       |   46 +++++++++++++++++++++++++++++++++++++++++++
+ arch/mips/pci/pci-ath724x.c |   34 -------------------------------
+ 3 files changed, 47 insertions(+), 34 deletions(-)
+ create mode 100644 arch/mips/ath79/pci.c
+
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -11,6 +11,7 @@
+ obj-y	:= prom.o setup.o irq.o common.o clock.o gpio.o
+ 
+ obj-$(CONFIG_EARLY_PRINTK)		+= early_printk.o
++obj-$(CONFIG_PCI)			+= pci.o
+ 
+ #
+ # Devices
+--- /dev/null
++++ b/arch/mips/ath79/pci.c
+@@ -0,0 +1,46 @@
++/*
++ *  Atheros AR71XX/AR724X specific PCI setup code
++ *
++ *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <asm/mach-ath79/pci-ath724x.h>
++
++static struct ath724x_pci_data *pci_data;
++static int pci_data_size;
++
++void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
++{
++	pci_data	= data;
++	pci_data_size	= size;
++}
++
++int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
++{
++	unsigned int devfn = dev->devfn;
++	int irq = -1;
++
++	if (devfn > pci_data_size - 1)
++		return irq;
++
++	irq = pci_data[devfn].irq;
++
++	return irq;
++}
++
++int pcibios_plat_dev_init(struct pci_dev *dev)
++{
++	unsigned int devfn = dev->devfn;
++
++	if (devfn > pci_data_size - 1)
++		return PCIBIOS_DEVICE_NOT_FOUND;
++
++	dev->dev.platform_data = pci_data[devfn].pdata;
++
++	return PCIBIOS_SUCCESSFUL;
++}
+--- a/arch/mips/pci/pci-ath724x.c
++++ b/arch/mips/pci/pci-ath724x.c
+@@ -9,7 +9,6 @@
+  */
+ 
+ #include <linux/pci.h>
+-#include <asm/mach-ath79/pci-ath724x.h>
+ 
+ #define reg_read(_phys)		(*(unsigned int *) KSEG1ADDR(_phys))
+ #define reg_write(_phys, _val)	((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
+@@ -19,8 +18,6 @@
+ #define ATH724X_PCI_MEM_SIZE	0x08000000
+ 
+ static DEFINE_SPINLOCK(ath724x_pci_lock);
+-static struct ath724x_pci_data *pci_data;
+-static int pci_data_size;
+ 
+ static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
+ 			    int size, uint32_t *value)
+@@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci
+ 	.mem_resource	= &ath724x_mem_resource,
+ };
+ 
+-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
+-{
+-	pci_data	= data;
+-	pci_data_size	= size;
+-}
+-
+-int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
+-{
+-	unsigned int devfn = dev->devfn;
+-	int irq = -1;
+-
+-	if (devfn > pci_data_size - 1)
+-		return irq;
+-
+-	irq = pci_data[devfn].irq;
+-
+-	return irq;
+-}
+-
+-int pcibios_plat_dev_init(struct pci_dev *dev)
+-{
+-	unsigned int devfn = dev->devfn;
+-
+-	if (devfn > pci_data_size - 1)
+-		return PCIBIOS_DEVICE_NOT_FOUND;
+-
+-	dev->dev.platform_data = pci_data[devfn].pdata;
+-
+-	return PCIBIOS_SUCCESSFUL;
+-}
+-
+ static int __init ath724x_pcibios_init(void)
+ {
+ 	register_pci_controller(&ath724x_pci_controller);