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authorZoltan HERPAI <wigyori@uid0.hu>2016-10-25 22:58:12 +0200
committerZoltan HERPAI <wigyori@uid0.hu>2016-10-25 22:58:12 +0200
commit2c54d989b46284bc5ee5b43d4ba7c2762c2241ed (patch)
tree1da1495f9fc9f046a169fb451ea5e6af13cc6453 /target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
parent2aefb514a4852f4c427b467150bbc7cdfe024528 (diff)
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CC: generic: bump kernel to 3.18.44
Patch 610- is updated as check_entry helper was killed in 3.18.37 Fixes CVE-2016-5195 (dirtycow) Compile-tested on ar71xx, mxs, sunxi, imx6 Runtime-tested on ar71xx (PB42) Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Diffstat (limited to 'target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch')
-rw-r--r--target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index e432c6f3b6..813d7f8534 100644
--- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
+++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -626,9 +626,9 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
#define QCA955X_REV_ID_REVISION_MASK 0xf
/*
-@@ -634,12 +747,32 @@
- #define AR934X_GPIO_REG_OUT_FUNC5 0x40
- #define AR934X_GPIO_REG_FUNC 0x6c
+@@ -642,12 +755,32 @@
+ #define QCA955X_GPIO_REG_OUT_FUNC5 0x40
+ #define QCA955X_GPIO_REG_FUNC 0x6c
+#define QCA953X_GPIO_REG_OUT_FUNC0 0x2c
+#define QCA953X_GPIO_REG_OUT_FUNC1 0x30
@@ -659,7 +659,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
#define QCA955X_GPIO_COUNT 24
/*
-@@ -663,6 +796,24 @@
+@@ -671,6 +804,24 @@
#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
@@ -684,7 +684,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)
-@@ -804,6 +955,16 @@
+@@ -877,6 +1028,16 @@
#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16
/*