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author | Felix Fietkau <nbd@openwrt.org> | 2013-07-09 12:52:18 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2013-07-09 12:52:18 +0000 |
commit | f42a1b166f43219853c00dc21f25b0254efbbceb (patch) | |
tree | 8fac5ee67f0a836a95385d15ae8f729d34660b9e /target/linux/ar71xx/patches-3.10/505-MIPS-ath79-add-ath79_gpio_function_select.patch | |
parent | f56e62651455e1a7cdae45a4a12d5258e57dbb75 (diff) | |
download | upstream-f42a1b166f43219853c00dc21f25b0254efbbceb.tar.gz upstream-f42a1b166f43219853c00dc21f25b0254efbbceb.tar.bz2 upstream-f42a1b166f43219853c00dc21f25b0254efbbceb.zip |
ar71xx: add linux 3.10
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37214 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.10/505-MIPS-ath79-add-ath79_gpio_function_select.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.10/505-MIPS-ath79-add-ath79_gpio_function_select.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.10/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-3.10/505-MIPS-ath79-add-ath79_gpio_function_select.patch new file mode 100644 index 0000000000..9e11381bb7 --- /dev/null +++ b/target/linux/ar71xx/patches-3.10/505-MIPS-ath79-add-ath79_gpio_function_select.patch @@ -0,0 +1,47 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -26,6 +26,7 @@ void ath79_ddr_wb_flush(unsigned int reg + void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); ++void ath79_gpio_output_select(unsigned gpio, u8 val); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -180,6 +180,34 @@ void ath79_gpio_function_disable(u32 mas + ath79_gpio_function_setup(0, mask); + } + ++void __init ath79_gpio_output_select(unsigned gpio, u8 val) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ unsigned int reg; ++ u32 t, s; ++ ++ BUG_ON(!soc_is_ar934x()); ++ ++ if (gpio >= AR934X_GPIO_COUNT) ++ return; ++ ++ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ s = 8 * (gpio % 4); ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(0xff << s); ++ t |= val << s; ++ __raw_writel(t, base + reg); ++ ++ /* flush write */ ++ (void) __raw_readl(base + reg); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++} ++ + void __init ath79_gpio_init(void) + { + int err; |