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author | Piotr Dymacz <pepe2k@gmail.com> | 2016-06-16 18:08:03 +0200 |
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committer | Jo-Philipp Wich <jo@mein.io> | 2016-07-13 20:03:10 +0200 |
commit | e767980eb897fbefc320f97b65944ce690ed1726 (patch) | |
tree | ce2c26804d1b36d2b878d242b56b04666e5a2e69 /target/linux/ar71xx/files | |
parent | 3c6b091b65da47286ba4fc81d409023bdcf42629 (diff) | |
download | upstream-e767980eb897fbefc320f97b65944ce690ed1726.tar.gz upstream-e767980eb897fbefc320f97b65944ce690ed1726.tar.bz2 upstream-e767980eb897fbefc320f97b65944ce690ed1726.zip |
ar71xx: add support for Wallys DR531
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors
- mini-PCIe connector with PCIe/USB buses and SIM slot
- 7x LED, 1x button, 1x optional buzzer
- UART, (E)JTAG and LED headers
Default configuration:
- WAN on eth1 (RJ45 near DC jack)
- LAN on eth0 (RJ45 near button)
- S4 LED set to be status LED
- all LEDs configurable form user space
- button configured for reset
Flash instruction (do it under U-Boot, using UART):
1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ar71xx/files')
4 files changed, 167 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index 52b9b5527e..9ab6fed9b7 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -522,6 +522,16 @@ config ATH79_MACH_DR344 select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_DR531 + bool "Wallys DR531 board support" + select SOC_QCA953X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_DRAGINO2 bool "DRAGINO V2 support" select SOC_AR933X diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile index f8b0b2bb5a..33c274fcc4 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile +++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile @@ -80,6 +80,7 @@ obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o +obj-$(CONFIG_ATH79_MACH_DR531) += mach-dr531.o obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dr531.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr531.c new file mode 100644 index 0000000000..b638a9001c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr531.c @@ -0,0 +1,155 @@ +/* + * Wallys DR531 board support + * + * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com> + * + * Based on mach-wpj531.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <linux/pci.h> +#include <linux/gpio.h> +#include <linux/platform_device.h> + +#include <asm/mach-ath79/ath79.h> +#include <asm/mach-ath79/ar71xx_regs.h> + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define DR531_GPIO_BUZZER 4 +#define DR531_GPIO_LED_WAN 11 +#define DR531_GPIO_LED_LAN 14 +#define DR531_GPIO_LED_SIG1 12 +#define DR531_GPIO_LED_SIG2 16 +#define DR531_GPIO_LED_SIG3 15 +#define DR531_GPIO_LED_SIG4 13 + +#define DR531_GPIO_BTN_RESET 17 + +#define DR531_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DR531_KEYS_DEBOUNCE_INTERVAL (3 * DR531_KEYS_POLL_INTERVAL) + +#define DR531_MAC0_OFFSET 0x0 +#define DR531_MAC1_OFFSET 0x8 +#define DR531_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led dr531_leds_gpio[] __initdata = { + { + .name = "dr531:green:wan", + .gpio = DR531_GPIO_LED_WAN, + .active_low = 1, + }, + { + .name = "dr531:green:lan", + .gpio = DR531_GPIO_LED_LAN, + .active_low = 1, + }, + { + .name = "dr531:green:sig1", + .gpio = DR531_GPIO_LED_SIG1, + .active_low = 1, + }, + { + .name = "dr531:green:sig2", + .gpio = DR531_GPIO_LED_SIG2, + .active_low = 1, + }, + { + .name = "dr531:green:sig3", + .gpio = DR531_GPIO_LED_SIG3, + .active_low = 1, + }, + { + .name = "dr531:green:sig4", + .gpio = DR531_GPIO_LED_SIG4, + .active_low = 1, + }, + { + .name = "dr531:buzzer", + .gpio = DR531_GPIO_BUZZER, + .active_low = 0, + } +}; + +static struct gpio_keys_button dr531_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = DR531_KEYS_DEBOUNCE_INTERVAL, + .gpio = DR531_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static void __init dr531_gpio_setup(void) +{ + ath79_gpio_direction_select(DR531_GPIO_BUZZER, true); + ath79_gpio_direction_select(DR531_GPIO_LED_WAN, true); + ath79_gpio_direction_select(DR531_GPIO_LED_LAN, true); + ath79_gpio_direction_select(DR531_GPIO_LED_SIG1, true); + ath79_gpio_direction_select(DR531_GPIO_LED_SIG2, true); + ath79_gpio_direction_select(DR531_GPIO_LED_SIG3, true); + ath79_gpio_direction_select(DR531_GPIO_LED_SIG4, true); + + ath79_gpio_output_select(DR531_GPIO_BUZZER, 0); + ath79_gpio_output_select(DR531_GPIO_LED_WAN, 0); + ath79_gpio_output_select(DR531_GPIO_LED_LAN, 0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(dr531_leds_gpio), + dr531_leds_gpio); + + ath79_register_gpio_keys_polled(-1, DR531_KEYS_POLL_INTERVAL, + ARRAY_SIZE(dr531_gpio_keys), + dr531_gpio_keys); +} + +static void __init dr531_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810); + + ath79_register_m25p80(NULL); + + dr531_gpio_setup(); + + ath79_setup_ar933x_phy4_switch(false, false); + + ath79_register_mdio(0, 0x0); + + /* LAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.phy_mask = BIT(4); + ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR531_MAC1_OFFSET, 0); + ath79_register_eth(0); + + /* WAN */ + ath79_switch_data.phy4_mii_en = 1; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_switch_data.phy_poll_mask |= BIT(4); + ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR531_MAC0_OFFSET, 0); + ath79_register_eth(1); + + ath79_register_wmac(art + DR531_WMAC_CALDATA_OFFSET, NULL); + + ath79_register_pci(); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_DR531, "DR531", "Wallys DR531", dr531_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h index f40b4a43b5..3425ce901b 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h @@ -72,6 +72,7 @@ enum ath79_mach_type { ATH79_MACH_DLAN_PRO_500_WP, /* devolo dLAN pro 500 Wireless+ */ ATH79_MACH_DLAN_PRO_1200_AC, /* devolo dLAN pro 1200+ WiFi ac*/ ATH79_MACH_DR344, /* Wallys DR344 */ + ATH79_MACH_DR531, /* Wallys DR531 */ ATH79_MACH_DRAGINO2, /* Dragino Version 2 */ ATH79_MACH_ESR900, /* EnGenius ESR900 */ ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */ |