ar71xx: Add support for AirTight Networks C-55

This patch is to add support for the AirTight Networks C-55 Access Point

Signed-off-by: Chris R Blake <chrisrblake93@gmail.com>

SVN-Revision: 47973

4 files changed, 144 insertions, 0 deletions

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index 9cf7a0b317..84d22fe7a0 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -182,6 +182,16 @@ config ATH79_MACH_PB92
 	select ATH79_DEV_PB9X_PCI if PCI
 	select ATH79_DEV_USB
 
+config ATH79_MACH_C55
+	bool "AirTight Networks C-55 support"
+	select SOC_AR934X
+	select ATH79_DEV_AP9X_PCI if PCI
+	select ATH79_DEV_ETH
+	select ATH79_DEV_GPIO_BUTTONS
+	select ATH79_DEV_LEDS_GPIO
+	select ATH79_DEV_M25P80
+	select ATH79_DEV_WMAC
+
 config ATH79_MACH_AW_NR580
 	bool "AzureWave AW-NR580 board support"
 	select SOC_AR71XX
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
index 6800bfd3ac..2d4522551a 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
@@ -117,6 +117,7 @@ obj-$(CONFIG_ATH79_MACH_ONION_OMEGA)  += mach-onion-omega.o
 obj-$(CONFIG_ATH79_MACH_PB42)		+= mach-pb42.o
 obj-$(CONFIG_ATH79_MACH_PB44)		+= mach-pb44.o
 obj-$(CONFIG_ATH79_MACH_PB92)		+= mach-pb92.o
+obj-$(CONFIG_ATH79_MACH_C55)		+= mach-c55.o
 obj-$(CONFIG_ATH79_MACH_QIHOO_C301)	+= mach-qihoo-c301.o
 obj-$(CONFIG_ATH79_MACH_R6100)		+= mach-r6100.o
 obj-$(CONFIG_ATH79_MACH_RB4XX)		+= mach-rb4xx.o
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c
new file mode 100644
index 0000000000..cbee18e395
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c
@@ -0,0 +1,132 @@
+/*
+ *  AirTight Networks C-55 board support
+ *
+ *  Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
+ *
+ *  Based on Senao CAP4200AG board support
+ *
+ *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "pci.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define C55_GPIO_LED_PWR_GREEN	12
+#define C55_GPIO_LED_PWR_AMBER	13
+#define C55_GPIO_LED_LAN_GREEN	14
+#define C55_GPIO_LED_LAN_AMBER	15
+#define C55_GPIO_LED_WLAN_GREEN	18
+#define C55_GPIO_LED_WLAN_AMBER	19
+
+#define C55_GPIO_BTN_RESET	17
+
+#define C55_KEYS_POLL_INTERVAL	20	/* msecs */
+#define C55_KEYS_DEBOUNCE_INTERVAL (3 * C55_KEYS_POLL_INTERVAL)
+
+#define C55_MAC_OFFSET		0
+#define C55_WMAC_CALDATA_OFFSET	0x1000
+#define C55_PCIE_CALDATA_OFFSET	0x5000
+
+static struct gpio_led c55_leds_gpio[] __initdata = {
+	{
+		.name		= "c-55:green:pwr",
+		.gpio		= C55_GPIO_LED_PWR_GREEN,
+		.active_low	= 1,
+	},
+	{
+		.name		= "c-55:amber:pwr",
+		.gpio		= C55_GPIO_LED_PWR_AMBER,
+		.active_low	= 1,
+	},
+	{
+		.name		= "c-55:green:lan",
+		.gpio		= C55_GPIO_LED_LAN_GREEN,
+		.active_low	= 1,
+	},
+	{
+		.name		= "c-55:amber:lan",
+		.gpio		= C55_GPIO_LED_LAN_AMBER,
+		.active_low	= 1,
+	},
+	{
+		.name		= "c-55:green:wlan",
+		.gpio		= C55_GPIO_LED_WLAN_GREEN,
+		.active_low	= 1,
+	},
+	{
+		.name		= "c-55:amber:wlan",
+		.gpio		= C55_GPIO_LED_WLAN_AMBER,
+		.active_low	= 1,
+	},
+};
+
+static struct gpio_keys_button c55_gpio_keys[] __initdata = {
+	{
+		.desc		= "Reset button",
+		.type		= EV_KEY,
+		.code		= KEY_RESTART,
+		.debounce_interval = C55_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= C55_GPIO_BTN_RESET,
+		.active_low	= 1,
+	},
+};
+
+static void __init c55_setup(void)
+{
+	/* SPI Storage*/
+	ath79_register_m25p80_large(NULL);
+
+	/* MDIO Interface */
+	ath79_register_mdio(0, 0x0);
+
+	/* AR8035-A Ethernet */
+	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+				   AR934X_ETH_CFG_SW_ONLY_MODE);
+	ath79_init_mac(ath79_eth0_data.mac_addr, NULL, 0);
+	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+	ath79_eth0_data.phy_mask = BIT(0);
+	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+	ath79_eth0_pll_data.pll_1000 = 0x06000000;
+	ath79_register_eth(0);
+
+	/* LEDs & GPIO */
+	ath79_gpio_output_select(C55_GPIO_LED_LAN_GREEN,
+				 AR934X_GPIO_OUT_GPIO);
+	ath79_gpio_output_select(C55_GPIO_LED_LAN_AMBER,
+				 AR934X_GPIO_OUT_GPIO);
+	ath79_register_leds_gpio(-1, ARRAY_SIZE(c55_leds_gpio),
+				 c55_leds_gpio);
+	ath79_register_gpio_keys_polled(-1, C55_KEYS_POLL_INTERVAL,
+					ARRAY_SIZE(c55_gpio_keys),
+					c55_gpio_keys);
+
+	/* WiFi */
+	ath79_wmac_disable_2ghz();
+	ath79_register_wmac_simple();
+	ap91_pci_init_simple();
+
+}
+MIPS_MACHINE(ATH79_MACH_C55, "C-55", "AirTight Networks C-55",
+	     c55_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index fd22505565..c32d44a73a 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -42,6 +42,7 @@ enum ath79_mach_type {
 	ATH79_MACH_AW_NR580,		/* AzureWave AW-NR580 */
 	ATH79_MACH_BHU_BXU2000N2_A1,	/* BHU BXU2000n-2 A1 */
 	ATH79_MACH_BSB,			/* Smart Electronics Black Swift board */
+	ATH79_MACH_C55,			/* AirTight Networks C-55 */
 	ATH79_MACH_CAP324,		/* PowerCloud CAP324 */
 	ATH79_MACH_CAP4200AG,		/* Senao CAP4200AG */
 	ATH79_MACH_CARAMBOLA2,		/* 8devices Carambola2 */