aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/files
diff options
context:
space:
mode:
authorFelix Fietkau <nbd@openwrt.org>2015-12-19 11:27:25 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-12-19 11:27:25 +0000
commiteef3b7acfb60f80a776e573113a9dc7a16294c67 (patch)
tree7cf5accf9907b841386954fd0c956e356b0a570a /target/linux/ar71xx/files
parent4cc541756d597b4180142ee02a83df23482d0c0d (diff)
downloadupstream-eef3b7acfb60f80a776e573113a9dc7a16294c67.tar.gz
upstream-eef3b7acfb60f80a776e573113a9dc7a16294c67.tar.bz2
upstream-eef3b7acfb60f80a776e573113a9dc7a16294c67.zip
ar71xx: Kernel board definition for PowerCloud CR3000
Kernel part of support for PowerCloud CR3000. The CR3000 is a 802.11n 2.4 GHz wireless router with 8MB flash, 64MB RAM, a four port fast ethernet switch, and a fast ethernet wan port which was sold by PowerCloud Systems as hardware for the Skydog cloud-managed router service. Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com> SVN-Revision: 47939
Diffstat (limited to 'target/linux/ar71xx/files')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt10
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Makefile1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-cr3000.c161
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/machtypes.h1
4 files changed, 173 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index 0d2d793633..815c0ebae9 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -923,6 +923,16 @@ config ATH79_MACH_CAP4200AG
select ATH79_DEV_M25P80
select ATH79_DEV_WMAC
+config ATH79_MACH_CR3000
+ bool "PowerCloud CR3000 support"
+ select SOC_AR934X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
config ATH79_MACH_MR1750
bool "OpenMesh MR1750 board support"
select SOC_QCA955X
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
index e2cbacdc22..082828f60e 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
@@ -63,6 +63,7 @@ obj-$(CONFIG_ATH79_MACH_CAP324) += mach-cap324.o
obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
+obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o
obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
obj-$(CONFIG_ATH79_MACH_DLAN_HOTSPOT) += mach-dlan-hotspot.o
obj-$(CONFIG_ATH79_MACH_DLAN_PRO_500_WP) += mach-dlan-pro-500-wp.o
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cr3000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cr3000.c
new file mode 100644
index 0000000000..b351ae59c5
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cr3000.c
@@ -0,0 +1,161 @@
+/*
+ * PowerCloud Systems CR3000 support
+ *
+ * Copyright (c) 2011 Qualcomm Atheros
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (c) 2012-2013 PowerCloud Systems
+ * Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/gpio.h>
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <asm/mach-ath79/ath79.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define CR3000_GPIO_LED_WLAN_2G 13
+#define CR3000_GPIO_LED_POWER_AMBER 15
+#define CR3000_GPIO_LED_WAN 18
+#define CR3000_GPIO_LED_LAN1 19
+#define CR3000_GPIO_LED_LAN2 20
+#define CR3000_GPIO_LED_LAN3 21
+#define CR3000_GPIO_LED_LAN4 22
+
+#define CR3000_GPIO_BTN_WPS 16
+#define CR3000_GPIO_BTN_RESET 17
+
+#define CR3000_KEYS_POLL_INTERVAL 20 /* msecs */
+#define CR3000_KEYS_DEBOUNCE_INTERVAL (3 * CR3000_KEYS_POLL_INTERVAL)
+
+#define CR3000_MAC0_OFFSET 0
+#define CR3000_MAC1_OFFSET 6
+#define CR3000_WMAC_CALDATA_OFFSET 0x1000
+#define CR3000_WMAC_MAC_OFFSET 0x1002
+#define CR3000_PCIE_CALDATA_OFFSET 0x5000
+
+static struct gpio_led cr3000_leds_gpio[] __initdata = {
+ {
+ .name = "pcs:amber:power",
+ .gpio = CR3000_GPIO_LED_POWER_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:blue:wlan",
+ .gpio = CR3000_GPIO_LED_WLAN_2G,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:blue:wan",
+ .gpio = CR3000_GPIO_LED_WAN,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:blue:lan1",
+ .gpio = CR3000_GPIO_LED_LAN1,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:blue:lan2",
+ .gpio = CR3000_GPIO_LED_LAN2,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:blue:lan3",
+ .gpio = CR3000_GPIO_LED_LAN3,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:blue:lan4",
+ .gpio = CR3000_GPIO_LED_LAN4,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button cr3000_gpio_keys[] __initdata = {
+ {
+ .desc = "WPS button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = CR3000_GPIO_BTN_WPS,
+ .active_low = 1,
+ },
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = CR3000_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static void __init cr3000_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cr3000_leds_gpio),
+ cr3000_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, CR3000_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(cr3000_gpio_keys),
+ cr3000_gpio_keys);
+
+ /* WLAN 2GHz onboard */
+ ath79_register_wmac(art + CR3000_WMAC_CALDATA_OFFSET, art + CR3000_WMAC_MAC_OFFSET);
+
+ ath79_register_mdio(1, 0x0);
+ ath79_register_mdio(0, 0x0);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
+
+ /* Lan 4-port switch attached to GMAC1 internal switch */
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + CR3000_MAC0_OFFSET, 0);
+
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_register_eth(1);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + CR3000_MAC1_OFFSET, 0);
+
+ /* WAN Fast Ethernet interface attached to GMAC0 */
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_switch_data.phy_poll_mask = BIT(0);
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_CR3000, "CR3000", "PowerCloud CR3000",
+ cr3000_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index f5f7ab551b..010e4b3d56 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -47,6 +47,7 @@ enum ath79_mach_type {
ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */
ATH79_MACH_CPE510, /* TP-LINK CPE510 */
+ ATH79_MACH_CR3000, /* PowerCloud CR3000 */
ATH79_MACH_DB120, /* Atheros DB120 reference board */
ATH79_MACH_PB44, /* Atheros PB44 reference board */
ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */