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authorFelix Fietkau <nbd@openwrt.org>2015-12-19 11:27:19 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-12-19 11:27:19 +0000
commit4cc541756d597b4180142ee02a83df23482d0c0d (patch)
treedabedd27cfdb32b3b92b6afebdbd1277bcc4f266 /target/linux/ar71xx/files
parentcaf3a14a3cbdb028013078c67fac3dcc03f1a93b (diff)
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ar71xx: Kernel board definition for PowerCloud CAP324
Kernel part of support for PowerCloud CAP324 Cloud AP. The CAP324 Cloud AP was a device sold by PowerCloud Systems as hardware for the CloudCommand service for 'cloud' based managment of large numbers access points. The CAP324 is a dual-band 802.11n wireless access point with 16MB flash and 128MB RAM and single gigabit ethernet port. It can be powered via PoE or a power adaptor. Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com> SVN-Revision: 47938
Diffstat (limited to 'target/linux/ar71xx/files')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt10
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/Makefile1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-cap324.c133
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/machtypes.h1
4 files changed, 145 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
index d619b3cf1e..0d2d793633 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt
@@ -903,6 +903,16 @@ config ATH79_MACH_RW2458N
select ATH79_DEV_M25P80
select ATH79_DEV_USB
+config ATH79_MACH_CAP324
+ bool "PowerCloud CAP324 support"
+ select SOC_AR934X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
config ATH79_MACH_CAP4200AG
bool "Senao CAP4200AG support"
select SOC_AR934X
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
index 9f67bd8bde..e2cbacdc22 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile
+++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o
obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o
obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)+= mach-bhu-bxu2000n2-a.o
obj-$(CONFIG_ATH79_MACH_BSB) += mach-bsb.o
+obj-$(CONFIG_ATH79_MACH_CAP324) += mach-cap324.o
obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o
obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cap324.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cap324.c
new file mode 100644
index 0000000000..2a6aed5b4c
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cap324.c
@@ -0,0 +1,133 @@
+/*
+ * PowerCloud Systems CAP324 board support
+ *
+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2012-2013 PowerCloud Systems
+ * Copyright (C) 2015 Daniel Dickinson
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define CAP324_GPIO_LED_POWER_GREEN 12
+#define CAP324_GPIO_LED_POWER_AMBER 13
+#define CAP324_GPIO_LED_LAN_GREEN 14
+#define CAP324_GPIO_LED_LAN_AMBER 15
+#define CAP324_GPIO_LED_WLAN_GREEN 18
+#define CAP324_GPIO_LED_WLAN_AMBER 19
+
+#define CAP324_GPIO_BTN_RESET 17
+
+#define CAP324_KEYS_POLL_INTERVAL 20 /* msecs */
+#define CAP324_KEYS_DEBOUNCE_INTERVAL (3 * CAP324_KEYS_POLL_INTERVAL)
+
+#define CAP324_MAC_OFFSET 0
+#define CAP324_WMAC_CALDATA_OFFSET 0x1000
+#define CAP324_PCIE_CALDATA_OFFSET 0x5000
+
+static struct gpio_led cap324_leds_gpio[] __initdata = {
+ {
+ .name = "pcs:green:power",
+ .gpio = CAP324_GPIO_LED_POWER_GREEN,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:amber:power",
+ .gpio = CAP324_GPIO_LED_POWER_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:green:lan",
+ .gpio = CAP324_GPIO_LED_LAN_GREEN,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:amber:lan",
+ .gpio = CAP324_GPIO_LED_LAN_AMBER,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:green:wlan",
+ .gpio = CAP324_GPIO_LED_WLAN_GREEN,
+ .active_low = 1,
+ },
+ {
+ .name = "pcs:amber:wlan",
+ .gpio = CAP324_GPIO_LED_WLAN_AMBER,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button cap324_gpio_keys[] __initdata = {
+ {
+ .desc = "Reset button",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = CAP324_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = CAP324_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static void __init cap324_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 mac[6];
+
+ ath79_gpio_output_select(CAP324_GPIO_LED_LAN_GREEN,
+ AR934X_GPIO_OUT_GPIO);
+ ath79_gpio_output_select(CAP324_GPIO_LED_LAN_AMBER,
+ AR934X_GPIO_OUT_GPIO);
+
+ ath79_register_m25p80(NULL);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cap324_leds_gpio),
+ cap324_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, CAP324_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(cap324_gpio_keys),
+ cap324_gpio_keys);
+
+ ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -1);
+ ath79_wmac_disable_2ghz();
+ ath79_register_wmac(art + CAP324_WMAC_CALDATA_OFFSET, mac);
+
+ ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -2);
+ ap91_pci_init(art + CAP324_PCIE_CALDATA_OFFSET, mac);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
+ AR934X_ETH_CFG_SW_ONLY_MODE);
+
+ ath79_register_mdio(0, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr,
+ art + CAP324_MAC_OFFSET, -2);
+
+ /* GMAC0 is connected to an external PHY */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
+ ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_CAP324, "CAP324", "PowerCloud CAP324",
+ cap324_setup);
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
index fc3eeaf838..f5f7ab551b 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
+++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h
@@ -42,6 +42,7 @@ enum ath79_mach_type {
ATH79_MACH_AW_NR580, /* AzureWave AW-NR580 */
ATH79_MACH_BHU_BXU2000N2_A1, /* BHU BXU2000n-2 A1 */
ATH79_MACH_BSB, /* Smart Electronics Black Swift board */
+ ATH79_MACH_CAP324, /* PowerCloud CAP324 */
ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */
ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */