aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ar71xx/files
diff options
context:
space:
mode:
authorJohn Crispin <blogic@openwrt.org>2015-03-17 09:43:19 +0000
committerJohn Crispin <blogic@openwrt.org>2015-03-17 09:43:19 +0000
commit2f69dbc6693d3ee83a30f2e68dd6b7fb53da626a (patch)
tree9ae09d3a0f626898be04745e66d7c05dad909665 /target/linux/ar71xx/files
parentefedd48f33eb9c8068009c5cf883ba3c93e87b10 (diff)
downloadupstream-2f69dbc6693d3ee83a30f2e68dd6b7fb53da626a.tar.gz
upstream-2f69dbc6693d3ee83a30f2e68dd6b7fb53da626a.tar.bz2
upstream-2f69dbc6693d3ee83a30f2e68dd6b7fb53da626a.zip
ar71xx: add kernel support for the OpenMesh OM5P-AN board
Signed-off-by: Sven Eckelmann <sven@open-mesh.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44861 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c77
1 files changed, 77 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
index c1cfa18098..7f1d811758 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c
@@ -2,6 +2,7 @@
* OpenMesh OM5P support
*
* Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
+ * Copyright (C) 2014 Sven Eckelmann <sven@open-mesh.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
@@ -12,6 +13,9 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+#include <linux/i2c-gpio.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
@@ -32,11 +36,14 @@
#define OM5P_GPIO_LED_LAN 14
#define OM5P_GPIO_LED_WAN 15
#define OM5P_GPIO_BTN_RESET 4
+#define OM5P_GPIO_I2C_SCL 20
+#define OM5P_GPIO_I2C_SDA 21
#define OM5P_KEYS_POLL_INTERVAL 20 /* msecs */
#define OM5P_KEYS_DEBOUNCE_INTERVAL (3 * OM5P_KEYS_POLL_INTERVAL)
#define OM5P_WMAC_CALDATA_OFFSET 0x1000
+#define OM5P_PCI_CALDATA_OFFSET 0x5000
static struct gpio_led om5p_leds_gpio[] __initdata = {
{
@@ -120,3 +127,73 @@ static void __init om5p_setup(void)
}
MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup);
+
+static struct i2c_gpio_platform_data om5pan_i2c_device_platdata = {
+ .sda_pin = OM5P_GPIO_I2C_SDA,
+ .scl_pin = OM5P_GPIO_I2C_SCL,
+ .udelay = 10,
+ .sda_is_open_drain = 1,
+ .scl_is_open_drain = 1,
+};
+
+static struct platform_device om5pan_i2c_device = {
+ .name = "i2c-gpio",
+ .id = 0,
+ .dev = {
+ .platform_data = &om5pan_i2c_device_platdata,
+ },
+};
+
+static struct i2c_board_info om5pan_i2c_devs[] __initdata = {
+ {
+ I2C_BOARD_INFO("tmp423", 0x4c),
+ },
+};
+
+static void __init om5p_an_setup(void)
+{
+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
+ u8 mac[6];
+
+ /* temperature sensor */
+ platform_device_register(&om5pan_i2c_device);
+ i2c_register_board_info(0, om5pan_i2c_devs,
+ ARRAY_SIZE(om5pan_i2c_devs));
+
+ /* make lan / wan leds software controllable */
+ ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
+ ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
+
+ ath79_register_m25p80(&om5p_flash_data);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio),
+ om5p_leds_gpio);
+
+ ath79_init_mac(mac, art, 0x02);
+ ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
+ ath79_register_mdio(0, 0x0);
+ ath79_register_mdio(1, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
+
+ /* GMAC0 is connected to the PHY7 */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+ ath79_eth0_data.phy_mask = BIT(7);
+ ath79_eth0_pll_data.pll_1000 = 0x1a000000;
+ ath79_eth0_pll_data.pll_100 = 0x00000101;
+ ath79_eth0_pll_data.pll_10 = 0x00001313;
+ ath79_register_eth(0);
+
+ /* GMAC1 is connected to the internal switch */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev;
+ ath79_register_eth(1);
+
+ ath79_init_mac(mac, art, 0x10);
+ ap91_pci_init(art + OM5P_PCI_CALDATA_OFFSET, mac);
+}
+
+MIPS_MACHINE(ATH79_MACH_OM5P_AN, "OM5P-AN", "OpenMesh OM5P AN", om5p_an_setup);