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author | Gabor Juhos <juhosg@openwrt.org> | 2010-03-08 12:09:49 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2010-03-08 12:09:49 +0000 |
commit | a1a9727fbfa4709e5c3c01d8129f0bd35e74a5b4 (patch) | |
tree | baa1ac5dce1e8d2a7feeab126c5ef75e41eba04a /target/linux/ar71xx/files/arch | |
parent | 74f9af4c10669f9ad46c47e4a0fa966aaada65ea (diff) | |
download | upstream-a1a9727fbfa4709e5c3c01d8129f0bd35e74a5b4.tar.gz upstream-a1a9727fbfa4709e5c3c01d8129f0bd35e74a5b4.tar.bz2 upstream-a1a9727fbfa4709e5c3c01d8129f0bd35e74a5b4.zip |
ar71xx: add latch handling code for the RB750
SVN-Revision: 20050
Diffstat (limited to 'target/linux/ar71xx/files/arch')
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c | 50 | ||||
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h | 54 |
2 files changed, 104 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c index dd481d9eb9..06f48328e4 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c @@ -9,10 +9,60 @@ */ #include <asm/mach-ar71xx/ar71xx.h> +#include <asm/mach-ar71xx/mach-rb750.h> #include "machtype.h" #include "dev-ap91-eth.h" +int rb750_latch_change(u32 mask_clr, u32 mask_set) +{ + static DEFINE_SPINLOCK(lock); + static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; + static u32 latch_oe; + static u32 latch_clr; + unsigned long flags; + u32 t; + int ret = 0; + + spin_lock_irqsave(&lock, flags); + + if ((mask_clr & BIT(31)) != 0 && + (latch_set & RB750_LVC573_LE) == 0) { + goto unlock; + } + + latch_set = (latch_set | mask_set) & ~mask_clr; + latch_clr = (latch_clr | mask_clr) & ~mask_set; + + if (latch_oe == 0) + latch_oe = __raw_readl(ar71xx_gpio_base + GPIO_REG_OE); + + if (likely(latch_set & RB750_LVC573_LE)) { + void __iomem *base = ar71xx_gpio_base; + + t = __raw_readl(base + GPIO_REG_OE); + t |= mask_clr | latch_oe | mask_set; + + __raw_writel(t, base + GPIO_REG_OE); + __raw_writel(latch_clr, base + GPIO_REG_CLEAR); + __raw_writel(latch_set, base + GPIO_REG_SET); + } else if (mask_clr & RB750_LVC573_LE) { + void __iomem *base = ar71xx_gpio_base; + + latch_oe = __raw_readl(base + GPIO_REG_OE); + __raw_writel(RB750_LVC573_LE, base + GPIO_REG_CLEAR); + /* flush write */ + __raw_readl(base + GPIO_REG_CLEAR); + } + + ret = 1; + + unlock: + spin_unlock_irqrestore(&lock, flags); + return ret; +} +EXPORT_SYMBOL_GPL(rb750_latch_change); + static void __init rb750_setup(void) { ap91_eth_init(NULL); diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h new file mode 100644 index 0000000000..8165da3e61 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/mach-rb750.h @@ -0,0 +1,54 @@ +/* + * MikroTik RouterBOARD 750 definitions + * + * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ +#ifndef _MACH_RB750_H +#define _MACH_RB750_H + +#include <linux/bitops.h> + +#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ +#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ +#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ +#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ +#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ +#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ +#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ +#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ +#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ +#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ +#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ +#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ +#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ +#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ +#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ + +#define RB750_GPIO_BTN_RESET 1 +#define RB750_GPIO_SPI_CS0 2 +#define RB750_GPIO_LED_ACT 12 +#define RB750_GPIO_LED_PORT1 13 +#define RB750_GPIO_LED_PORT2 14 +#define RB750_GPIO_LED_PORT3 15 +#define RB750_GPIO_LED_PORT4 16 +#define RB750_GPIO_LED_PORT5 17 + +#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) +#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) +#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) +#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) +#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) +#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) + +#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) + +#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ + RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) + +int rb750_latch_change(u32 mask_clr, u32 mask_set); + +#endif /* _MACH_RB750_H */
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