diff options
author | Henryk Heisig <hyniu@o2.pl> | 2016-12-27 22:41:41 +0100 |
---|---|---|
committer | Jo-Philipp Wich <jo@mein.io> | 2017-01-26 11:38:21 +0100 |
commit | e39dc8d823c86559eedbbdcee5f5c14b827fed0f (patch) | |
tree | 1def1853ca9397a0ab683f1918be9c326a647ed1 /target/linux/ar71xx/files/arch/mips | |
parent | eec0c413759d360775df7419dec1bf46f6b63483 (diff) | |
download | upstream-e39dc8d823c86559eedbbdcee5f5c14b827fed0f.tar.gz upstream-e39dc8d823c86559eedbbdcee5f5c14b827fed0f.tar.bz2 upstream-e39dc8d823c86559eedbbdcee5f5c14b827fed0f.zip |
ar71xx: add support to TP-Link Archer C59v1 and C60v1
TP-Link Archer C59v1 is a dual-band AC1350 router, based on Qualcomm/Atheros
QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- 8x LED (controled by 74HC595), 3x button
- UART header on PCB
TP-Link Archer C60v1 is a dual-band AC1350 router, based on Qualcomm/Atheros
QCA9561+QCA9886.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 8 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB
Currently not working:
- Port LAN1 on C59, LAN4 on C60
- WiFi 5GHz (missing ath10k firmware for QCA9886 chip)
- Update from oficial web interface ( tplink-saveloader not support "product-info")
Flash instruction:
1. Set PC to fixed ip address 192.168.0.66
2. Download lede-ar71xx-generic-archer-cXX-v1-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Flash instruction under U-Boot, using UART:
1. tftp 0x81000000 lede-ar71xx-...-sysupgrade.bin
2. erase 0x9f020000 +$filesize
3. cp.b $fileaddr 0x9f020000 $filesize
4. reset
Signed-off-by: Henryk Heisig <hyniu@o2.pl>
[Jo-Philipp Wich: remove duplicate ATH79_MACH_ARCHER_C59/C60_V1 entries]
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips')
5 files changed, 383 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index c3f958869e..d06ae48161 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -1255,6 +1255,27 @@ config ATH79_MACH_BSB select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_ARCHER_C59_V1 + bool "TP-LINK Archer C59 v1 support" + select SOC_QCA956X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + +config ATH79_MACH_ARCHER_C60_V1 + bool "TP-LINK Archer C60 v1 support" + select SOC_QCA956X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_ARCHER_C7 bool "TP-LINK Archer C5/C7/TL-WDR4900 v2 board support" select SOC_QCA955X diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile index ac0bbc46bf..e9d69a4d01 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile +++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile @@ -54,6 +54,8 @@ obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o obj-$(CONFIG_ATH79_MACH_AP90Q) += mach-ap90q.o obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o +obj-$(CONFIG_ATH79_MACH_ARCHER_C59_V1) += mach-archer-c59-v1.o +obj-$(CONFIG_ATH79_MACH_ARCHER_C60_V1) += mach-archer-c60-v1.o obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o obj-$(CONFIG_ATH79_MACH_ARDUINO_YUN) += mach-arduino-yun.o obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c new file mode 100644 index 0000000000..28353aa77b --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c59-v1.c @@ -0,0 +1,223 @@ +/* + * TP-Link Archer C59 v1 board support + * + * Copyright (C) 2016 Henryk Heisig <hyniu@o2.pl> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ +#include <linux/platform_device.h> +#include <linux/ath9k_platform.h> +#include <linux/ar8216_platform.h> +#include <asm/mach-ath79/ar71xx_regs.h> +#include <linux/gpio.h> +#include <linux/init.h> +#include <linux/spi/spi_gpio.h> +#include <linux/spi/74x164.h> + +#include "common.h" +#include "dev-m25p80.h" +#include "machtypes.h" +#include "pci.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "dev-wmac.h" + +#define ARCHER_C59_V1_KEYS_POLL_INTERVAL 20 +#define ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C59_V1_KEYS_POLL_INTERVAL) + +#define ARCHER_C59_V1_GPIO_BTN_RESET 21 +#define ARCHER_C59_V1_GPIO_BTN_RFKILL 2 +#define ARCHER_C59_V1_GPIO_BTN_WPS 1 + +#define ARCHER_C59_V1_GPIO_USB_POWER 22 + +#define ARCHER_C59_GPIO_SHIFT_OE 16 +#define ARCHER_C59_GPIO_SHIFT_SER 17 +#define ARCHER_C59_GPIO_SHIFT_SRCLK 18 +#define ARCHER_C59_GPIO_SHIFT_SRCLR 19 +#define ARCHER_C59_GPIO_SHIFT_RCLK 20 + +#define ARCHER_C59_74HC_GPIO_BASE QCA956X_GPIO_COUNT +#define ARCHER_C59_74HC_GPIO_LED_POWER 23 +#define ARCHER_C59_74HC_GPIO_LED_WLAN2 24 +#define ARCHER_C59_74HC_GPIO_LED_WLAN5 25 +#define ARCHER_C59_74HC_GPIO_LED_LAN 26 +#define ARCHER_C59_74HC_GPIO_LED_WAN_GREEN 27 +#define ARCHER_C59_74HC_GPIO_LED_WAN_AMBER 28 +#define ARCHER_C59_74HC_GPIO_LED_WPS 29 +#define ARCHER_C59_74HC_GPIO_LED_USB 30 + +#define ARCHER_C59_V1_SSR_BIT_0 0 +#define ARCHER_C59_V1_SSR_BIT_1 1 +#define ARCHER_C59_V1_SSR_BIT_2 2 +#define ARCHER_C59_V1_SSR_BIT_3 3 +#define ARCHER_C59_V1_SSR_BIT_4 4 +#define ARCHER_C59_V1_SSR_BIT_5 5 +#define ARCHER_C59_V1_SSR_BIT_6 6 +#define ARCHER_C59_V1_SSR_BIT_7 7 + +#define ARCHER_C59_V1_WMAC_CALDATA_OFFSET 0x1000 +#define ARCHER_C59_V1_PCI_CALDATA_OFFSET 0x5000 + +static struct gpio_led archer_c59_v1_leds_gpio[] __initdata = { + { + .name = "archer-c59-v1:green:power", + .gpio = ARCHER_C59_74HC_GPIO_LED_POWER, + .active_low = 1, + }, + { + .name = "archer-c59-v1:green:wlan2g", + .gpio = ARCHER_C59_74HC_GPIO_LED_WLAN2, + .active_low = 1, + }, + { + .name = "archer-c59-v1:green:wlan5g", + .gpio = ARCHER_C59_74HC_GPIO_LED_WLAN5, + .active_low = 1, + }, + { + .name = "archer-c59-v1:green:lan", + .gpio = ARCHER_C59_74HC_GPIO_LED_LAN, + .active_low = 1, + }, + { + .name = "archer-c59-v1:green:wan", + .gpio = ARCHER_C59_74HC_GPIO_LED_WAN_GREEN, + .active_low = 1, + }, + { + .name = "archer-c59-v1:amber:wan", + .gpio = ARCHER_C59_74HC_GPIO_LED_WAN_AMBER, + .active_low = 1, + }, + { + .name = "archer-c59-v1:green:wps", + .gpio = ARCHER_C59_74HC_GPIO_LED_WPS, + .active_low = 1, + }, + { + .name = "archer-c59-v1:green:usb", + .gpio = ARCHER_C59_74HC_GPIO_LED_USB, + .active_low = 1, + }, +}; + +static struct gpio_keys_button archer_c59_v1_gpio_keys[] __initdata = { + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = ARCHER_C59_V1_GPIO_BTN_RESET, + .active_low = 1, + }, + { + .desc = "RFKILL button", + .type = EV_KEY, + .code = KEY_RFKILL, + .debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = ARCHER_C59_V1_GPIO_BTN_RFKILL, + .active_low = 1, + }, + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = ARCHER_C59_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = ARCHER_C59_V1_GPIO_BTN_WPS, + .active_low = 1, + }, +}; + +static struct spi_gpio_platform_data archer_c59_v1_spi_data = { + .sck = ARCHER_C59_GPIO_SHIFT_SRCLK, + .miso = SPI_GPIO_NO_MISO, + .mosi = ARCHER_C59_GPIO_SHIFT_SER, + .num_chipselect = 1, +}; + +static u8 archer_c59_v1_ssr_initdata[] __initdata = { + BIT(ARCHER_C59_V1_SSR_BIT_7) | + BIT(ARCHER_C59_V1_SSR_BIT_6) | + BIT(ARCHER_C59_V1_SSR_BIT_5) | + BIT(ARCHER_C59_V1_SSR_BIT_4) | + BIT(ARCHER_C59_V1_SSR_BIT_3) | + BIT(ARCHER_C59_V1_SSR_BIT_2) | + BIT(ARCHER_C59_V1_SSR_BIT_1) +}; + +static struct gen_74x164_chip_platform_data archer_c59_v1_ssr_data = { + .base = ARCHER_C59_74HC_GPIO_BASE, + .num_registers = ARRAY_SIZE(archer_c59_v1_ssr_initdata), + .init_data = archer_c59_v1_ssr_initdata, +}; + +static struct platform_device archer_c59_v1_spi_device = { + .name = "spi_gpio", + .id = 1, + .dev = { + .platform_data = &archer_c59_v1_spi_data, + }, +}; + +static struct spi_board_info archer_c59_v1_spi_info[] = { + { + .bus_num = 1, + .chip_select = 0, + .max_speed_hz = 10000000, + .modalias = "74x164", + .platform_data = &archer_c59_v1_ssr_data, + .controller_data = (void *) ARCHER_C59_GPIO_SHIFT_RCLK, + }, +}; + +static void __init archer_c59_v1_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f010008); + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + spi_register_board_info(archer_c59_v1_spi_info, + ARRAY_SIZE(archer_c59_v1_spi_info)); + platform_device_register(&archer_c59_v1_spi_device); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c59_v1_leds_gpio), + archer_c59_v1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ARCHER_C59_V1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(archer_c59_v1_gpio_keys), + archer_c59_v1_gpio_keys); + + ath79_register_mdio(1, 0x0); + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_mask = BIT(4); + ath79_register_eth(1); + + ath79_register_wmac(art + ARCHER_C59_V1_WMAC_CALDATA_OFFSET, mac); + ap91_pci_init(art + ARCHER_C59_V1_PCI_CALDATA_OFFSET, NULL); + + + ath79_register_usb(); + gpio_request_one(ARCHER_C59_V1_GPIO_USB_POWER, + GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, + "USB power"); + gpio_request_one(ARCHER_C59_GPIO_SHIFT_OE, + GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, + "LED control"); + gpio_request_one(ARCHER_C59_GPIO_SHIFT_SRCLR, + GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, + "LED reset"); +} + +MIPS_MACHINE(ATH79_MACH_ARCHER_C59_V1, "ARCHER-C59-V1", + "TP-LINK Archer C59 v1", archer_c59_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c new file mode 100644 index 0000000000..78186f02cd --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c @@ -0,0 +1,135 @@ +/* + * TP-Link Archer C60 v1 board support + * + * Copyright (C) 2016 Henryk Heisig <hyniu@o2.pl> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ +#include <linux/platform_device.h> +#include <linux/ath9k_platform.h> +#include <linux/ar8216_platform.h> +#include <asm/mach-ath79/ar71xx_regs.h> +#include <linux/gpio.h> + +#include "common.h" +#include "dev-m25p80.h" +#include "machtypes.h" +#include "pci.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "dev-wmac.h" + +#define ARCHER_C60_V1_GPIO_LED_LAN 2 +#define ARCHER_C60_V1_GPIO_LED_POWER 16 +#define ARCHER_C60_V1_GPIO_LED_WLAN2 17 +#define ARCHER_C60_V1_GPIO_LED_WLAN5 18 +#define ARCHER_C60_V1_GPIO_LED_WPS 19 +#define ARCHER_C60_V1_GPIO_LED_WAN_GREEN 20 +#define ARCHER_C60_V1_GPIO_LED_WAN_AMBER 22 + + +#define ARCHER_C60_V1_KEYS_POLL_INTERVAL 20 +#define ARCHER_C60_V1_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C60_V1_KEYS_POLL_INTERVAL) + +#define ARCHER_C60_V1_GPIO_BTN_RESET 21 +#define ARCHER_C60_V1_GPIO_BTN_RFKILL 1 + + + +#define ARCHER_C60_V1_WMAC_CALDATA_OFFSET 0x1000 +#define ARCHER_C60_V1_PCI_CALDATA_OFFSET 0x5000 + +static struct gpio_led archer_c60_v1_leds_gpio[] __initdata = { + { + .name = "archer-c60-v1:green:power", + .gpio = ARCHER_C60_V1_GPIO_LED_POWER, + .active_low = 1, + }, + { + .name = "archer-c60-v1:green:wlan2g", + .gpio = ARCHER_C60_V1_GPIO_LED_WLAN2, + .active_low = 1, + }, + { + .name = "archer-c60-v1:green:wlan5g", + .gpio = ARCHER_C60_V1_GPIO_LED_WLAN5, + .active_low = 1, + }, + { + .name = "archer-c60-v1:green:lan", + .gpio = ARCHER_C60_V1_GPIO_LED_LAN, + .active_low = 1, + }, + { + .name = "archer-c60-v1:green:wan", + .gpio = ARCHER_C60_V1_GPIO_LED_WAN_GREEN, + .active_low = 1, + }, + { + .name = "archer-c60-v1:amber:wan", + .gpio = ARCHER_C60_V1_GPIO_LED_WAN_AMBER, + .active_low = 1, + }, + { + .name = "archer-c60-v1:green:wps", + .gpio = ARCHER_C60_V1_GPIO_LED_WPS, + .active_low = 1, + }, +}; + +static struct gpio_keys_button archer_c60_v1_gpio_keys[] __initdata = { + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ARCHER_C60_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = ARCHER_C60_V1_GPIO_BTN_RESET, + .active_low = 1, + }, + { + .desc = "RFKILL button", + .type = EV_KEY, + .code = KEY_RFKILL, + .debounce_interval = ARCHER_C60_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = ARCHER_C60_V1_GPIO_BTN_RFKILL, + .active_low = 1, + }, +}; + +static void __init archer_c60_v1_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f010008); + u8 *art = (u8 *) KSEG1ADDR(0x1f7f0000); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c60_v1_leds_gpio), + archer_c60_v1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ARCHER_C60_V1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(archer_c60_v1_gpio_keys), + archer_c60_v1_gpio_keys); + + ath79_setup_qca956x_eth_cfg(QCA956X_ETH_CFG_SW_PHY_SWAP | + QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP); + ath79_register_mdio(1, 0x0); + + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_register_eth(1); + + ath79_register_wmac(art + ARCHER_C60_V1_WMAC_CALDATA_OFFSET, mac); + ap91_pci_init(art + ARCHER_C60_V1_PCI_CALDATA_OFFSET, NULL); +} + +MIPS_MACHINE(ATH79_MACH_ARCHER_C60_V1, "ARCHER-C60-V1", + "TP-LINK Archer C60 v1", archer_c60_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h index 857d0eee89..12e81dbe5b 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h @@ -38,6 +38,8 @@ enum ath79_mach_type { ATH79_MACH_AP90Q, /* YunCore AP90Q */ ATH79_MACH_AP96, /* Atheros AP96 */ ATH79_MACH_ARCHER_C5, /* TP-LINK Archer C5 board */ + ATH79_MACH_ARCHER_C59_V1, /* TP-LINK Archer C59 V1 board */ + ATH79_MACH_ARCHER_C60_V1, /* TP-LINK Archer C60 V1 board */ ATH79_MACH_ARCHER_C7, /* TP-LINK Archer C7 board */ ATH79_MACH_ARCHER_C7_V2, /* TP-LINK Archer C7 V2 board */ ATH79_MACH_ARDUINO_YUN, /* Yun */ |