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authorGabor Juhos <juhosg@openwrt.org>2014-07-13 19:44:00 +0000
committerGabor Juhos <juhosg@openwrt.org>2014-07-13 19:44:00 +0000
commit26b39cc580150ec8d677f9f16498f63b81cd0197 (patch)
tree20a0227f2f368f0340b96f035a9d0c4f1c85f3c2 /target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
parentc4c25e741ed4a89822182991acb37e68d685b79f (diff)
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ar71xx: use ath79_setup_qca955x_eth_cfg helper for QCA955x based boards
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 41627
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c19
1 files changed, 1 insertions, 18 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
index dc5034114f..01719eb5b5 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
@@ -182,23 +182,6 @@ static struct mdio_board_info archer_c7_mdio0_info[] = {
},
};
-static void __init archer_c7_gmac_setup(void)
-{
- void __iomem *base;
- u32 t;
-
- base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
-
- t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
-
- t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
- t |= QCA955X_ETH_CFG_RGMII_EN;
-
- __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
-
- iounmap(base);
-}
-
static void __init common_setup(bool pcie_slot)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
@@ -227,7 +210,7 @@ static void __init common_setup(bool pcie_slot)
ARRAY_SIZE(archer_c7_mdio0_info));
ath79_register_mdio(0, 0x0);
- archer_c7_gmac_setup();
+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;