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authorPaul Wassi <p.wassi@gmx.at>2019-01-04 22:38:17 +0100
committerChristian Lamparter <chunkeey@gmail.com>2019-02-14 16:56:14 +0100
commit78277ec162b06e859923936ee00d02920b4ccc6f (patch)
tree215a8e67e1c44da757cf6c0e594115aec2d93fe6 /target/linux/ar71xx/base-files/etc
parent341311f319b18b74d1d112709830979ceab11f67 (diff)
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ar71xx: fix TL-MR3220-v2 switch port order
Fix the switch port order for proper display on high level interfaces. Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Diffstat (limited to 'target/linux/ar71xx/base-files/etc')
-rwxr-xr-xtarget/linux/ar71xx/base-files/etc/board.d/02_network2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ar71xx/base-files/etc/board.d/02_network b/target/linux/ar71xx/base-files/etc/board.d/02_network
index b761c7c920..13dfd2b000 100755
--- a/target/linux/ar71xx/base-files/etc/board.d/02_network
+++ b/target/linux/ar71xx/base-files/etc/board.d/02_network
@@ -41,7 +41,6 @@ ar71xx_setup_interfaces()
tew-712br|\
tew-732br|\
tl-mr3220|\
- tl-mr3220-v2|\
tl-mr3420|\
tl-wdr3320-v2|\
tl-wdr3500|\
@@ -520,6 +519,7 @@ ar71xx_setup_interfaces()
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9@eth0"
;;
+ tl-mr3220-v2|\
tl-wr741nd-v4)
ucidef_set_interfaces_lan_wan "eth0.1" "eth1"
ucidef_add_switch "switch0" \