diff options
author | Florian Fainelli <florian@openwrt.org> | 2009-06-01 08:11:37 +0000 |
---|---|---|
committer | Florian Fainelli <florian@openwrt.org> | 2009-06-01 08:11:37 +0000 |
commit | d674bc59e08a2b0d06521795ac460ae56a3df990 (patch) | |
tree | b842317adc94123568ad36ecbceacd07004e3517 /target/linux/ar7/patches/500-serial_kludge.patch | |
parent | 731cbb47760624de01046355843c6b8f08dc612a (diff) | |
download | upstream-d674bc59e08a2b0d06521795ac460ae56a3df990.tar.gz upstream-d674bc59e08a2b0d06521795ac460ae56a3df990.tar.bz2 upstream-d674bc59e08a2b0d06521795ac460ae56a3df990.zip |
[ar7] add experimental 2.6.30 support, boot tested
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16242 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/patches/500-serial_kludge.patch')
-rw-r--r-- | target/linux/ar7/patches/500-serial_kludge.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/ar7/patches/500-serial_kludge.patch b/target/linux/ar7/patches/500-serial_kludge.patch new file mode 100644 index 0000000000..cc4e424ec3 --- /dev/null +++ b/target/linux/ar7/patches/500-serial_kludge.patch @@ -0,0 +1,40 @@ +--- a/drivers/serial/8250.c ++++ b/drivers/serial/8250.c +@@ -286,6 +286,13 @@ static const struct serial8250_config ua + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .flags = UART_CAP_FIFO, + }, ++ [PORT_AR7] = { ++ .name = "TI-AR7", ++ .fifo_size = 16, ++ .tx_loadsz = 16, ++ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, ++ .flags = UART_CAP_FIFO | UART_CAP_AFE, ++ }, + }; + + #if defined (CONFIG_SERIAL_8250_AU1X00) +@@ -2687,7 +2694,11 @@ static void serial8250_console_putchar(s + { + struct uart_8250_port *up = (struct uart_8250_port *)port; + ++#ifdef CONFIG_AR7 ++ wait_for_xmitr(up, BOTH_EMPTY); ++#else + wait_for_xmitr(up, UART_LSR_THRE); ++#endif + serial_out(up, UART_TX, ch); + } + +--- a/include/linux/serial_core.h ++++ b/include/linux/serial_core.h +@@ -41,7 +41,8 @@ + #define PORT_XSCALE 15 + #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ + #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ +-#define PORT_MAX_8250 17 /* max port ID */ ++#define PORT_AR7 18 /* TI AR7 internal UART */ ++#define PORT_MAX_8250 18 /* max port ID */ + + /* + * ARM specific type numbers. These are not currently guaranteed |