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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-05-05 17:32:39 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-05-05 17:32:39 +0000 |
| commit | dd884a6b738a85c9db305c17fe5fedd1710f9d23 (patch) | |
| tree | da17012ec0c7a1373ae10ef9951403c463d04cfb /target/linux/ar7/patches-3.3/950-cpmac_titan.patch | |
| parent | e85a44f11ba3d975789e1b8c8032b7d5197052c0 (diff) | |
| download | upstream-dd884a6b738a85c9db305c17fe5fedd1710f9d23.tar.gz upstream-dd884a6b738a85c9db305c17fe5fedd1710f9d23.tar.bz2 upstream-dd884a6b738a85c9db305c17fe5fedd1710f9d23.zip | |
ar7: add 3.3 support
SVN-Revision: 31615
Diffstat (limited to 'target/linux/ar7/patches-3.3/950-cpmac_titan.patch')
| -rw-r--r-- | target/linux/ar7/patches-3.3/950-cpmac_titan.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/target/linux/ar7/patches-3.3/950-cpmac_titan.patch b/target/linux/ar7/patches-3.3/950-cpmac_titan.patch new file mode 100644 index 0000000000..a829e4e8c4 --- /dev/null +++ b/target/linux/ar7/patches-3.3/950-cpmac_titan.patch @@ -0,0 +1,52 @@ +--- a/drivers/net/ethernet/ti/cpmac.c ++++ b/drivers/net/ethernet/ti/cpmac.c +@@ -1159,6 +1159,8 @@ static int __devinit cpmac_probe(struct + goto fail; + } + ++ ar7_device_reset(pdata->reset_bit); ++ + dev->irq = platform_get_irq_byname(pdev, "irq"); + + dev->netdev_ops = &cpmac_netdev_ops; +@@ -1237,7 +1239,7 @@ int __devinit cpmac_init(void) + cpmac_mii->reset = cpmac_mdio_reset; + cpmac_mii->irq = mii_irqs; + +- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256); ++ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256); + + if (!cpmac_mii->priv) { + printk(KERN_ERR "Can't ioremap mdio registers\n"); +@@ -1248,10 +1250,16 @@ int __devinit cpmac_init(void) + #warning FIXME: unhardcode gpio&reset bits + ar7_gpio_disable(26); + ar7_gpio_disable(27); +- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO); +- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI); ++ ++ if (!ar7_is_titan()) { ++ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO); ++ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI); ++ } + ar7_device_reset(AR7_RESET_BIT_EPHY); + ++ if (ar7_is_titan()) ++ ar7_device_reset(TITAN_RESET_BIT_EPHY1); ++ + cpmac_mii->reset(cpmac_mii); + + for (i = 0; i < 300; i++) { +@@ -1268,7 +1276,11 @@ int __devinit cpmac_init(void) + mask = 0; + } + +- cpmac_mii->phy_mask = ~(mask | 0x80000000); ++ if (ar7_is_titan()) ++ cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000); ++ else ++ cpmac_mii->phy_mask = ~(mask | 0x80000000); ++ + snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "cpmac-1"); + + res = mdiobus_register(cpmac_mii); |