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| author | John Crispin <blogic@openwrt.org> | 2015-02-09 12:12:30 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2015-02-09 12:12:30 +0000 |
| commit | 90a6b535b3652ed7b60c1d5d66ebf96db694b85b (patch) | |
| tree | 3cb4334f0d195dd458acebf7c05104deeadb7f27 /target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch | |
| parent | face9b819a6d844d9671e977ce074a0923b6f6b0 (diff) | |
| download | upstream-90a6b535b3652ed7b60c1d5d66ebf96db694b85b.tar.gz upstream-90a6b535b3652ed7b60c1d5d66ebf96db694b85b.tar.bz2 upstream-90a6b535b3652ed7b60c1d5d66ebf96db694b85b.zip | |
ar7: add 3.18 support
this is only compile tested
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44344 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch')
| -rw-r--r-- | target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch b/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch new file mode 100644 index 0000000000..6896352266 --- /dev/null +++ b/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch @@ -0,0 +1,23 @@ +From 443ab715a40881d6c9ba11b027ba154bac904cb0 Mon Sep 17 00:00:00 2001 +From: Oswald Buddenhagen <oswald.buddenhagen@gmx.de> +Date: Sat, 10 May 2014 23:19:08 +0200 +Subject: [PATCH] MIPS/AR7: ensure that serial ports are properly set up + +without UPF_FIXED_TYPE, the data from the PORT_AR7 uart_config entry is +never copied, resulting in a dead port. + +Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de> +--- + arch/mips/ar7/platform.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/mips/ar7/platform.c ++++ b/arch/mips/ar7/platform.c +@@ -581,6 +581,7 @@ static int __init ar7_register_uarts(voi + uart_port.type = PORT_AR7; + uart_port.uartclk = clk_get_rate(bus_clk) / 2; + uart_port.iotype = UPIO_MEM32; ++ uart_port.flags = UPF_FIXED_TYPE; + uart_port.regshift = 2; + + uart_port.line = 0; |