diff options
| author | Florian Fainelli <florian@openwrt.org> | 2010-03-26 10:12:54 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2010-03-26 10:12:54 +0000 |
| commit | 5cbc43005c6c18945b9f135c8852fe7d71a329fe (patch) | |
| tree | c45400aa604a27626d6f747c22b5480a4617921f /target/linux/ar7/patches-2.6.30/500-serial_kludge.patch | |
| parent | 10d4e5b4b0b99def37c31ac574d4bc7cf238dfa9 (diff) | |
| download | upstream-5cbc43005c6c18945b9f135c8852fe7d71a329fe.tar.gz upstream-5cbc43005c6c18945b9f135c8852fe7d71a329fe.tar.bz2 upstream-5cbc43005c6c18945b9f135c8852fe7d71a329fe.zip | |
drop support for 2.6.30
SVN-Revision: 20439
Diffstat (limited to 'target/linux/ar7/patches-2.6.30/500-serial_kludge.patch')
| -rw-r--r-- | target/linux/ar7/patches-2.6.30/500-serial_kludge.patch | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/target/linux/ar7/patches-2.6.30/500-serial_kludge.patch b/target/linux/ar7/patches-2.6.30/500-serial_kludge.patch deleted file mode 100644 index d4b02bc913..0000000000 --- a/target/linux/ar7/patches-2.6.30/500-serial_kludge.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/drivers/serial/8250.c -+++ b/drivers/serial/8250.c -@@ -287,6 +287,13 @@ static const struct serial8250_config ua - .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, - .flags = UART_CAP_FIFO, - }, -+ [PORT_AR7] = { -+ .name = "TI-AR7", -+ .fifo_size = 16, -+ .tx_loadsz = 16, -+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, -+ .flags = UART_CAP_FIFO | UART_CAP_AFE, -+ }, - }; - - #if defined (CONFIG_SERIAL_8250_AU1X00) -@@ -2702,7 +2709,11 @@ static void serial8250_console_putchar(s - { - struct uart_8250_port *up = (struct uart_8250_port *)port; - -+#ifdef CONFIG_AR7 -+ wait_for_xmitr(up, BOTH_EMPTY); -+#else - wait_for_xmitr(up, UART_LSR_THRE); -+#endif - serial_out(up, UART_TX, ch); - } - ---- a/include/linux/serial_core.h -+++ b/include/linux/serial_core.h -@@ -41,6 +41,7 @@ - #define PORT_XSCALE 15 - #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ - #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ -+#define PORT_AR7 18 /* TI AR7 internal UART */ - #define PORT_MAX_8250 17 /* max port ID */ - - /* |