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authorMatteo Croce <matteo@openwrt.org>2008-07-14 10:50:30 +0000
committerMatteo Croce <matteo@openwrt.org>2008-07-14 10:50:30 +0000
commita0deecbe361402b53d73ca7fe6124bde6d377da8 (patch)
treeba9ee75daea5ef547a55ee04b4eea5455cbff90b /target/linux/ar7/patches-2.6.26/500-serial_kludge.patch
parent081f1c2641326b6475233a879a93ab506745a537 (diff)
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ar7: initial 2.6.26 patches
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11824 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/patches-2.6.26/500-serial_kludge.patch')
-rw-r--r--target/linux/ar7/patches-2.6.26/500-serial_kludge.patch40
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/ar7/patches-2.6.26/500-serial_kludge.patch b/target/linux/ar7/patches-2.6.26/500-serial_kludge.patch
new file mode 100644
index 0000000000..a40d4a3771
--- /dev/null
+++ b/target/linux/ar7/patches-2.6.26/500-serial_kludge.patch
@@ -0,0 +1,40 @@
+--- a/drivers/serial/8250.c
++++ b/drivers/serial/8250.c
+@@ -267,6 +267,13 @@
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+ .flags = UART_CAP_FIFO,
+ },
++ [PORT_AR7] = {
++ .name = "TI-AR7",
++ .fifo_size = 16,
++ .tx_loadsz = 16,
++ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
++ .flags = UART_CAP_FIFO | UART_CAP_AFE,
++ },
+ };
+
+ #if defined (CONFIG_SERIAL_8250_AU1X00)
+@@ -2455,7 +2462,11 @@
+ {
+ struct uart_8250_port *up = (struct uart_8250_port *)port;
+
++#ifdef CONFIG_AR7
++ wait_for_xmitr(up, BOTH_EMPTY);
++#else
+ wait_for_xmitr(up, UART_LSR_THRE);
++#endif
+ serial_out(up, UART_TX, ch);
+ }
+
+--- a/include/linux/serial_core.h
++++ b/include/linux/serial_core.h
+@@ -40,7 +40,8 @@
+ #define PORT_NS16550A 14
+ #define PORT_XSCALE 15
+ #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
+-#define PORT_MAX_8250 16 /* max port ID */
++#define PORT_AR7 17
++#define PORT_MAX_8250 17 /* max port ID */
+
+ /*
+ * ARM specific type numbers. These are not currently guaranteed