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| author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-10-09 21:53:35 +0200 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-10-30 19:29:59 +0100 |
| commit | 278512665094888d3c007fdd74e090496d6c811d (patch) | |
| tree | 6d4f2cdddef316e07829b89c1c1a790d0db92fc3 /target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch | |
| parent | 3824fa26d256d162fc0e02e46714eda7816cae4a (diff) | |
| download | upstream-278512665094888d3c007fdd74e090496d6c811d.tar.gz upstream-278512665094888d3c007fdd74e090496d6c811d.tar.bz2 upstream-278512665094888d3c007fdd74e090496d6c811d.zip | |
kernel: remove support for kernel 4.19
We use 5.4 on all targets by default, and 4.19 has never been released
in a stable version. There is no reason to keep it.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch')
| -rw-r--r-- | target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch b/target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch deleted file mode 100644 index 110726d258..0000000000 --- a/target/linux/apm821xx/patches-4.19/300-fix-atheros-nics-on-apm82181.patch +++ /dev/null @@ -1,51 +0,0 @@ ---- a/arch/powerpc/platforms/4xx/pci.c -+++ b/arch/powerpc/platforms/4xx/pci.c -@@ -1060,15 +1060,24 @@ static int __init apm821xx_pciex_init_po - u32 val; - - /* -- * Do a software reset on PCIe ports. -- * This code is to fix the issue that pci drivers doesn't re-assign -- * bus number for PCIE devices after Uboot -- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 -- * PT quad port, SAS LSI 1064E) -+ * Only reset the PHY when no link is currently established. -+ * This is for the Atheros PCIe board which has problems to establish -+ * the link (again) after this PHY reset. All other currently tested -+ * PCIe boards don't show this problem. - */ -- -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); -- mdelay(10); -+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); -+ if (!(val & 0x00001000)) { -+ /* -+ * Do a software reset on PCIe ports. -+ * This code is to fix the issue that pci drivers doesn't re-assign -+ * bus number for PCIE devices after Uboot -+ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 -+ * PT quad port, SAS LSI 1064E) -+ */ -+ -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); -+ mdelay(10); -+ } - - if (port->endpoint) - val = PTYPE_LEGACY_ENDPOINT << 20; -@@ -1085,9 +1094,12 @@ static int __init apm821xx_pciex_init_po - mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); - mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); - -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); -- mdelay(50); -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); -+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); -+ if (!(val & 0x00001000)) { -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); -+ mdelay(50); -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); -+ } - - mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, - mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | |