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authorChristian Lamparter <chunkeey@googlemail.com>2016-11-12 14:46:32 +0100
committerMathias Kresin <dev@kresin.me>2016-11-12 21:04:15 +0100
commitebaa82a2ca1d147acaab5ab0c0f277951d10a6b5 (patch)
tree10f219b614d57e3c2854571ff8aac9c6e76c6e4d /target/linux/apm821xx/dts/apm82181.dtsi
parent3a112113e7ae932ca5663a0591a738b00aea4b50 (diff)
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apm821xx: consolidate apm821xx device trees files
This patch moves the common SoC device tree entries from the currently four supported platforms into a common apm82181.dtsi. Furthermore, this patch also changes the GPIO, IRQ and input definitions of the supported platforms to use the defined dt-bindings macros for GPIO_ACTIVE_LOW|HIGH, KEY_WPS|RESTART|*, IRQ_TYPE_* when it's appropriate. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target/linux/apm821xx/dts/apm82181.dtsi')
-rw-r--r--target/linux/apm821xx/dts/apm82181.dtsi470
1 files changed, 470 insertions, 0 deletions
diff --git a/target/linux/apm821xx/dts/apm82181.dtsi b/target/linux/apm821xx/dts/apm82181.dtsi
new file mode 100644
index 0000000000..cc48d200d7
--- /dev/null
+++ b/target/linux/apm821xx/dts/apm82181.dtsi
@@ -0,0 +1,470 @@
+/*
+ * Device Tree for Bluestone (APM821xx) board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri <tmarri@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ dcr-parent = <&{/cpus/cpu@0}>;
+ compatible = "apm,bluestone";
+
+ aliases {
+ ethernet0 = &EMAC0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU00: cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,apm82181";
+ reg = <0x00000000>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ timebase-frequency = <0>; /* Filled in by U-Boot */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ next-level-cache = <&L2C0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = "apm,uic-apm82181","ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0x0c0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = "apm,uic-apm82181","ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0x0d0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH
+ 0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = "apm,uic-apm82181","ibm,uic";
+ interrupt-controller;
+ cell-index = <2>;
+ dcr-reg = <0x0e0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH
+ 0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC3: interrupt-controller3 {
+ compatible = "apm,uic-apm82181","ibm,uic";
+ interrupt-controller;
+ cell-index = <3>;
+ dcr-reg = <0x0f0 0x009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH
+ 0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ OCM1: ocm@400040000 {
+ compatible = "apm,ocm-apm82181", "ibm,ocm";
+ status = "okay";
+ cell-index = <1>;
+ /* configured in U-Boot */
+ reg = <4 0x00040000 0x8000>; /* 32K */
+ };
+
+ SDR0: sdr {
+ compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
+ dcr-reg = <0x00e 0x002>;
+ };
+
+ CPR0: cpr {
+ compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
+ dcr-reg = <0x00c 0x002>;
+ };
+
+ L2C0: l2c {
+ compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
+ dcr-reg = <0x020 0x008
+ 0x030 0x008>;
+ cache-line-size = <32>;
+ cache-size = <262144>;
+ interrupt-parent = <&UIC1>;
+ interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
+ };
+
+ CPM0: cpm {
+ compatible = "ibm,cpm-apm821xx", "ibm,cpm";
+ cell-index = <0>;
+ dcr-reg = <0x160 0x003>;
+ pm-cpu = <0x02000000>;
+ pm-doze = <0x302570F0>;
+ pm-nap = <0x302570F0>;
+ pm-deepsleep = <0x302570F0>;
+ pm-iic-device = <&IIC0>;
+ pm-emac-device = <&EMAC0>;
+ unused-units = <0x00000100>;
+ idle-doze = <0x02000000>;
+ standby = <0xfeff791d>;
+ };
+
+ plb {
+ compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ SDRAM0: sdram {
+ compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
+ dcr-reg = <0x010 0x002>;
+ };
+
+ RTC: rtc {
+ compatible = "ibm,rtc";
+ dcr-reg = <0x240 0x009>;
+ interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&UIC2>;
+
+ };
+
+ CRYPTO: crypto@180000 {
+ compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
+ reg = <4 0x00180000 0x80400>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ PKA: pka@114000 {
+ device_type = "pka";
+ compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
+ reg = <4 0x00114000 0x4000>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
+ };
+
+ TRNG: trng@110000 {
+ device_type = "trng";
+ compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
+ reg = <4 0x00110000 0x100>;
+ interrupt-parent = <&UIC1>;
+ interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ MAL0: mcmal {
+ compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
+ descriptor-memory = "ocm";
+ dcr-reg = <0x180 0x062>;
+ num-tx-chans = <1>;
+ num-rx-chans = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-parent = <&UIC2>;
+ interrupts = < 0x06 IRQ_TYPE_LEVEL_HIGH /*TXEOB*/
+ 0x07 IRQ_TYPE_LEVEL_HIGH /*RXEOB*/
+ 0x03 IRQ_TYPE_LEVEL_HIGH /*SERR*/
+ 0x04 IRQ_TYPE_LEVEL_HIGH /*TXDE*/
+ 0x05 IRQ_TYPE_LEVEL_HIGH /*RXDE*/
+ 0x08 IRQ_TYPE_EDGE_FALLING /*TX0 COAL*/
+ /*0x09 IRQ_TYPE_EDGE_FALLING TX1 COAL*/
+ 0x0c IRQ_TYPE_EDGE_FALLING /*RX0 COAL*/
+ /*0x0d IRQ_TYPE_EDGE_FALLING RX1 COAL*/>;
+ };
+
+ AHBDMA0: dma@bffd0800 {
+ compatible = "snps,dma-spear1340";
+ reg = <4 0xbffd0800 0x400>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <3>;
+ /* use autoconfiguration for the dma setup */
+ };
+
+ SATA0: sata@bffd1000 {
+ compatible = "amcc,sata-460ex";
+ reg = <4 0xbffd1000 0x800>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&AHBDMA0 0 0 1>;
+ dma-names = "sata-dma";
+ status = "disabled";
+ };
+
+ SATA1: sata@bffd1800 {
+ compatible = "amcc,sata-460ex";
+ reg = <4 0xbffd1800 0x800>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&AHBDMA0 1 0 2>;
+ dma-names = "sata-dma";
+ status = "disabled";
+ };
+
+ USBOTG0: usbotg@bff80000 {
+ compatible = "amcc,usb-otg-405ex";
+ reg = <4 0xbff80000 0x10000>;
+ interrupt-parent = <&USBOTG0>;
+ interrupts = <0 1 2>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH /* USB-OTG */
+ 1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW /* HIGH-POWER */
+ 2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH /* DMA */>;
+ dr_mode = "host";
+ status = "disabled";
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-460ex", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-460ex", "ibm,ebc";
+ dcr-reg = <0x012 0x002>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ /* ranges property is supplied by U-Boot */
+ ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
+ interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&UIC1>;
+
+ nor_flash@0,0 {
+ compatible = "cfi-flash";
+ bank-width = <1>;
+ reg = <0x00000000 0x00000000 0x00100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ };
+
+ ndfc@1,0 {
+ compatible = "ibm,ndfc";
+ reg = <00000003 00000000 00002000>;
+ ccr = <0x00001000>;
+ bank-settings = <0x80002222>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+
+ nand {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
+ };
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC1>;
+ interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>; /* Filled in by U-Boot */
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ GPIO0: gpio@ef600b00 {
+ compatible = "ibm,ppc4xx-gpio";
+ reg = <0xef600b00 0x00000048>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ status = "disabled";
+ };
+
+ IIC0: i2c@ef600700 {
+ compatible = "ibm,iic-460ex", "ibm,iic";
+ reg = <0xef600700 0x00000014>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ IIC1: i2c@ef600800 {
+ compatible = "ibm,iic-460ex", "ibm,iic";
+ reg = <0xef600800 0x00000014>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ RGMII0: emac-rgmii@ef601500 {
+ compatible = "ibm,rgmii-405ex", "ibm,rgmii";
+ reg = <0xef601500 0x00000008>;
+ has-mdio;
+ };
+
+ TAH0: emac-tah@ef601350 {
+ compatible = "ibm,tah-460ex", "ibm,tah";
+ reg = <0xef601350 0x00000030>;
+ };
+
+ EMAC0: ethernet@ef600c00 {
+ device_type = "network";
+ compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
+ interrupt-parent = <&EMAC0>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
+ 1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
+ reg = <0xef600c00 0x000000c4>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <16384>;
+ tx-fifo-size = <2048>;
+ fifo-entry-size = <10>;
+ phy-mode = "rgmii";
+ phy-map = <0x00000000>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <0>;
+ tah-device = <&TAH0>;
+ tah-channel = <0>;
+ has-inverted-stacr-oc;
+ has-new-stacr-staopc;
+ status = "disabled";
+ };
+ };
+
+ PCIE0: pciex@d00000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
+ primary;
+ port = <0x0>; /* port number */
+ reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
+ 0x0000000c 0x08010000 0x00001000>; /* Registers */
+ dcr-reg = <0x100 0x020>;
+ sdr-base = <0x300>;
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
+ 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
+
+ /* This drives busses 0x40 to 0x7f */
+ bus-range = <0x40 0x7f>;
+
+ /* Legacy interrupts (note the weird polarity, the bridge seems
+ * to invert PCIe legacy interrupts).
+ * We are de-swizzling here because the numbers are actually for
+ * port of the root complex virtual P2P bridge. But I want
+ * to avoid putting a node for it in the tree, so the numbers
+ * below are basically de-swizzled numbers.
+ * The real slot is on idsel 0, so the swizzling is 1:1
+ */
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <
+ 0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH /* swizzled int D */>;
+ status = "disabled";
+ };
+
+ MSI: ppc4xx-msi@C10000000 {
+ compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+ reg = < 0xC 0x10000000 0x100
+ 0xC 0x10000000 0x100>;
+ sdr-base = <0x36C>;
+ msi-data = <0x00004440>;
+ msi-mask = <0x0000ffe0>;
+ interrupts =<0 1 2 3 4 5 6 7>;
+ interrupt-parent = <&MSI>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ msi-available-ranges = <0x0 0x100>;
+ interrupt-map = <
+ 0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING
+ 1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING
+ 2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING
+ 3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING
+ 4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING
+ 5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING
+ 6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING
+ 7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING
+ >;
+ status = "disabled";
+ };
+ };
+};