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authorGabor Juhos <juhosg@openwrt.org>2007-09-10 09:54:35 +0000
committerGabor Juhos <juhosg@openwrt.org>2007-09-10 09:54:35 +0000
commitac15780234f559c99eced96d1f9f725986c8fb64 (patch)
tree3df2fa62d83828651e1cc9dc15ad30c1ec3dbd29 /target/linux/adm5120/files/include
parente83d637f65c15533cdcdbd8ec0c31da6bea48a9b (diff)
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fix memory size detection (#2244)
SVN-Revision: 8728
Diffstat (limited to 'target/linux/adm5120/files/include')
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h
index 786f0f8c7e..406d6c563a 100644
--- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h
@@ -52,8 +52,14 @@
#define MPMC_REG_SC3 0x0260
/* Control register bits */
-#define MPMC_CTRL_AM ( 1 << 1 )
-#define MPMC_CTRL_DWB ( 1 << 3 )
+#define MPMC_CTRL_AM ( 1 << 1 ) /* Address Mirror */
+#define MPMC_CTRL_LPM ( 1 << 2 ) /* Low Power Mode */
+#define MPMC_CTRL_DWB ( 1 << 3 ) /* Drain Write Buffers */
+
+/* Status register bits */
+#define MPMC_STATUS_BUSY ( 1 << 0 ) /* Busy */
+#define MPMC_STATUS_WBS ( 1 << 1 ) /* Write Buffer Status */
+#define MPMC_STATUS_SRA ( 1 << 2 ) /* Self-Refresh Acknowledge*/
/* Dynamic Control register bits */
#define MPMC_DC_CE ( 1 << 0 )