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authorFlorian Fainelli <florian@openwrt.org>2007-10-22 20:56:34 +0000
committerFlorian Fainelli <florian@openwrt.org>2007-10-22 20:56:34 +0000
commit2a0ca50ce2fbc3fc5b0eab9e48c08b46f0b7aa54 (patch)
treeb78e86a8da696710637c45773eea65e3649a9cbe /target/linux/adm5120/files/include
parent5db86fb47a934a9afbe6d960a67ac1821be6dd74 (diff)
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Add preliminary support for the Routerboard 153 CF slot (#2550)
SVN-Revision: 9403
Diffstat (limited to 'target/linux/adm5120/files/include')
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h19
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h6
2 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h
new file mode 100644
index 0000000000..e26e1d4199
--- /dev/null
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_cf.h
@@ -0,0 +1,19 @@
+#include <linux/types.h>
+#include <linux/io.h>
+
+#include <adm5120_defs.h>
+#include <adm5120_switch.h>
+
+/* CFRDY is connected to GPIO4/INTX_1 */
+#define ADM5120_CF_GPIO_NUM 4
+#define ADM5120_CF_IRQ_LEVEL_BIT 0x20 /* GPIO4 = 0x20, GPIO2 = 0x10 */
+#define ADM5120_IRQ_CFRDY 5
+#define EXTIO_WAIT_EN (0x1 << 6)
+#define EXTIO_CS1_INT1_EN (0x1 << 5)
+#define EXTIO_CS0_INT0_EN (0x1 << 4)
+
+struct cf_device {
+ int gpio_pin;
+ void *dev;
+ struct gendisk *gd;
+};
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h
index 406d6c563a..8209d88a47 100644
--- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_mpmc.h
@@ -49,6 +49,12 @@
#define MPMC_REG_SC0 0x0200 /* for F_CS1_N */
#define MPMC_REG_SC1 0x0220 /* for F_CS0_N */
#define MPMC_REG_SC2 0x0240
+#define MPMC_REG_WEN2 0x0244
+#define MPMC_REG_OEN2 0x0248
+#define MPMC_REG_RD2 0x024C
+#define MPMC_REG_PG2 0x0250
+#define MPMC_REG_WR2 0x0254
+#define MPMC_REG_TN2 0x0258
#define MPMC_REG_SC3 0x0260
/* Control register bits */