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| author | Florian Fainelli <florian@openwrt.org> | 2015-01-10 18:08:53 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2015-01-10 18:08:53 +0000 |
| commit | c119814b2bf25bc89a5cbfb3eb791ad7461d0c38 (patch) | |
| tree | fd78acd3929b0e93574a133fdcd2c2fc026aa45d /target/linux/adm5120/files-3.8/arch/mips/include/asm/mach-adm5120/war.h | |
| parent | 0c5feac5731052fea718ebf350b13d9eaaefc432 (diff) | |
| download | upstream-c119814b2bf25bc89a5cbfb3eb791ad7461d0c38.tar.gz upstream-c119814b2bf25bc89a5cbfb3eb791ad7461d0c38.tar.bz2 upstream-c119814b2bf25bc89a5cbfb3eb791ad7461d0c38.zip | |
adm5120: move files to files-3.8
In preparation for adding new kernel support
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 43914
Diffstat (limited to 'target/linux/adm5120/files-3.8/arch/mips/include/asm/mach-adm5120/war.h')
| -rw-r--r-- | target/linux/adm5120/files-3.8/arch/mips/include/asm/mach-adm5120/war.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/adm5120/files-3.8/arch/mips/include/asm/mach-adm5120/war.h b/target/linux/adm5120/files-3.8/arch/mips/include/asm/mach-adm5120/war.h new file mode 100644 index 0000000000..87c35f375b --- /dev/null +++ b/target/linux/adm5120/files-3.8/arch/mips/include/asm/mach-adm5120/war.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MIPS_MACH_ADM5120_WAR_H +#define __ASM_MIPS_MACH_ADM5120_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MIPS_MACH_ADM5120_WAR_H */ |