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| author | Jan Hoffmann <jan@3e8.eu> | 2022-10-26 00:20:05 +0200 |
|---|---|---|
| committer | Sander Vanheule <sander@svanheule.net> | 2022-10-26 09:59:38 +0200 |
| commit | eb456aedfe24a076a4f53743ad3c090ae447329e (patch) | |
| tree | 390281b3521deda301bc62ba835d34b0320605aa /scripts/mkits-qsdk-ipq-image.sh | |
| parent | 2088e440b1325ca87e4aa30162e7baa03850a37b (diff) | |
| download | upstream-eb456aedfe24a076a4f53743ad3c090ae447329e.tar.gz upstream-eb456aedfe24a076a4f53743ad3c090ae447329e.tar.bz2 upstream-eb456aedfe24a076a4f53743ad3c090ae447329e.zip | |
realtek: use assisted learning on CPU port
L2 learning on the CPU port is currently not consistently configured and
relies on the default configuration of the device. On RTL83xx, it is
disabled for packets transmitted with a TX header, as hardware learning
corrupts the forwarding table otherwise. As a result, unneeded flooding
of traffic for the CPU port can already happen on some devices now. It
is also likely that similar issues exist on RTL93xx, which doesn't have
a field to disable learning in the TX header.
To address this, disable hardware learning for the CPU port globally on
all devices. Instead, enable assisted learning to let DSA write FDB
entries to the switch.
For now, this does not sync local/bridge entries to the switch. However,
support for that was added in Linux 5.14, so the next switch to a newer
kernel version is going to fix this.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Diffstat (limited to 'scripts/mkits-qsdk-ipq-image.sh')
0 files changed, 0 insertions, 0 deletions