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| author | Felix Fietkau <nbd@openwrt.org> | 2015-11-02 18:20:51 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2015-11-02 18:20:51 +0000 |
| commit | 0b296d380807050cee0a682caf388d6d71aef435 (patch) | |
| tree | fad0c9bc9a79b8609ef7f0bcf9078f8bec87e2ef /scripts/cleanpatch | |
| parent | a94636737197c82245ca1a346e1908ca60a89d45 (diff) | |
| download | upstream-0b296d380807050cee0a682caf388d6d71aef435.tar.gz upstream-0b296d380807050cee0a682caf388d6d71aef435.tar.bz2 upstream-0b296d380807050cee0a682caf388d6d71aef435.zip | |
ar71xx: use correct PLL configuration register bitmask for QCA956x SoC.
Incorrect value causes clock inaccuracy as huge as 1/60.
Signed-off-by: Dmitry Ivanov <dima@ubnt.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47363
Diffstat (limited to 'scripts/cleanpatch')
0 files changed, 0 insertions, 0 deletions