diff options
| author | Mathias Kresin <dev@kresin.me> | 2016-05-21 12:13:37 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2016-05-23 11:03:24 +0200 |
| commit | 9e8edcff990d989215cc0bda7ee99ba9ebec4133 (patch) | |
| tree | c68fa9aec621cff6867a1699ba177a039562eba2 /package | |
| parent | b3795d0c93d309de9be670e3d2c86b3df479ad2c (diff) | |
| download | upstream-9e8edcff990d989215cc0bda7ee99ba9ebec4133.tar.gz upstream-9e8edcff990d989215cc0bda7ee99ba9ebec4133.tar.bz2 upstream-9e8edcff990d989215cc0bda7ee99ba9ebec4133.zip | |
uboot-lantiq: VGV7510KW22 - cleanup board config
According to the author, all SPI related configs are copy & paste
leftovers. Which makes sense since nothing is connected to the SPI bus
on this device.
The NOR SPL isn't required for this board, since the NOR is directly
memory mapped.
Allow to overwrite the env in ram while using brn variant. Do not set
the power GPIO pin twice.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'package')
| -rw-r--r-- | package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch | 63 |
1 files changed, 3 insertions, 60 deletions
diff --git a/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch b/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch index eb688a9caa..b532f410f9 100644 --- a/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch +++ b/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch @@ -30,7 +30,7 @@ +######################################################################### --- /dev/null +++ b/board/arcadyan/vgv7510kw22/vgv7510kw22.c -@@ -0,0 +1,136 @@ +@@ -0,0 +1,98 @@ +/* + * Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com> + * @@ -38,7 +38,6 @@ + */ + +#include <common.h> -+#include <spi.h> +#include <asm/gpio.h> +#include <asm/lantiq/eth.h> +#include <asm/lantiq/chipid.h> @@ -67,12 +66,8 @@ + +static void gpio_init(void) +{ -+ /* SPI CS 0.4 to serial flash */ -+ gpio_direction_output(10, 1); -+ + /* Turn on the green power LED */ + gpio_direction_output(GPIO_POWER_GREEN, 0); -+ gpio_set_value(GPIO_POWER_GREEN, 0); +} + +int board_early_init_f(void) @@ -134,39 +129,6 @@ + + return ltq_eth_initialize(ð_board_config); +} -+ -+int spi_cs_is_valid(unsigned int bus, unsigned int cs) -+{ -+ if (bus) -+ return 0; -+ -+ if (cs == 4) -+ return 1; -+ -+ return 0; -+} -+ -+void spi_cs_activate(struct spi_slave *slave) -+{ -+ switch (slave->cs) { -+ case 4: -+ gpio_set_value(10, 0); -+ break; -+ default: -+ break; -+ } -+} -+ -+void spi_cs_deactivate(struct spi_slave *slave) -+{ -+ switch (slave->cs) { -+ case 4: -+ gpio_set_value(10, 1); -+ break; -+ default: -+ break; -+ } -+} --- /dev/null +++ b/board/arcadyan/vgv7510kw22/config.mk @@ -0,0 +1,7 @@ @@ -265,7 +227,7 @@ Active mips mips32 vrx200 avm fb3370 fb3370_sfspl fb3370:SYS_BOOT_SFSPL Daniel Schwierzeck <daniel.schwierzeck@gmail.com> --- /dev/null +++ b/include/configs/vgv7510kw22.h -@@ -0,0 +1,78 @@ +@@ -0,0 +1,59 @@ +/* + * Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com> + * @@ -286,33 +248,14 @@ + +#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */ + -+#define CONFIG_LTQ_SUPPORT_SPI_FLASH -+#define CONFIG_SPI_FLASH_MACRONIX /* Have a MX29GL128EL parallel flash */ -+ -+#define CONFIG_LTQ_SUPPORT_SPL_SPI_FLASH /* Build SPI flash SPL */ -+#define CONFIG_LTQ_SPL_COMP_LZO /* Compress SPL with LZO */ -+#define CONFIG_LTQ_SPL_CONSOLE /* Enable SPL console */ -+ -+#define CONFIG_SPL_SPI_BUS 0 -+#define CONFIG_SPL_SPI_CS 4 -+#define CONFIG_SPL_SPI_MAX_HZ 25000000 -+#define CONFIG_SPL_SPI_MODE 0 -+ -+#define CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH /* Build NOR flash SPL */ -+ +#define CONFIG_SYS_BOOTM_LEN 0x1000000 /* 16 MB */ + -+/* Environment */ -+#define CONFIG_ENV_SPI_BUS CONFIG_SPL_SPI_BUS -+#define CONFIG_ENV_SPI_CS CONFIG_SPL_SPI_CS -+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SPL_SPI_MAX_HZ -+#define CONFIG_ENV_SPI_MODE CONFIG_SPL_SPI_MODE -+ +#if defined(CONFIG_SYS_BOOT_BRN) +#define CONFIG_SYS_TEXT_BASE 0x80002000 +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_DISABLE_CACHE +#define CONFIG_ENV_IS_NOWHERE ++#define CONFIG_ENV_OVERWRITE 1 +#elif defined(CONFIG_SYS_BOOT_NOR) +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE |