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authorHauke Mehrtens <hauke@hauke-m.de>2021-04-04 22:37:09 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2021-04-11 23:01:28 +0200
commitca3289b2901953a0be82f2b69ed761d7f5196952 (patch)
tree37ecb710b3d31519612dee4e48b786756b132f1c /package
parentdcdafbfc1abe7166f89a24896ea0d92ed1a41f55 (diff)
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valgrind: Fix compile problem with MIPS soft float
valgrind does not compile any more when using a GCC 10 for MIPS with soft float. Just remove the parts which are generating assembler which would not work. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'package')
-rw-r--r--package/devel/valgrind/patches/130-mips_fix_soft_float.patch68
1 files changed, 68 insertions, 0 deletions
diff --git a/package/devel/valgrind/patches/130-mips_fix_soft_float.patch b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch
new file mode 100644
index 0000000000..05be099ca5
--- /dev/null
+++ b/package/devel/valgrind/patches/130-mips_fix_soft_float.patch
@@ -0,0 +1,68 @@
+Disable the valgrind helpers which use MIPS floating point operations
+when floating point support is deactivated in the toolchain.
+
+The fix from this commit is not sufficient any more:
+https://sourceware.org/git/?p=valgrind.git;a=commitdiff;h=869fcf2f6739f17b4eff36ec68f8dca826c8afeb
+
+This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
+---------------------------------------------------------
+../VEX/priv/guest_mips_helpers.c: In function 'mips_dirtyhelper_calculate_FCSR_fp32':
+../VEX/priv/guest_mips_helpers.c:640:10: error: the register '$f21' cannot be clobbered in 'asm' for the current target
+ 640 | ASM_VOLATILE_UNARY32_DOUBLE(round.w.d)
+ | ^
+---------------------------------------------------------
+
+--- a/VEX/priv/guest_mips_helpers.c
++++ b/VEX/priv/guest_mips_helpers.c
+@@ -617,6 +617,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ flt_op inst )
+ {
+ UInt ret = 0;
++#ifndef __mips_soft_float
+ #if defined(__mips__)
+ VexGuestMIPS32State* guest_state = (VexGuestMIPS32State*)gs;
+ UInt loFsVal, hiFsVal, loFtVal, hiFtVal;
+@@ -699,6 +700,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ break;
+ }
+ #endif
++#endif
+ return ret;
+ }
+
+@@ -708,6 +710,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ flt_op inst )
+ {
+ UInt ret = 0;
++#ifndef __mips_soft_float
+ #if defined(__mips__) && ((__mips == 64) || \
+ (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)))
+ #if defined(VGA_mips32)
+@@ -860,6 +863,7 @@ extern UInt mips_dirtyhelper_calculate_F
+ break;
+ }
+ #endif
++#endif
+ return ret;
+ }
+
+--- a/coregrind/m_machine.c
++++ b/coregrind/m_machine.c
+@@ -1828,6 +1828,7 @@ Bool VG_(machine_get_hwcaps)( void )
+ we are using alternative way to determine FP mode */
+ ULong result = 0;
+
++#ifndef __mips_soft_float
+ if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
+ __asm__ volatile (
+ ".set push\n\t"
+@@ -1845,6 +1846,9 @@ Bool VG_(machine_get_hwcaps)( void )
+
+ fpmode = (result != 0x3FF0000000000000ull);
+ }
++#else
++ fpmode = 0;
++#endif
+ }
+
+ if (fpmode != 0)