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| author | David Bauer <mail@david-bauer.net> | 2019-11-05 22:28:39 +0100 |
|---|---|---|
| committer | David Bauer <mail@david-bauer.net> | 2019-11-06 16:13:57 +0100 |
| commit | 2b4d9b68500146b6ef16c798bebb5e0fdcae170f (patch) | |
| tree | d9f1e4cdf346aa4aef5036b93d695487ee7408c8 /package | |
| parent | b3514e3569b35e66b8986cf0c8fa658aeb888b38 (diff) | |
| download | upstream-2b4d9b68500146b6ef16c798bebb5e0fdcae170f.tar.gz upstream-2b4d9b68500146b6ef16c798bebb5e0fdcae170f.tar.bz2 upstream-2b4d9b68500146b6ef16c798bebb5e0fdcae170f.zip | |
mac80211 ath9k: force QCA953x clock to 25MHz
The QCA953x only supports 25 MHz refclk, however some OEMs set an
invalid bootstrap value for the REF_CLK option, which would break the
clock detection in ath9k.
Force the QCA953x refclk to 25MHz in ath9k, as this is (according to the
datasheet) the only valid frequency.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 4c6fe32468bc60cc25a8c298498c0be3c73e7378)
Diffstat (limited to 'package')
| -rw-r--r-- | package/kernel/mac80211/patches/ath/552-ahb_of.patch | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/package/kernel/mac80211/patches/ath/552-ahb_of.patch b/package/kernel/mac80211/patches/ath/552-ahb_of.patch index 08735d2871..c16bf424ea 100644 --- a/package/kernel/mac80211/patches/ath/552-ahb_of.patch +++ b/package/kernel/mac80211/patches/ath/552-ahb_of.patch @@ -16,7 +16,7 @@ static const struct platform_device_id ath9k_platform_id_table[] = { { -@@ -69,6 +77,235 @@ static const struct ath_bus_ops ath_ahb_ +@@ -69,6 +77,242 @@ static const struct ath_bus_ops ath_ahb_ .eeprom_read = ath_ahb_eeprom_read, }; @@ -232,7 +232,14 @@ + pdata->external_reset = data->wmac_reset; + } + -+ if (data->bootstrap_reg && data->bootstrap_ref) { ++ if (data->dev_id == AR9300_DEVID_AR953X) { ++ /* ++ * QCA953x only supports 25MHz refclk. ++ * Some vendors have an invalid bootstrap option ++ * set, which would break the WMAC here. ++ */ ++ pdata->is_clk_25mhz = true; ++ } else if (data->bootstrap_reg && data->bootstrap_ref) { + u32 t = ath79_reset_rr(data->bootstrap_reg); + if (t & data->bootstrap_ref) + pdata->is_clk_25mhz = false; @@ -252,7 +259,7 @@ static int ath_ahb_probe(struct platform_device *pdev) { void __iomem *mem; -@@ -80,6 +317,17 @@ static int ath_ahb_probe(struct platform +@@ -80,6 +324,17 @@ static int ath_ahb_probe(struct platform int ret = 0; struct ath_hw *ah; char hw_name[64]; @@ -270,7 +277,7 @@ if (!dev_get_platdata(&pdev->dev)) { dev_err(&pdev->dev, "no platform data specified\n"); -@@ -122,13 +370,16 @@ static int ath_ahb_probe(struct platform +@@ -122,13 +377,16 @@ static int ath_ahb_probe(struct platform sc->mem = mem; sc->irq = irq; @@ -288,7 +295,7 @@ if (ret) { dev_err(&pdev->dev, "failed to initialize device\n"); goto err_irq; -@@ -159,6 +410,9 @@ static int ath_ahb_remove(struct platfor +@@ -159,6 +417,9 @@ static int ath_ahb_remove(struct platfor free_irq(sc->irq, sc); ieee80211_free_hw(sc->hw); } @@ -298,7 +305,7 @@ return 0; } -@@ -168,6 +422,9 @@ static struct platform_driver ath_ahb_dr +@@ -168,6 +429,9 @@ static struct platform_driver ath_ahb_dr .remove = ath_ahb_remove, .driver = { .name = "ath9k", |