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authorFelix Fietkau <nbd@openwrt.org>2010-03-28 22:40:32 +0000
committerFelix Fietkau <nbd@openwrt.org>2010-03-28 22:40:32 +0000
commit60c60c05163b1d4d44fefef49caaac9dbc9f8a8f (patch)
treec3a7fa927f23cbbbf01129aec8cc729b731849bc /package/uboot-lantiq/files/include/configs
parent6e5419b7acc217c83d410775ae3d71d37efdaa91 (diff)
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add uboot-lantiq (based on a patch contributed by Lantiq)
SVN-Revision: 20561
Diffstat (limited to 'package/uboot-lantiq/files/include/configs')
-rw-r--r--package/uboot-lantiq/files/include/configs/easy50712.h115
-rw-r--r--package/uboot-lantiq/files/include/configs/ifx-common.h192
2 files changed, 307 insertions, 0 deletions
diff --git a/package/uboot-lantiq/files/include/configs/easy50712.h b/package/uboot-lantiq/files/include/configs/easy50712.h
new file mode 100644
index 0000000000..e061b831d5
--- /dev/null
+++ b/package/uboot-lantiq/files/include/configs/easy50712.h
@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2003-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file contains the configuration parameters for the Danube reference board.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* #define DEBUG */
+
+#define CONFIG_MIPS32 1 /* MIPS32 CPU compatible */
+#define CONFIG_MIPS24KEC 1 /* MIPS 24KEc CPU core */
+#define CONFIG_DANUBE 1 /* in a Danube/Twinpass Chip */
+#define CONFIG_EASY50712 1 /* on the Danube Reference Board */
+
+#define CONFIG_SYS_MIPS_MULTI_CPU 1 /* This is a multi cpu system */
+
+#define CONFIG_SYS_MAX_RAM 32*1024*1024
+
+#define CONFIG_FLASH_CFI_DRIVER 1
+
+#define CONFIG_SYS_INIT_RAM_LOCK_MIPS
+#ifdef CONFIG_SYS_RAMBOOT
+ //#warning CONFIG_SYS_RAMBOOT
+ #define CONFIG_SKIP_LOWLEVEL_INIT
+#else /* CONFIG_SYS_RAMBOOT */
+
+ #define CONFIG_SYS_EBU_BOOT
+
+ #ifdef CONFIG_USE_DDR_RAM
+ /* FIXME: should not need these workarounds */
+ #define DANUBE_DDR_RAM_SIZE 32 /* 32M DDR-DRAM for reference board */
+ #endif
+
+ #define INFINEON_EBU_BOOTCFG 0x688C688C /* CMULT = 8 for 150 MHz */
+
+#endif /* CONFIG_SYS_RAMBOOT */
+
+#if 1
+#ifndef CPU_CLOCK_RATE
+#define CPU_CLOCK_RATE (ifx_get_cpuclk())
+#endif
+#endif
+
+#define CONFIG_SYS_PROMPT "DANUBE => " /* Monitor Command Prompt */
+
+#undef CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
+
+/*
+ * Include common defines/options for all Infineon boards
+ */
+#include "ifx-common.h"
+
+/*
+ * Cache Configuration (cpu/chip specific, Danube)
+ */
+#define CONFIG_SYS_DCACHE_SIZE 16384
+#define CONFIG_SYS_ICACHE_SIZE 16384
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NO_WA
+
+#define CONFIG_NET_MULTI
+#if 0
+#define CONFIG_M4530_ETH
+#define CONFIG_M4530_FPGA
+#endif
+
+#define CONFIG_IFX_ETOP
+#define CLK_OUT2_25MHZ
+#define CONFIG_EXTRA_SWITCH
+
+#define CONFIG_RMII /* use interface in RMII mode */
+
+#define CONFIG_MII
+#define CONFIG_CMD_MII
+
+#define CONFIG_IFX_ASC
+
+#ifdef CONFIG_USE_ASC0
+#define CONFIG_SYS_IFX_ASC_BASE 0x1E100400
+#else
+#define CONFIG_SYS_IFX_ASC_BASE 0x1E100C00
+#endif
+
+#ifdef CONFIG_SYS_RAMBOOT
+/* Configuration of EBU: */
+/* starting address from 0xb0000000 */
+/* make the flash available from RAM boot */
+# define CONFIG_EBU_ADDSEL0 0x10000031
+# define CONFIG_EBU_BUSCON0 0x0001D7FF
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/package/uboot-lantiq/files/include/configs/ifx-common.h b/package/uboot-lantiq/files/include/configs/ifx-common.h
new file mode 100644
index 0000000000..88569ada9c
--- /dev/null
+++ b/package/uboot-lantiq/files/include/configs/ifx-common.h
@@ -0,0 +1,192 @@
+/*
+ * (C) Copyright 2008
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * Common configuration options for all AMCC boards
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IFX_COMMON_H
+#define __IFX_COMMON_H
+
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+
+#define CONFIG_BAUDRATE 115200
+
+/* valid baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "ram_addr=0x80500000\0" \
+ "kernel_addr=0xb0050000\0" \
+ "mtdparts=mtdparts=ifx-nor:256k(uboot)ro,64k(uboot_env)ro,64k(kernel),-(rootfs)\0" \
+ "flashargs=setenv bootargs rootfstype=squashfs,jffs2\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath} \0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off\0" \
+ "addmisc=setenv bootargs ${bootargs} init=/etc/preinit " \
+ "console=ttyS1,115200 ethaddr=${ethaddr} ${mtdparts}" \
+ "${mtdparts}\0" \
+ "flash_flash=run flashargs addip addmisc;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_nfs=run nfsargs addip addmisc;bootm ${kernel_addr}\0" \
+ "net_flash=run load_kernel flashargs addip addmisc;" \
+ "bootm ${ram_addr}\0" \
+ "net_nfs=run load_kernel nfsargs addip addmisc;" \
+ "bootm ${ram_addr}\0" \
+ "load_kernel=tftp ${ram_addr} " \
+ "${tftppath}openwrt-ifxmips-uImage\0" \
+ "update_uboot=tftp 0x80500000 ${tftppath}u-boot.bin;era 0xb0000000 +${filesize};" \
+ "cp.b 0x80500000 0xb0000000 ${filesize}\0" \
+ "update_openwrt=tftp ${ram_addr} " \
+ "${tftppath}openwrt-ifxmips-squashfs.image;" \
+ "era ${kernel_addr} +${filesize};" \
+ "cp.b ${ram_addr} ${kernel_addr} ${filesize}\0"
+
+#define CONFIG_BOOTCOMMAND "run flash_flash"
+
+/*
+ * TFTP is using fragmented packets
+*/
+#define CONFIG_IP_DEFRAG
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_CONSOLE
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_XIMG
+
+//#define CONFIG_CMD_ASKENV
+//#define CONFIG_CMD_DHCP
+//#define CONFIG_CMD_ELF
+#define CONFIG_CMD_PING
+//#define CONFIG_CMD_JFFS2
+//#define CONFIG_CMD_SNTP
+
+
+/*
+ * Miscellaneous configurable options
+ */
+
+#define CONFIG_LZMA
+
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#ifndef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+#endif
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+
+#define CONFIG_SYS_MALLOC_LEN 1024*1024
+#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
+
+#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE/2)
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+#define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */
+#define CONFIG_SYS_MEMTEST_START 0x80100000
+#define CONFIG_SYS_MEMTEST_END 0x80800000
+
+#define CONFIG_CMDLINE_EDITING /* add command line history */
+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
+
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE /* include version env variable */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
+
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#endif
+
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT (140) /* max number of sectors on one chip */
+
+#define PHYS_FLASH_1 0xB0000000 /* Flash Bank #1 */
+#define PHYS_FLASH_2 0xB0800000 /* Flash Bank #2 */
+
+/* The following #defines are needed to get flash environment right */
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (192 << 10)
+
+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
+
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+
+#define CONFIG_ENV_OVERWRITE 1
+#define CONFIG_ENV_IS_IN_FLASH 1
+
+/* Address and size of Primary Environment Sector */
+#define CONFIG_ENV_ADDR 0xB0040000
+#define CONFIG_ENV_SIZE 0x10000
+
+#ifdef CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_SWAP_ADDR
+#define CONFIG_FLASH_SHOW_PROGRESS 45
+
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+
+#define FLASH_FIXUP_ADDR_8(addr) ((void*)((ulong)(addr)^2))
+#define FLASH_FIXUP_ADDR_16(addr) ((void*)((ulong)(addr)^2))
+
+#endif
+
+#define CONFIG_NR_DRAM_BANKS 1
+
+#ifdef CONFIG_SYS_EBU_BOOT
+#ifndef INFINEON_EBU_BOOTCFG
+#error Please define INFINEON_EBU_BOOTCFG
+#endif
+#endif
+
+#endif /* __IFX_COMMON_H */