diff options
author | John Crispin <john@openwrt.org> | 2012-12-15 02:00:33 +0000 |
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committer | John Crispin <john@openwrt.org> | 2012-12-15 02:00:33 +0000 |
commit | 1d0a9d0c0470f774056e015431ae43e0175d2266 (patch) | |
tree | f2da9a1682c30c82d4687a8e67a00eac2add7d11 /package/system/ltq-dsl | |
parent | c2738a9559f434db5d28282051741e24298344af (diff) | |
download | upstream-1d0a9d0c0470f774056e015431ae43e0175d2266.tar.gz upstream-1d0a9d0c0470f774056e015431ae43e0175d2266.tar.bz2 upstream-1d0a9d0c0470f774056e015431ae43e0175d2266.zip |
move ltq-adsl
SVN-Revision: 34693
Diffstat (limited to 'package/system/ltq-dsl')
33 files changed, 0 insertions, 18793 deletions
diff --git a/package/system/ltq-dsl/Config.in b/package/system/ltq-dsl/Config.in deleted file mode 100644 index 6d9caf4419..0000000000 --- a/package/system/ltq-dsl/Config.in +++ /dev/null @@ -1,5 +0,0 @@ -config LANTIQ_DSL_DEBUG - bool "verbose debugging" - depends on PACKAGE_kmod-ltq-dsl - help - Say Y, if you need ltq-dsl to display debug messages. diff --git a/package/system/ltq-dsl/Makefile b/package/system/ltq-dsl/Makefile deleted file mode 100644 index aa8106aeae..0000000000 --- a/package/system/ltq-dsl/Makefile +++ /dev/null @@ -1,121 +0,0 @@ -# -# Copyright (C) 2011 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=ltq-dsl -PKG_VERSION:=3.24.4.4 -PKG_RELEASE:=4 -PKG_SOURCE:=drv_dsl_cpe_api_danube-$(PKG_VERSION).tar.gz -PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-dsl-$(BUILD_VARIANT)/drv_dsl_cpe_api-$(PKG_VERSION) -PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/ -PKG_MD5SUM:=c45bc531c1ed2ac80f68fb986b63bb87 -PKG_MAINTAINER:=John Crispin <blogic@openwrt.org> - -include $(INCLUDE_DIR)/package.mk - -define KernelPackage/ltq-dsl-template - SECTION:=sys - CATEGORY:=Kernel modules - SUBMENU:=Network Devices - TITLE:=Lantiq dsl driver for $(1) - URL:=http://www.lantiq.com/ - VARIANT:=$(1) - DEPENDS:=@(TARGET_lantiq_$(1)||TARGET_lantiq_$(2)) +kmod-atm - FILES:=$(PKG_BUILD_DIR)/src/mei/lantiq_mei.ko \ - $(PKG_BUILD_DIR)/src/drv_dsl_cpe_api.ko \ - $(PKG_BUILD_DIR)/src/mei/lantiq_atm.ko - AUTOLOAD:=$(call AutoLoad,50,lantiq_mei drv_dsl_cpe_api lantiq_atm) -endef - -KernelPackage/ltq-dsl-danube=$(call KernelPackage/ltq-dsl-template,danube,xway) -KernelPackage/ltq-dsl-ar9=$(call KernelPackage/ltq-dsl-template,ar9,xway) -KernelPackage/ltq-dsl-ase=$(call KernelPackage/ltq-dsl-template,ase,ase) - -define KernelPackage/ltq-dsl/config - source "$(SOURCE)/Config.in" -endef - -IFX_DSL_MAX_DEVICE=1 -IFX_DSL_LINES_PER_DEVICE=1 -IFX_DSL_CHANNELS_PER_LINE=1 - -CONFIGURE_ARGS += --enable-kernel-include="$(LINUX_DIR)/include" \ - --with-max-device="$(IFX_DSL_MAX_DEVICE)" \ - --with-lines-per-device="$(IFX_DSL_LINES_PER_DEVICE)" \ - --with-channels-per-line="$(IFX_DSL_CHANNELS_PER_LINE)" \ - --disable-dsl-delt-static \ - --disable-adsl-led \ - --enable-dsl-ceoc \ - --enable-dsl-pm \ - --enable-dsl-pm-total \ - --enable-dsl-pm-history \ - --enable-dsl-pm-showtime \ - --enable-dsl-pm-channel-counters \ - --enable-dsl-pm-datapath-counters \ - --enable-dsl-pm-line-counters \ - --enable-dsl-pm-channel-thresholds \ - --enable-dsl-pm-datapath-thresholds \ - --enable-dsl-pm-line-thresholds \ - --enable-dsl-pm-optional-parameters \ - --enable-linux-26 \ - --enable-kernelbuild="$(LINUX_DIR)" \ - ARCH=$(LINUX_KARCH) - -CONFIG_TAG_danube:=DANUBE -CONFIG_TAG_ase:=AMAZON_SE -CONFIG_TAG_ar9:=AR9 -CONFIGURE_ARGS += --enable-add-drv-cflags="-DMODULE -DCONFIG_$(CONFIG_TAG_$(BUILD_VARIANT))" - -CONFIGURE_ARGS += --enable-danube - -ifeq ($(CONFIG_LANTIQ_DSL_DEBUG),y) -CONFIGURE_ARGS += \ - --enable-debug=yes \ - --enable-debug-prints=yes -EXTRA_CFLAGS += -DDEBUG -endif - -EXTRA_CFLAGS = -fno-pic -mno-abicalls -mlong-calls -G 0 - -define Build/Prepare - $(PKG_UNPACK) - $(Build/Patch) - $(INSTALL_DIR) $(PKG_BUILD_DIR)/src/mei/ - $(CP) ./src/* $(PKG_BUILD_DIR)/src/mei/ -endef - -define Build/Configure - (cd $(PKG_BUILD_DIR); aclocal && autoconf && automake) - $(call Build/Configure/Default) -endef - -define Build/Compile - cd $(LINUX_DIR); \ - ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \ - $(MAKE) BUILD_VARIANT=$(BUILD_VARIANT) M=$(PKG_BUILD_DIR)/src/mei/ V=1 modules - $(call Build/Compile/Default) -endef - -define Build/InstallDev - $(INSTALL_DIR) $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_ioctl.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_adslmib.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_adslmib_ioctl.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_g997.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_types.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_pm.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_api_error.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_danube_ctx.h $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/drv_dsl_cpe_cmv_danube.h $(1)/usr/include -endef - -$(eval $(call KernelPackage,ltq-dsl-danube)) -$(eval $(call KernelPackage,ltq-dsl-ase)) -$(eval $(call KernelPackage,ltq-dsl-ar9)) diff --git a/package/system/ltq-dsl/patches/100-dsl_compat.patch b/package/system/ltq-dsl/patches/100-dsl_compat.patch deleted file mode 100644 index f892351a65..0000000000 --- a/package/system/ltq-dsl/patches/100-dsl_compat.patch +++ /dev/null @@ -1,125 +0,0 @@ ---- a/src/include/drv_dsl_cpe_device_danube.h -+++ b/src/include/drv_dsl_cpe_device_danube.h -@@ -24,7 +24,7 @@ - #include "drv_dsl_cpe_simulator_danube.h" - #else - /* Include for the low level driver interface header file */ --#include "asm/ifx/ifx_mei_bsp.h" -+#include "mei/ifxmips_mei_interface.h" - #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/ - - #define DSL_MAX_LINE_NUMBER 1 ---- a/src/common/drv_dsl_cpe_os_linux.c -+++ b/src/common/drv_dsl_cpe_os_linux.c -@@ -11,6 +11,7 @@ - #ifdef __LINUX__ - - #define DSL_INTERN -+#include <linux/device.h> - - #include "drv_dsl_cpe_api.h" - #include "drv_dsl_cpe_api_ioctl.h" -@@ -34,9 +35,13 @@ - static DSL_ssize_t DSL_DRV_Write(DSL_DRV_file_t *pFile, const DSL_char_t * pBuf, - DSL_DRV_size_t nSize, DSL_DRV_offset_t * pLoff); - -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, DSL_DRV_file_t * pFile, - DSL_uint_t nCommand, unsigned long nArg); -- -+#else -+static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_file_t * pFile, -+ DSL_uint_t nCommand, unsigned long nArg); -+#endif - static int DSL_DRV_Open(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil); - - static int DSL_DRV_Release(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil); -@@ -72,7 +77,11 @@ - open: DSL_DRV_Open, - release: DSL_DRV_Release, - write: DSL_DRV_Write, -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - ioctl: DSL_DRV_Ioctls, -+#else -+ unlocked_ioctl: DSL_DRV_Ioctls, -+#endif - poll: DSL_DRV_Poll - }; - #else -@@ -168,10 +177,17 @@ - \return Success or failure. - \ingroup Internal - */ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - static DSL_int_t DSL_DRV_Ioctls(DSL_DRV_inode_t * pINode, - DSL_DRV_file_t * pFile, - DSL_uint_t nCommand, - unsigned long nArg) -+#else -+static DSL_int_t DSL_DRV_Ioctls( -+ DSL_DRV_file_t * pFile, -+ DSL_uint_t nCommand, -+ unsigned long nArg) -+#endif - { - DSL_int_t nErr=0; - DSL_boolean_t bIsInKernel; -@@ -216,16 +232,7 @@ - } - } - } -- -- if (pINode == DSL_NULL) -- { -- bIsInKernel = DSL_TRUE; -- } -- else -- { -- bIsInKernel = DSL_FALSE; -- } -- -+ bIsInKernel = DSL_FALSE; - if ( (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API) || - (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API_G997) || - (_IOC_TYPE(nCommand) == DSL_IOC_MAGIC_CPE_API_PM) || -@@ -1058,6 +1065,7 @@ - /* Entry point of driver */ - int __init DSL_ModuleInit(void) - { -+ struct class *dsl_class; - DSL_int_t i; - - printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF, -@@ -1104,7 +1112,8 @@ - } - - DSL_DRV_DevNodeInit(); -- -+ dsl_class = class_create(THIS_MODULE, "dsl_cpe_api"); -+ device_create(dsl_class, NULL, MKDEV(DRV_DSL_CPE_API_DEV_MAJOR, 0), NULL, "dsl_cpe_api"); - return 0; - } - ---- a/src/include/drv_dsl_cpe_os_linux.h -+++ b/src/include/drv_dsl_cpe_os_linux.h -@@ -17,17 +17,17 @@ - #endif - - #include <asm/ioctl.h> --#include <linux/autoconf.h> -+#include <generated/autoconf.h> - #include <linux/module.h> - #include <linux/kernel.h> - #include <linux/init.h> - #include <linux/ctype.h> - #include <linux/version.h> - #include <linux/spinlock.h> -- -+#include <linux/sched.h> - - #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) -- #include <linux/utsrelease.h> -+ #include <generated/utsrelease.h> - #endif - - #include <linux/types.h> diff --git a/package/system/ltq-dsl/patches/110-fix_status_polling_loop.patch b/package/system/ltq-dsl/patches/110-fix_status_polling_loop.patch deleted file mode 100644 index 870943d950..0000000000 --- a/package/system/ltq-dsl/patches/110-fix_status_polling_loop.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/src/device/drv_dsl_cpe_device_danube.c -+++ b/src/device/drv_dsl_cpe_device_danube.c -@@ -4069,7 +4069,7 @@ static DSL_Error_t DSL_DRV_DANUBE_XTUSys - - DSL_CTX_WRITE(pContext, nErrCode, xtseCurr, xtseCurr); - -- for (nRetry = 0; nRetry < 20; nRetry++) -+ for (nRetry = 0; nRetry < 20 && bStatusUpdated == DSL_FALSE; nRetry++) - { - /* Get STAT1 info*/ - nErrCode = DSL_DRV_DANUBE_CmvRead(pContext, DSL_CMV_GROUP_STAT, diff --git a/package/system/ltq-dsl/patches/500-portability.patch b/package/system/ltq-dsl/patches/500-portability.patch deleted file mode 100644 index d74314c77d..0000000000 --- a/package/system/ltq-dsl/patches/500-portability.patch +++ /dev/null @@ -1,227 +0,0 @@ ---- a/configure.in -+++ b/configure.in -@@ -310,7 +310,7 @@ - AC_ARG_ENABLE(kernelbuild, - AC_HELP_STRING(--enable-kernel-build=x,Set the target kernel build path), - [ -- if test -e $enableval/include/linux/autoconf.h; then -+ if test -e $enableval/include/linux/autoconf.h -o -e $enableval/include/generated/autoconf.h; then - AC_SUBST([KERNEL_BUILD_PATH],[$enableval]) - else - AC_MSG_ERROR([The kernel build directory is not valid or not configured!]) -@@ -333,12 +333,12 @@ - echo Set the lib_ifxos include path $enableval - AC_SUBST([IFXOS_INCLUDE_PATH],[$enableval]) - else -- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH -+ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH - AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) - fi - ], - [ -- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH -+ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH - AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) - ] - ) -@@ -1702,73 +1702,73 @@ - AC_SUBST([DISTCHECK_CONFIGURE_PARAMS],[$CONFIGURE_OPTIONS]) - - AC_CONFIG_COMMANDS_PRE([ --echo -e "------------------------------------------------------------------------" --echo -e " Configuration for drv_dsl_cpe_api:" --echo -e " Configure model type: $DSL_CONFIG_MODEL_TYPE" --echo -e " Source code location: $srcdir" --echo -e " Compiler: $CC" --echo -e " Compiler c-flags: $CFLAGS" --echo -e " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" --echo -e " Host System Type: $host" --echo -e " Install path: $prefix" --echo -e " Linux kernel include path: $KERNEL_INCL_PATH" --echo -e " Linux kernel build path: $KERNEL_BUILD_PATH" --echo -e " Linux kernel architecture: $KERNEL_ARCH" --echo -e " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" --echo -e " IFXOS include path: $IFXOS_INCLUDE_PATH" --echo -e " Driver Include Path $DSL_DRIVER_INCL_PATH" --echo -e " DSL device: $DSL_DEVICE_NAME" --echo -e " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" --echo -e " Channels per line: $DSL_CHANNELS_PER_LINE" --echo -e " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" --echo -e " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" --echo -e " Disable debug prints: $DSL_DEBUG_DISABLE" --echo -e " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" --echo -e " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" --echo -e " Include deprecated functions: $INCLUDE_DEPRECATED" --echo -e " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" --echo -e " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" --echo -e " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" --echo -e " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" --echo -e " Include ADSL LED: $INCLUDE_ADSL_LED" --echo -e " Include CEOC: $INCLUDE_DSL_CEOC" --echo -e " Include config get support: $INCLUDE_DSL_CONFIG_GET" --echo -e " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" --echo -e " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" --echo -e " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" --echo -e " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" --echo -e " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" --echo -e " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" --echo -e " Include G997 status: $INCLUDE_DSL_G997_STATUS" --echo -e " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" --echo -e " Include DSL Bonding: $INCLUDE_DSL_BONDING" --echo -e " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" --echo -e " Include DELT: $INCLUDE_DSL_DELT" --echo -e " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" --echo -e " Include PM: $INCLUDE_DSL_PM" --echo -e " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" --echo -e " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" --echo -e " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" --echo -e " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" --echo -e " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" --echo -e " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" --echo -e " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" --echo -e " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" --echo -e " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" --echo -e " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" --echo -e " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" --echo -e " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" --echo -e " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" --echo -e " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" --echo -e " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" --echo -e " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" --echo -e " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" --echo -e "----------------------- deprectated ! ----------------------------------" --echo -e " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" --echo -e "" --echo -e " Settings:" --echo -e " Configure options: $CONFIGURE_OPTIONS" --echo -e "------------------------------------------------------------------------" -+echo "------------------------------------------------------------------------" -+echo " Configuration for drv_dsl_cpe_api:" -+echo " Configure model type: $DSL_CONFIG_MODEL_TYPE" -+echo " Source code location: $srcdir" -+echo " Compiler: $CC" -+echo " Compiler c-flags: $CFLAGS" -+echo " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" -+echo " Host System Type: $host" -+echo " Install path: $prefix" -+echo " Linux kernel include path: $KERNEL_INCL_PATH" -+echo " Linux kernel build path: $KERNEL_BUILD_PATH" -+echo " Linux kernel architecture: $KERNEL_ARCH" -+echo " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" -+echo " IFXOS include path: $IFXOS_INCLUDE_PATH" -+echo " Driver Include Path $DSL_DRIVER_INCL_PATH" -+echo " DSL device: $DSL_DEVICE_NAME" -+echo " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" -+echo " Channels per line: $DSL_CHANNELS_PER_LINE" -+echo " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" -+echo " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" -+echo " Disable debug prints: $DSL_DEBUG_DISABLE" -+echo " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" -+echo " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" -+echo " Include deprecated functions: $INCLUDE_DEPRECATED" -+echo " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" -+echo " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" -+echo " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" -+echo " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" -+echo " Include ADSL LED: $INCLUDE_ADSL_LED" -+echo " Include CEOC: $INCLUDE_DSL_CEOC" -+echo " Include config get support: $INCLUDE_DSL_CONFIG_GET" -+echo " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" -+echo " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" -+echo " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" -+echo " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" -+echo " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" -+echo " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" -+echo " Include G997 status: $INCLUDE_DSL_G997_STATUS" -+echo " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" -+echo " Include DSL Bonding: $INCLUDE_DSL_BONDING" -+echo " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" -+echo " Include DELT: $INCLUDE_DSL_DELT" -+echo " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" -+echo " Include PM: $INCLUDE_DSL_PM" -+echo " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" -+echo " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" -+echo " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" -+echo " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" -+echo " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" -+echo " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" -+echo " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" -+echo " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" -+echo " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" -+echo " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" -+echo " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" -+echo " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" -+echo " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" -+echo " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" -+echo " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" -+echo " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" -+echo " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" -+echo "----------------------- deprectated ! ----------------------------------" -+echo " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" -+echo "" -+echo " Settings:" -+echo " Configure options: $CONFIGURE_OPTIONS" -+echo "------------------------------------------------------------------------" - ]) - - AC_CONFIG_FILES([Makefile src/Makefile]) ---- a/src/Makefile.am -+++ b/src/Makefile.am -@@ -303,7 +303,7 @@ - drv_dsl_cpe_api_OBJS = "$(subst .c,.o,$(filter %.c,$(drv_dsl_cpe_api_SOURCES)))" - - drv_dsl_cpe_api.ko: $(drv_dsl_cpe_api_SOURCES) -- @echo -e "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" -+ @echo "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" - if test ! -e common/drv_dsl_cpe_api.c ; then \ - echo "copy source files (as links only!)"; \ - for f in $(filter %.c,$(drv_dsl_cpe_api_SOURCES)); do \ -@@ -311,10 +311,10 @@ - cp -s $(addprefix @abs_srcdir@/,$$f) $(PWD)/`dirname $$f`/ ; \ - done \ - fi -- @echo -e "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild -- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild -- @echo -e "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild -- @echo -e "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild -+ @echo "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild -+ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild -+ @echo "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild -+ @echo "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild - $(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules - - clean-generic: ---- a/src/include/drv_dsl_cpe_os_linux.h -+++ b/src/include/drv_dsl_cpe_os_linux.h -@@ -16,8 +16,6 @@ - extern "C" { - #endif - --#include <asm/ioctl.h> --#include <generated/autoconf.h> - #include <linux/module.h> - #include <linux/kernel.h> - #include <linux/init.h> -@@ -26,8 +24,10 @@ - #include <linux/spinlock.h> - #include <linux/sched.h> - --#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) -- #include <generated/utsrelease.h> -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) -+#include <linux/utsrelease.h> -+#else -+#include <generated/utsrelease.h> - #endif - - #include <linux/types.h> -@@ -39,7 +39,8 @@ - #include <linux/delay.h> - #include <linux/poll.h> - #include <asm/uaccess.h> --#include <linux/smp_lock.h> -+//#include <linux/smp_lock.h> -+#include <asm/ioctl.h> - - #ifdef INCLUDE_DSL_CPE_API_IFXOS_SUPPORT - /** IFXOS includes*/ diff --git a/package/system/ltq-dsl/src/Makefile b/package/system/ltq-dsl/src/Makefile deleted file mode 100644 index 691518a74e..0000000000 --- a/package/system/ltq-dsl/src/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -obj-m = lantiq_mei.o lantiq_atm.o -lantiq_atm-objs := ifxmips_atm_core.o - -CFLAGS_MODULE+=-DSOC_TYPE_XWAY -EXTRA_CFLAGS+=-DSOC_TYPE_XWAY -ifeq ($(BUILD_VARIANT),danube) - CFLAGS_MODULE+=-DCONFIG_DANUBE - EXTRA_CFLAGS+=-DCONFIG_DANUBE - lantiq_atm-objs += ifxmips_atm_danube.o -endif -ifeq ($(BUILD_VARIANT),ase) - CFLAGS_MODULE+=-DCONFIG_AMAZON_SE - EXTRA_CFLAGS+=-DCONFIG_AMAZON_SE - lantiq_atm-objs += ifxmips_atm_amazon_se.o -endif -ifeq ($(BUILD_VARIANT),ar9) - CFLAGS_MODULE+=-DCONFIG_AR9 - EXTRA_CFLAGS+=-DCONFIG_AR9 - lantiq_atm-objs += ifxmips_atm_ar9.o -endif -ifeq ($(BUILD_VARIANT),vr9) - CFLAGS_MODULE+=-DCONFIG_VR9 - EXTRA_CFLAGS+=-DCONFIG_VR9 - lantiq_atm-objs += ifxmips_atm_vr9.o -endif diff --git a/package/system/ltq-dsl/src/ifx_atm.h b/package/system/ltq-dsl/src/ifx_atm.h deleted file mode 100644 index bf045a9754..0000000000 --- a/package/system/ltq-dsl/src/ifx_atm.h +++ /dev/null @@ -1,196 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifx_atm.h -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 17 Jun 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : Global ATM driver header file -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - -#ifndef IFX_ATM_H -#define IFX_ATM_H - - - -/*! - \defgroup IFX_ATM UEIP Project - ATM driver module - \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9. - */ - -/*! - \defgroup IFX_ATM_IOCTL IOCTL Commands - \ingroup IFX_ATM - \brief IOCTL Commands used by user application. - */ - -/*! - \defgroup IFX_ATM_STRUCT Structures - \ingroup IFX_ATM - \brief Structures used by user application. - */ - -/*! - \file ifx_atm.h - \ingroup IFX_ATM - \brief ATM driver header file - */ - - - -/* - * #################################### - * Definition - * #################################### - */ - -/*! - \addtogroup IFX_ATM_STRUCT - */ -/*@{*/ - -/* - * ATM MIB - */ - -/*! - \struct atm_cell_ifEntry_t - \brief Structure used for Cell Level MIB Counters. - - User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL". - */ -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */ - __u32 ifInErrors; /*!< counter of error ingress cells */ - __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */ - __u32 ifOutErrors; /*!< counter of error egress cells */ -} atm_cell_ifEntry_t; - -/*! - \struct atm_aal5_ifEntry_t - \brief Structure used for AAL5 Frame Level MIB Counters. - - User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5". - */ -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */ - __u32 ifInUcastPkts; /*!< counter of ingress packets */ - __u32 ifOutUcastPkts; /*!< counter of egress packets */ - __u32 ifInErrors; /*!< counter of error ingress packets */ - __u32 ifInDiscards; /*!< counter of dropped ingress packets */ - __u32 ifOutErros; /*!< counter of error egress packets */ - __u32 ifOutDiscards; /*!< counter of dropped egress packets */ -} atm_aal5_ifEntry_t; - -/*! - \struct atm_aal5_vcc_t - \brief Structure used for per PVC AAL5 Frame Level MIB Counters. - - This structure is a part of structure "atm_aal5_vcc_x_t". - */ -typedef struct { - __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */ - __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet - __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */ -} atm_aal5_vcc_t; - -/*! - \struct atm_aal5_vcc_x_t - \brief Structure used for per PVC AAL5 Frame Level MIB Counters. - - User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC". - */ -typedef struct { - int vpi; /*!< VPI of the VCC to get MIB counters */ - int vci; /*!< VCI of the VCC to get MIB counters */ - atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */ -} atm_aal5_vcc_x_t; - -/*@}*/ - - - -/* - * #################################### - * IOCTL - * #################################### - */ - -/*! - \addtogroup IFX_ATM_IOCTL - */ -/*@{*/ - -/* - * ioctl Command - */ -/*! - \brief ATM IOCTL Magic Number - */ -#define PPE_ATM_IOC_MAGIC 'o' -/*! - \brief ATM IOCTL Command - Get Cell Level MIB Counters - - This command is obsolete. User can get cell level MIB from DSL API. - This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get AAL5 Level MIB Counters - - Get AAL5 packet counters. - This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get Per PVC MIB Counters - - Get AAL5 packet counters for each PVC. - This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters. - */ -#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t) -/*! - \brief Total Number of ATM IOCTL Commands - */ -#define PPE_ATM_IOC_MAXNR 3 - -/*@}*/ - - - -/* - * #################################### - * API - * #################################### - */ - -#ifdef __KERNEL__ -struct port_cell_info { - unsigned int port_num; - unsigned int tx_link_rate[2]; -}; -#endif - - - -#endif // IFX_ATM_H - diff --git a/package/system/ltq-dsl/src/ifxmips_atm.h b/package/system/ltq-dsl/src/ifxmips_atm.h deleted file mode 100644 index ed90b5d4d7..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm.h +++ /dev/null @@ -1,172 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifx_atm.h -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 17 Jun 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : Global ATM driver header file -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - -#ifndef IFX_ATM_H -#define IFX_ATM_H - - - -/*! - \defgroup IFX_ATM UEIP Project - ATM driver module - \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9. - */ - -/*! - \defgroup IFX_ATM_IOCTL IOCTL Commands - \ingroup IFX_ATM - \brief IOCTL Commands used by user application. - */ - -/*! - \defgroup IFX_ATM_STRUCT Structures - \ingroup IFX_ATM - \brief Structures used by user application. - */ - -/*! - \file ifx_atm.h - \ingroup IFX_ATM - \brief ATM driver header file - */ - - - -/* - * #################################### - * Definition - * #################################### - */ - -/*! - \addtogroup IFX_ATM_STRUCT - */ -/*@{*/ - -/* - * ATM MIB - */ - -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */ - __u32 ifInErrors; /*!< counter of error ingress cells */ - __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */ - __u32 ifOutErrors; /*!< counter of error egress cells */ -} atm_cell_ifEntry_t; - -typedef struct { - __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */ - __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */ - __u32 ifInUcastPkts; /*!< counter of ingress packets */ - __u32 ifOutUcastPkts; /*!< counter of egress packets */ - __u32 ifInErrors; /*!< counter of error ingress packets */ - __u32 ifInDiscards; /*!< counter of dropped ingress packets */ - __u32 ifOutErros; /*!< counter of error egress packets */ - __u32 ifOutDiscards; /*!< counter of dropped egress packets */ -} atm_aal5_ifEntry_t; - -typedef struct { - __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */ - __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet - __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */ -} atm_aal5_vcc_t; - -typedef struct { - int vpi; /*!< VPI of the VCC to get MIB counters */ - int vci; /*!< VCI of the VCC to get MIB counters */ - atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */ -} atm_aal5_vcc_x_t; - -/*@}*/ - - - -/* - * #################################### - * IOCTL - * #################################### - */ - -/*! - \addtogroup IFX_ATM_IOCTL - */ -/*@{*/ - -/* - * ioctl Command - */ -/*! - \brief ATM IOCTL Magic Number - */ -#define PPE_ATM_IOC_MAGIC 'o' -/*! - \brief ATM IOCTL Command - Get Cell Level MIB Counters - - This command is obsolete. User can get cell level MIB from DSL API. - This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get AAL5 Level MIB Counters - - Get AAL5 packet counters. - This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters. - */ -#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t) -/*! - \brief ATM IOCTL Command - Get Per PVC MIB Counters - - Get AAL5 packet counters for each PVC. - This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters. - */ -#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t) -/*! - \brief Total Number of ATM IOCTL Commands - */ -#define PPE_ATM_IOC_MAXNR 3 - -/*@}*/ - - - -/* - * #################################### - * API - * #################################### - */ - -#ifdef __KERNEL__ -struct port_cell_info { - unsigned int port_num; - unsigned int tx_link_rate[2]; -}; -#endif - - - -#endif // IFX_ATM_H - diff --git a/package/system/ltq-dsl/src/ifxmips_atm_amazon_se.c b/package/system/ltq-dsl/src/ifxmips_atm_amazon_se.c deleted file mode 100644 index 1028815927..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_amazon_se.c +++ /dev/null @@ -1,324 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_amazon_se.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/clk.h> -#include <asm/delay.h> - -/* - * Chip Specific Head File - */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#include "ifxmips_atm_core.h" -#include "ifxmips_atm_fw_amazon_se.h" - - - -/* - * #################################### - * Definition - * #################################### - */ - -/* - * EMA Settings - */ -#define EMA_CMD_BUF_LEN 0x0040 -#define EMA_CMD_BASE_ADDR (0x00001580 << 2) -#define EMA_DATA_BUF_LEN 0x0100 -#define EMA_DATA_BASE_ADDR (0x00000B00 << 2) -#define EMA_WRITE_BURST 0x2 -#define EMA_READ_BURST 0x2 - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Hardware Init/Uninit Functions - */ -static inline void init_pmu(void); -static inline void uninit_pmu(void); -static inline void reset_ppe(void); -static inline void init_ema(void); -static inline void init_mailbox(void); -static inline void init_atm_tc(void); -static inline void clear_share_buffer(void); - - - -/* - * #################################### - * Local Variable - * #################################### - */ - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static inline void init_pmu(void) -{ - //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); -/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - //PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_enable(clk); -} - -static inline void uninit_pmu(void) -{ -/* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - //PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_disable(clk); -} - -static inline void reset_ppe(void) -{ -#ifdef MODULE -/* unsigned int etop_cfg; - unsigned int etop_mdio_cfg; - unsigned int etop_ig_plen_ctrl; - unsigned int enet_mac_cfg; - - etop_cfg = *IFX_PP32_ETOP_CFG; - etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG; - etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL; - enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG; - - *IFX_PP32_ETOP_CFG = (*IFX_PP32_ETOP_CFG & ~0x03C0) | 0x0001; - - // reset PPE - ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); - - *IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg; - *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl; - *IFX_PP32_ENET_MAC_CFG = enet_mac_cfg; - *IFX_PP32_ETOP_CFG = etop_cfg;*/ -#endif -} - -static inline void init_ema(void) -{ - IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG); - IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG); - IFX_REG_W32(0x000000FF, EMA_IER); - IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG); -} - -static inline void init_mailbox(void) -{ - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU1_IER); - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU3_IER); -} - -static inline void init_atm_tc(void) -{ - IFX_REG_W32(0x0000, DREG_AT_CTRL); - IFX_REG_W32(0x0000, DREG_AR_CTRL); - IFX_REG_W32(0x0, DREG_AT_IDLE0); - IFX_REG_W32(0x0, DREG_AT_IDLE1); - IFX_REG_W32(0x0, DREG_AR_IDLE0); - IFX_REG_W32(0x0, DREG_AR_IDLE1); - IFX_REG_W32(0x40, RFBI_CFG); - IFX_REG_W32(0x0700, SFSM_DBA0); - IFX_REG_W32(0x0818, SFSM_DBA1); - IFX_REG_W32(0x0930, SFSM_CBA0); - IFX_REG_W32(0x0944, SFSM_CBA1); - IFX_REG_W32(0x14014, SFSM_CFG0); - IFX_REG_W32(0x14014, SFSM_CFG1); - IFX_REG_W32(0x0958, FFSM_DBA0); - IFX_REG_W32(0x09AC, FFSM_DBA1); - IFX_REG_W32(0x10006, FFSM_CFG0); - IFX_REG_W32(0x10006, FFSM_CFG1); - IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC0); - IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC1); -} - -static inline void clear_share_buffer(void) -{ - volatile u32 *p = SB_RAM0_ADDR(0); - unsigned int i; - - for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN; i++ ) - IFX_REG_W32(0, p++); -} - -/* - * Description: - * Download PPE firmware binary code. - * Input: - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) -{ - volatile u32 *dest; - - if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 - || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; - - if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) - IFX_REG_W32(0x00, CDM_CFG); - else - IFX_REG_W32(0x04, CDM_CFG); - - /* copy code */ - dest = CDM_CODE_MEMORY(0, 0); - while ( code_dword_len-- > 0 ) - IFX_REG_W32(*code_src++, dest++); - - /* copy data */ - dest = CDM_DATA_MEMORY(0, 0); - while ( data_dword_len-- > 0 ) - IFX_REG_W32(*data_src++, dest++); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) -{ - ASSERT(major != NULL, "pointer is NULL"); - ASSERT(minor != NULL, "pointer is NULL"); - -#ifdef VER_IN_FIRMWARE - *major = FW_VER_ID->major; - *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif -} - -void ifx_atm_init_chip(void) -{ - init_pmu(); - - reset_ppe(); - - init_ema(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); -} - -void ifx_atm_uninit_chip(void) -{ - uninit_pmu(); -} - -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) -{ - int ret; - - /* download firmware */ - ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; - - /* run PP32 */ - IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL); - - /* idle for a while to let PP32 init itself */ - udelay(10); - - return IFX_SUCCESS; -} - -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) -{ - /* halt PP32 */ - IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL); -} diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ar9.c b/package/system/ltq-dsl/src/ifxmips_atm_ar9.c deleted file mode 100644 index 31b89f5c84..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_ar9.c +++ /dev/null @@ -1,295 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_ar9.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/clk.h> -#include <asm/delay.h> - -/* - * Chip Specific Head File - */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#define IFX_MEI_BSP 1 -#include "ifxmips_mei_interface.h" -#include "ifxmips_atm_core.h" -#include "ifxmips_atm_ppe_common.h" - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #include "ifxmips_atm_fw_ar9_retx.h" -#else - #include "ifxmips_atm_fw_ar9.h" -#endif - - - -/* - * #################################### - * Definition - * #################################### - */ - -/* - * EMA Settings - */ -#define EMA_CMD_BUF_LEN 0x0040 -#define EMA_CMD_BASE_ADDR (0x00003B80 << 2) -#define EMA_DATA_BUF_LEN 0x0100 -#define EMA_DATA_BASE_ADDR (0x00003C00 << 2) -#define EMA_WRITE_BURST 0x2 -#define EMA_READ_BURST 0x2 - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Hardware Init/Uninit Functions - */ -static inline void init_pmu(void); -static inline void uninit_pmu(void); -static inline void reset_ppe(void); -static inline void init_ema(void); -static inline void init_mailbox(void); -static inline void init_atm_tc(void); -static inline void clear_share_buffer(void); - - - -/* - * #################################### - * Local Variable - * #################################### - */ - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static inline void init_pmu(void) -{ - //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); -/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_enable(clk); -} - -static inline void uninit_pmu(void) -{ - /* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/ - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_disable(clk); -} - -static inline void reset_ppe(void) -{ -#ifdef MODULE - // reset PPE - //ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); -#endif -} - -static inline void init_ema(void) -{ - IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG); - IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG); - IFX_REG_W32(0x000000FF, EMA_IER); - IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG); -} - -static inline void init_mailbox(void) -{ - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU1_IER); - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU3_IER); -} - -static inline void init_atm_tc(void) -{ -} - -static inline void clear_share_buffer(void) -{ - volatile u32 *p = SB_RAM0_ADDR(0); - unsigned int i; - - for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN + SB_RAM4_DWLEN; i++ ) - IFX_REG_W32(0, p++); -} - -/* - * Description: - * Download PPE firmware binary code. - * Input: - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) -{ - volatile u32 *dest; - - if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 - || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; - - if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) - IFX_REG_W32(0x00, CDM_CFG); - else - IFX_REG_W32(0x04, CDM_CFG); - - /* copy code */ - dest = CDM_CODE_MEMORY(0, 0); - while ( code_dword_len-- > 0 ) - IFX_REG_W32(*code_src++, dest++); - - /* copy data */ - dest = CDM_DATA_MEMORY(0, 0); - while ( data_dword_len-- > 0 ) - IFX_REG_W32(*data_src++, dest++); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) -{ - ASSERT(major != NULL, "pointer is NULL"); - ASSERT(minor != NULL, "pointer is NULL"); - -#if (defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX) || defined(VER_IN_FIRMWARE) - *major = FW_VER_ID->major; - *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif -} - -void ifx_atm_init_chip(void) -{ - init_pmu(); - - reset_ppe(); - - init_ema(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); -} - -void ifx_atm_uninit_chip(void) -{ - uninit_pmu(); -} - -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) -{ - int ret; - - /* download firmware */ - ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; - - /* run PP32 */ - IFX_REG_W32(DBG_CTRL_RESTART, PP32_DBG_CTRL(0)); - - /* idle for a while to let PP32 init itself */ - udelay(10); - - return IFX_SUCCESS; -} - -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) -{ - /* halt PP32 */ - IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0)); -} diff --git a/package/system/ltq-dsl/src/ifxmips_atm_core.c b/package/system/ltq-dsl/src/ifxmips_atm_core.c deleted file mode 100644 index 92853bb886..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_core.c +++ /dev/null @@ -1,4770 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_core.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Version No. - * #################################### - */ - -#define IFX_ATM_VER_MAJOR 1 -#define IFX_ATM_VER_MID 0 -#define IFX_ATM_VER_MINOR 19 - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/vmalloc.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/atmdev.h> -#include <linux/atm.h> -#include <linux/clk.h> -#include <linux/interrupt.h> - -/* - * Chip Specific Head File - */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#define IFX_MEI_BSP 1 -#include "ifxmips_mei_interface.h" -#include "ifxmips_atm_core.h" - - - -/* - * #################################### - * Kernel Version Adaption - * #################################### - */ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11) - #define MODULE_PARM_ARRAY(a, b) module_param_array(a, int, NULL, 0) - #define MODULE_PARM(a, b) module_param(a, int, 0) -#else - #define MODULE_PARM_ARRAY(a, b) MODULE_PARM(a, b) -#endif - - - -/*! - \addtogroup IFXMIPS_ATM_MODULE_PARAMS - */ -/*@{*/ -/* - * #################################### - * Parameters to Configure PPE - * #################################### - */ -/*! - \brief QSB cell delay variation due to concurrency - */ -static int qsb_tau = 1; /* QSB cell delay variation due to concurrency */ -/*! - \brief QSB scheduler burst length - */ -static int qsb_srvm = 0x0F; /* QSB scheduler burst length */ -/*! - \brief QSB time step, all legal values are 1, 2, 4 - */ -static int qsb_tstep = 4 ; /* QSB time step, all legal values are 1, 2, 4 */ - -/*! - \brief Write descriptor delay - */ -static int write_descriptor_delay = 0x20; /* Write descriptor delay */ - -/*! - \brief AAL5 padding byte ('~') - */ -static int aal5_fill_pattern = 0x007E; /* AAL5 padding byte ('~') */ -/*! - \brief Max frame size for RX - */ -static int aal5r_max_packet_size = 0x0700; /* Max frame size for RX */ -/*! - \brief Min frame size for RX - */ -static int aal5r_min_packet_size = 0x0000; /* Min frame size for RX */ -/*! - \brief Max frame size for TX - */ -static int aal5s_max_packet_size = 0x0700; /* Max frame size for TX */ -/*! - \brief Min frame size for TX - */ -static int aal5s_min_packet_size = 0x0000; /* Min frame size for TX */ -/*! - \brief Drop error packet in RX path - */ -static int aal5r_drop_error_packet = 1; /* Drop error packet in RX path */ - -/*! - \brief Number of descriptors per DMA RX channel - */ -static int dma_rx_descriptor_length = 128; /* Number of descriptors per DMA RX channel */ -/*! - \brief Number of descriptors per DMA TX channel - */ -static int dma_tx_descriptor_length = 64; /* Number of descriptors per DMA TX channel */ -/*! - \brief PPE core clock cycles between descriptor write and effectiveness in external RAM - */ -static int dma_rx_clp1_descriptor_threshold = 38; -/*@}*/ - -MODULE_PARM(qsb_tau, "i"); -MODULE_PARM_DESC(qsb_tau, "Cell delay variation. Value must be > 0"); -MODULE_PARM(qsb_srvm, "i"); -MODULE_PARM_DESC(qsb_srvm, "Maximum burst size"); -MODULE_PARM(qsb_tstep, "i"); -MODULE_PARM_DESC(qsb_tstep, "n*32 cycles per sbs cycles n=1,2,4"); - -MODULE_PARM(write_descriptor_delay, "i"); -MODULE_PARM_DESC(write_descriptor_delay, "PPE core clock cycles between descriptor write and effectiveness in external RAM"); - -MODULE_PARM(aal5_fill_pattern, "i"); -MODULE_PARM_DESC(aal5_fill_pattern, "Filling pattern (PAD) for AAL5 frames"); -MODULE_PARM(aal5r_max_packet_size, "i"); -MODULE_PARM_DESC(aal5r_max_packet_size, "Max packet size in byte for downstream AAL5 frames"); -MODULE_PARM(aal5r_min_packet_size, "i"); -MODULE_PARM_DESC(aal5r_min_packet_size, "Min packet size in byte for downstream AAL5 frames"); -MODULE_PARM(aal5s_max_packet_size, "i"); -MODULE_PARM_DESC(aal5s_max_packet_size, "Max packet size in byte for upstream AAL5 frames"); -MODULE_PARM(aal5s_min_packet_size, "i"); -MODULE_PARM_DESC(aal5s_min_packet_size, "Min packet size in byte for upstream AAL5 frames"); -MODULE_PARM(aal5r_drop_error_packet, "i"); -MODULE_PARM_DESC(aal5r_drop_error_packet, "Non-zero value to drop error packet for downstream"); - -MODULE_PARM(dma_rx_descriptor_length, "i"); -MODULE_PARM_DESC(dma_rx_descriptor_length, "Number of descriptor assigned to DMA RX channel (>16)"); -MODULE_PARM(dma_tx_descriptor_length, "i"); -MODULE_PARM_DESC(dma_tx_descriptor_length, "Number of descriptor assigned to DMA TX channel (>16)"); -MODULE_PARM(dma_rx_clp1_descriptor_threshold, "i"); -MODULE_PARM_DESC(dma_rx_clp1_descriptor_threshold, "Descriptor threshold for cells with cell loss priority 1"); - - - -/* - * #################################### - * Definition - * #################################### - */ - -#define ENABLE_LED_FRAMEWORK 1 - -#define DUMP_SKB_LEN ~0 - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Network Operations - */ -static int ppe_ioctl(struct atm_dev *, unsigned int, void *); -static int ppe_open(struct atm_vcc *); -static void ppe_close(struct atm_vcc *); -static int ppe_send(struct atm_vcc *, struct sk_buff *); -static int ppe_send_oam(struct atm_vcc *, void *, int); -static int ppe_change_qos(struct atm_vcc *, struct atm_qos *, int); - -/* - * ADSL LED - */ -static INLINE void adsl_led_flash(void); - -/* - * 64-bit operation used by MIB calculation - */ -static INLINE void u64_add_u32(ppe_u64_t, unsigned int, ppe_u64_t *); - -/* - * buffer manage functions - */ -static INLINE struct sk_buff* alloc_skb_rx(void); -static INLINE struct sk_buff* alloc_skb_tx(unsigned int); -struct sk_buff* atm_alloc_tx(struct atm_vcc *, unsigned int); -static INLINE void atm_free_tx_skb_vcc(struct sk_buff *, struct atm_vcc *); -static INLINE struct sk_buff *get_skb_rx_pointer(unsigned int); -static INLINE int get_tx_desc(unsigned int); - -/* - * mailbox handler and signal function - */ -static INLINE void mailbox_oam_rx_handler(void); -static INLINE void mailbox_aal_rx_handler(void); -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET - static void do_ppe_tasklet(unsigned long); -#endif -static irqreturn_t mailbox_irq_handler(int, void *); -static INLINE void mailbox_signal(unsigned int, int); - -/* - * QSB & HTU setting functions - */ -static void set_qsb(struct atm_vcc *, struct atm_qos *, unsigned int); -static void qsb_global_set(void); -static INLINE void set_htu_entry(unsigned int, unsigned int, unsigned int, int, int); -static INLINE void clear_htu_entry(unsigned int); -static void validate_oam_htu_entry(void); -static void invalidate_oam_htu_entry(void); - -/* - * look up for connection ID - */ -static INLINE int find_vpi(unsigned int); -static INLINE int find_vpivci(unsigned int, unsigned int); -static INLINE int find_vcc(struct atm_vcc *); - -/* - * ReTX functions - */ -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static void retx_polling_func(unsigned long); - static int init_atm_tc_retrans_param(void); - static void clear_atm_tc_retrans_param(void); -#endif - - -/* - * Debug Functions - */ -#if defined(DEBUG_DUMP_SKB) && DEBUG_DUMP_SKB - static void dump_skb(struct sk_buff *, unsigned int, char *, int, int, int); -#else - #define dump_skb(skb, len, title, port, ch, is_tx) do {} while (0) -#endif -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - static void skb_swap(struct sk_buff *, unsigned int); -#else - #define skb_swap(skb, byteoff) do {} while (0) -#endif - -/* - * Proc File Functions - */ -static INLINE void proc_file_create(void); -static INLINE void proc_file_delete(void); -static int proc_read_version(char *, char **, off_t, int, int *, void *); -static int proc_read_mib(char *, char **, off_t, int, int *, void *); -static int proc_write_mib(struct file *, const char *, unsigned long, void *); -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static int proc_read_retx_mib(char *, char **, off_t, int, int *, void *); - static int proc_write_retx_mib(struct file *, const char *, unsigned long, void *); -#endif -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - static int proc_read_dbg(char *, char **, off_t, int, int *, void *); - static int proc_write_dbg(struct file *, const char *, unsigned long, void *); - static int proc_write_mem(struct file *, const char *, unsigned long, void *); - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) || defined(CONFIG_DANUBE) || defined(CONFIG_AMAZON_SE) - static int proc_read_pp32(char *, char **, off_t, int, int *, void *); - static int proc_write_pp32(struct file *, const char *, unsigned long, void *); - #endif -#endif -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - static int proc_read_htu(char *, char **, off_t, int, int *, void *); - static int proc_read_txq(char *, char **, off_t, int, int *, void *); - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static int proc_read_retx_fw(char *, char **, off_t, int, int *, void *); - static int proc_read_retx_stats(char *, char **, off_t, int, int *, void *); - static int proc_write_retx_stats(struct file *, const char *, unsigned long, void *); - static int proc_read_retx_cfg(char *, char **, off_t, int, int *, void *); - static int proc_write_retx_cfg(struct file *, const char *, unsigned long, void *); - static int proc_read_retx_dsl_param(char *, char **, off_t, int, int *, void *); - #endif -#endif - -/* - * Proc Help Functions - */ -static int stricmp(const char *, const char *); -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - static int strincmp(const char *, const char *, int); - static int get_token(char **, char **, int *, int *); - static unsigned int get_number(char **, int *, int); - static void ignore_space(char **, int *); -#endif -static INLINE int ifx_atm_version(char *); - -/* - * Init & clean-up functions - */ -static INLINE void check_parameters(void); -static INLINE int init_priv_data(void); -static INLINE void clear_priv_data(void); -static INLINE void init_rx_tables(void); -static INLINE void init_tx_tables(void); - -/* - * Exteranl Function - */ -#if defined(CONFIG_IFX_OAM) || defined(CONFIG_IFX_OAM_MODULE) - extern void ifx_push_oam(unsigned char *); -#else - static inline void ifx_push_oam(unsigned char *dummy) {} -#endif -#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE) - #if !defined(ENABLE_LED_FRAMEWORK) || !ENABLE_LED_FRAMEWORK - extern int ifx_mei_atm_led_blink(void) __attribute__ ((weak)); - #endif - extern int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr) __attribute__ ((weak)); -#else - #if !defined(ENABLE_LED_FRAMEWORK) || !ENABLE_LED_FRAMEWORK - static inline int ifx_mei_atm_led_blink(void) { return IFX_SUCCESS; } - #endif - static inline int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr) - { - if ( is_showtime != NULL ) - *is_showtime = 0; - return IFX_SUCCESS; - } -#endif - -/* - * External variable - */ -struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL; - - -//extern struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int); -#if defined(CONFIG_IFXMIPS_DSL_CPE_MEI) || defined(CONFIG_IFXMIPS_DSL_CPE_MEI_MODULE) - extern int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) __attribute__ ((weak)); - extern int (*ifx_mei_atm_showtime_exit)(void) __attribute__ ((weak)); -#else - int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL; - EXPORT_SYMBOL(ifx_mei_atm_showtime_enter); - int (*ifx_mei_atm_showtime_exit)(void) = NULL; - EXPORT_SYMBOL(ifx_mei_atm_showtime_exit); -#endif - - - -/* - * #################################### - * Local Variable - * #################################### - */ - -static struct atm_priv_data g_atm_priv_data; - -static struct atmdev_ops g_ifx_atm_ops = { - .open = ppe_open, - .close = ppe_close, - .ioctl = ppe_ioctl, - .send = ppe_send, - .send_oam = ppe_send_oam, - .change_qos = ppe_change_qos, - .owner = THIS_MODULE, -}; - -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET - DECLARE_TASKLET(g_dma_tasklet, do_ppe_tasklet, 0); -#endif - -static int g_showtime = 0; -static void *g_xdata_addr = NULL; - -#if 0 /*--- defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK ---*/ - static void *g_data_led_trigger = NULL; -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - static unsigned long g_retx_playout_buffer = 0; - - static volatile int g_retx_htu = 1; - static struct dsl_param g_dsl_param = {0}; - static int g_retx_polling_cnt = HZ; - static struct timeval g_retx_polling_start = {0}, g_retx_polling_end = {0}; - static struct timer_list g_retx_polling_timer; -#endif - -unsigned int ifx_atm_dbg_enable = 0; - -static struct proc_dir_entry* g_atm_dir = NULL; - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static int ppe_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg) -{ - int ret = 0; - atm_cell_ifEntry_t mib_cell; - atm_aal5_ifEntry_t mib_aal5; - atm_aal5_vcc_x_t mib_vcc; - unsigned int value; - int conn; - - if ( _IOC_TYPE(cmd) != PPE_ATM_IOC_MAGIC - || _IOC_NR(cmd) >= PPE_ATM_IOC_MAXNR ) - return -ENOTTY; - - if ( _IOC_DIR(cmd) & _IOC_READ ) - ret = !access_ok(VERIFY_WRITE, arg, _IOC_SIZE(cmd)); - else if ( _IOC_DIR(cmd) & _IOC_WRITE ) - ret = !access_ok(VERIFY_READ, arg, _IOC_SIZE(cmd)); - if ( ret ) - return -EFAULT; - - switch ( cmd ) - { - case PPE_ATM_MIB_CELL: /* cell level MIB */ - /* These MIB should be read at ARC side, now put zero only. */ - mib_cell.ifHCInOctets_h = 0; - mib_cell.ifHCInOctets_l = 0; - mib_cell.ifHCOutOctets_h = 0; - mib_cell.ifHCOutOctets_l = 0; - mib_cell.ifInErrors = 0; - mib_cell.ifInUnknownProtos = WAN_MIB_TABLE->wrx_drophtu_cell; - mib_cell.ifOutErrors = 0; - - ret = sizeof(mib_cell) - copy_to_user(arg, &mib_cell, sizeof(mib_cell)); - break; - - case PPE_ATM_MIB_AAL5: /* AAL5 MIB */ - value = WAN_MIB_TABLE->wrx_total_byte; - u64_add_u32(g_atm_priv_data.wrx_total_byte, value - g_atm_priv_data.prev_wrx_total_byte, &g_atm_priv_data.wrx_total_byte); - g_atm_priv_data.prev_wrx_total_byte = value; - mib_aal5.ifHCInOctets_h = g_atm_priv_data.wrx_total_byte.h; - mib_aal5.ifHCInOctets_l = g_atm_priv_data.wrx_total_byte.l; - - value = WAN_MIB_TABLE->wtx_total_byte; - u64_add_u32(g_atm_priv_data.wtx_total_byte, value - g_atm_priv_data.prev_wtx_total_byte, &g_atm_priv_data.wtx_total_byte); - g_atm_priv_data.prev_wtx_total_byte = value; - mib_aal5.ifHCOutOctets_h = g_atm_priv_data.wtx_total_byte.h; - mib_aal5.ifHCOutOctets_l = g_atm_priv_data.wtx_total_byte.l; - - mib_aal5.ifInUcastPkts = g_atm_priv_data.wrx_pdu; - mib_aal5.ifOutUcastPkts = WAN_MIB_TABLE->wtx_total_pdu; - mib_aal5.ifInErrors = WAN_MIB_TABLE->wrx_err_pdu; - mib_aal5.ifInDiscards = WAN_MIB_TABLE->wrx_dropdes_pdu + g_atm_priv_data.wrx_drop_pdu; - mib_aal5.ifOutErros = g_atm_priv_data.wtx_err_pdu; - mib_aal5.ifOutDiscards = g_atm_priv_data.wtx_drop_pdu; - - ret = sizeof(mib_aal5) - copy_to_user(arg, &mib_aal5, sizeof(mib_aal5)); - break; - - case PPE_ATM_MIB_VCC: /* VCC related MIB */ - copy_from_user(&mib_vcc, arg, sizeof(mib_vcc)); - conn = find_vpivci(mib_vcc.vpi, mib_vcc.vci); - if ( conn >= 0 ) - { - mib_vcc.mib_vcc.aal5VccCrcErrors = g_atm_priv_data.conn[conn].aal5_vcc_crc_err; - mib_vcc.mib_vcc.aal5VccOverSizedSDUs = g_atm_priv_data.conn[conn].aal5_vcc_oversize_sdu; - mib_vcc.mib_vcc.aal5VccSarTimeOuts = 0; /* no timer support */ - ret = sizeof(mib_vcc) - copy_to_user(arg, &mib_vcc, sizeof(mib_vcc)); - } - else - ret = -EINVAL; - break; - - default: - ret = -ENOIOCTLCMD; - } - - return ret; -} - -static int ppe_open(struct atm_vcc *vcc) -{ - int ret; - short vpi = vcc->vpi; - int vci = vcc->vci; - struct port *port = &g_atm_priv_data.port[(int)vcc->dev->dev_data]; - int conn; - int f_enable_irq = 0; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - int sys_flag; -#endif - - if ( vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0 ) - return -EPROTONOSUPPORT; - -#if !defined(DISABLE_QOS_WORKAROUND) || !DISABLE_QOS_WORKAROUND - /* check bandwidth */ - - if (vcc->qos.txtp.traffic_class == ATM_CBR && - vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("CBR set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - if(vcc->qos.txtp.traffic_class == ATM_VBR_RT && - vcc->qos.txtp.max_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("VBR RT set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - - if (vcc->qos.txtp.traffic_class == ATM_VBR_NRT && - vcc->qos.txtp.scr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("VBR NRT set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - - if (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS && - vcc->qos.txtp.min_pcr > (port->tx_max_cell_rate - port->tx_current_cell_rate)) - { - printk("UBR PLUS set. %s, line %d returns EINVAL\n", __FUNCTION__, __LINE__); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - -#endif - - /* check existing vpi,vci */ - conn = find_vpivci(vpi, vci); - if ( conn >= 0 ) { - ret = -EADDRINUSE; - goto PPE_OPEN_EXIT; - } - - /* check whether it need to enable irq */ - if ( g_atm_priv_data.conn_table == 0 ) - f_enable_irq = 1; - - /* allocate connection */ - for ( conn = 0; conn < MAX_PVC_NUMBER; conn++ ) { - if ( test_and_set_bit(conn, &g_atm_priv_data.conn_table) == 0 ) { - g_atm_priv_data.conn[conn].vcc = vcc; - break; - } - } - if ( conn == MAX_PVC_NUMBER ) - { - printk("max_pvc_number reached\n"); - ret = -EINVAL; - goto PPE_OPEN_EXIT; - } - - /* reserve bandwidth */ - switch ( vcc->qos.txtp.traffic_class ) { - case ATM_CBR: - case ATM_VBR_RT: - port->tx_current_cell_rate += vcc->qos.txtp.max_pcr; - break; - case ATM_VBR_NRT: - port->tx_current_cell_rate += vcc->qos.txtp.scr; - break; - case ATM_UBR_PLUS: - port->tx_current_cell_rate += vcc->qos.txtp.min_pcr; - break; - } - - /* set qsb */ - set_qsb(vcc, &vcc->qos, conn); - - /* update atm_vcc structure */ - vcc->itf = (int)vcc->dev->dev_data; - vcc->vpi = vpi; - vcc->vci = vci; - set_bit(ATM_VF_READY, &vcc->flags); - - /* enable irq */ - if (f_enable_irq ) { - ifx_atm_alloc_tx = atm_alloc_tx; - - *MBOX_IGU1_ISRC = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); - *MBOX_IGU1_IER = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); - - enable_irq(PPE_MAILBOX_IGU1_INT); - } - - /* set port */ - WTX_QUEUE_CONFIG(conn + FIRST_QSB_QID)->sbid = (int)vcc->dev->dev_data; - - /* set htu entry */ - set_htu_entry(vpi, vci, conn, vcc->qos.aal == ATM_AAL5 ? 1 : 0, 0); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - // ReTX: occupy second QID - local_irq_save(sys_flag); - if ( g_retx_htu && vcc->qos.aal == ATM_AAL5 ) - { - int retx_conn = (conn + 8) % 16; // ReTX queue - - if ( retx_conn < MAX_PVC_NUMBER && test_and_set_bit(retx_conn, &g_atm_priv_data.conn_table) == 0 ) { - g_atm_priv_data.conn[retx_conn].vcc = vcc; - set_htu_entry(vpi, vci, retx_conn, vcc->qos.aal == ATM_AAL5 ? 1 : 0, 1); - } - } - local_irq_restore(sys_flag); -#endif - - ret = 0; - -PPE_OPEN_EXIT: - return ret; -} - -static void ppe_close(struct atm_vcc *vcc) -{ - int conn; - struct port *port; - struct connection *connection; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - int sys_flag; -#endif - - if ( vcc == NULL ) - return; - - /* get connection id */ - conn = find_vcc(vcc); - if ( conn < 0 ) { - err("can't find vcc"); - goto PPE_CLOSE_EXIT; - } - connection = &g_atm_priv_data.conn[conn]; - port = &g_atm_priv_data.port[connection->port]; - - /* clear htu */ - clear_htu_entry(conn); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - // ReTX: release second QID - local_irq_save(sys_flag); - if ( g_retx_htu && vcc->qos.aal == ATM_AAL5 ) - { - int retx_conn = (conn + 8) % 16; // ReTX queue - - if ( retx_conn < MAX_PVC_NUMBER && g_atm_priv_data.conn[retx_conn].vcc == vcc ) { - clear_htu_entry(retx_conn); - g_atm_priv_data.conn[retx_conn].vcc = NULL; - g_atm_priv_data.conn[retx_conn].aal5_vcc_crc_err = 0; - g_atm_priv_data.conn[retx_conn].aal5_vcc_oversize_sdu = 0; - clear_bit(retx_conn, &g_atm_priv_data.conn_table); - } - } - local_irq_restore(sys_flag); -#endif - - /* release connection */ - connection->vcc = NULL; - connection->aal5_vcc_crc_err = 0; - connection->aal5_vcc_oversize_sdu = 0; - clear_bit(conn, &g_atm_priv_data.conn_table); - - /* disable irq */ - if ( g_atm_priv_data.conn_table == 0 ) { - disable_irq(PPE_MAILBOX_IGU1_INT); - ifx_atm_alloc_tx = NULL; - } - - /* release bandwidth */ - switch ( vcc->qos.txtp.traffic_class ) - { - case ATM_CBR: - case ATM_VBR_RT: - port->tx_current_cell_rate -= vcc->qos.txtp.max_pcr; - break; - case ATM_VBR_NRT: - port->tx_current_cell_rate -= vcc->qos.txtp.scr; - break; - case ATM_UBR_PLUS: - port->tx_current_cell_rate -= vcc->qos.txtp.min_pcr; - break; - } - -PPE_CLOSE_EXIT: - return; -} - -static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb) -{ - int ret; - int conn; - int desc_base; - struct tx_descriptor reg_desc = {0}; - - if ( vcc == NULL || skb == NULL ) - return -EINVAL; - - skb_orphan(skb); - skb_get(skb); - atm_free_tx_skb_vcc(skb, vcc); - - conn = find_vcc(vcc); - if ( conn < 0 ) { - ret = -EINVAL; - goto FIND_VCC_FAIL; - } - - if ( !g_showtime ) { - err("not in showtime"); - ret = -EIO; - goto PPE_SEND_FAIL; - } - - if ( vcc->qos.aal == ATM_AAL5 ) { - int byteoff; - int datalen; - struct tx_inband_header *header; - - datalen = skb->len; - byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1); - - if ( skb_headroom(skb) < byteoff + TX_INBAND_HEADER_LENGTH ) { - struct sk_buff *new_skb; - - new_skb = alloc_skb_tx(datalen); - if ( new_skb == NULL ) { - err("ALLOC_SKB_TX_FAIL"); - ret = -ENOMEM; - goto PPE_SEND_FAIL; - } - skb_put(new_skb, datalen); - memcpy(new_skb->data, skb->data, datalen); - dev_kfree_skb_any(skb); - skb = new_skb; - byteoff = (unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1); - } - - skb_push(skb, byteoff + TX_INBAND_HEADER_LENGTH); - - header = (struct tx_inband_header *)skb->data; - - /* setup inband trailer */ - header->uu = 0; - header->cpi = 0; - header->pad = aal5_fill_pattern; - header->res1 = 0; - - /* setup cell header */ - header->clp = (vcc->atm_options & ATM_ATMOPT_CLP) ? 1 : 0; - header->pti = ATM_PTI_US0; - header->vci = vcc->vci; - header->vpi = vcc->vpi; - header->gfc = 0; - - /* setup descriptor */ - reg_desc.dataptr = (unsigned int)skb->data >> 2; - reg_desc.datalen = datalen; - reg_desc.byteoff = byteoff; - reg_desc.iscell = 0; - } - else { - /* if data pointer is not aligned, allocate new sk_buff */ - if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 ) { - struct sk_buff *new_skb; - - err("skb->data not aligned"); - - new_skb = alloc_skb_tx(skb->len); - if ( new_skb == NULL ) { - err("ALLOC_SKB_TX_FAIL"); - ret = -ENOMEM; - goto PPE_SEND_FAIL; - } - skb_put(new_skb, skb->len); - memcpy(new_skb->data, skb->data, skb->len); - dev_kfree_skb_any(skb); - skb = new_skb; - } - - reg_desc.dataptr = (unsigned int)skb->data >> 2; - reg_desc.datalen = skb->len; - reg_desc.byteoff = 0; - reg_desc.iscell = 1; - } - - reg_desc.own = 1; - reg_desc.c = 1; - reg_desc.sop = reg_desc.eop = 1; - - desc_base = get_tx_desc(conn); - if ( desc_base < 0 ) { - err("ALLOC_TX_CONNECTION_FAIL"); - ret = -EIO; - goto PPE_SEND_FAIL; - } - - if ( vcc->stats ) - atomic_inc(&vcc->stats->tx); - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wtx_pdu++; - - /* update descriptor send pointer */ - if ( g_atm_priv_data.conn[conn].tx_skb[desc_base] != NULL ) - dev_kfree_skb_any(g_atm_priv_data.conn[conn].tx_skb[desc_base]); - g_atm_priv_data.conn[conn].tx_skb[desc_base] = skb; - - /* write discriptor to memory and write back cache */ -#ifdef CONFIG_DEBUG_SLAB - /* be sure that "redzone 1" is written back to memory */ - dma_cache_wback((unsigned long)skb->head, 32); -#endif - dma_cache_wback((unsigned long)skb_shinfo(skb), sizeof(struct skb_shared_info)); - dma_cache_wback((unsigned long)skb->data, skb->len); - g_atm_priv_data.conn[conn].tx_desc[desc_base] = reg_desc; - - dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, 0, conn, 1); - - mailbox_signal(conn, 1); - - adsl_led_flash(); - - return 0; - -FIND_VCC_FAIL: - err("FIND_VCC_FAIL"); - g_atm_priv_data.wtx_err_pdu++; - dev_kfree_skb_any(skb); - return ret; - -PPE_SEND_FAIL: - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wtx_drop_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->tx_err); - dev_kfree_skb_any(skb); - return ret; -} - -static int ppe_send_oam(struct atm_vcc *vcc, void *cell, int flags) -{ - int conn; - struct uni_cell_header *uni_cell_header = (struct uni_cell_header *)cell; - int desc_base; - struct sk_buff *skb; - struct tx_descriptor reg_desc = {0}; - - if ( ((uni_cell_header->pti == ATM_PTI_SEGF5 || uni_cell_header->pti == ATM_PTI_E2EF5) - && find_vpivci(uni_cell_header->vpi, uni_cell_header->vci) < 0) - || ((uni_cell_header->vci == 0x03 || uni_cell_header->vci == 0x04) - && find_vpi(uni_cell_header->vpi) < 0) ) - return -EINVAL; - - if ( !g_showtime ) { - err("not in showtime"); - return -EIO; - } - - conn = find_vcc(vcc); - if ( conn < 0 ) { - err("FIND_VCC_FAIL"); - return -EINVAL; - } - - skb = alloc_skb_tx(CELL_SIZE); - if ( skb == NULL ) { - err("ALLOC_SKB_TX_FAIL"); - return -ENOMEM; - } - memcpy(skb->data, cell, CELL_SIZE); - - reg_desc.dataptr = (unsigned int)skb->data >> 2; - reg_desc.datalen = CELL_SIZE; - reg_desc.byteoff = 0; - reg_desc.iscell = 1; - - reg_desc.own = 1; - reg_desc.c = 1; - reg_desc.sop = reg_desc.eop = 1; - - desc_base = get_tx_desc(conn); - if ( desc_base < 0 ) { - dev_kfree_skb_any(skb); - err("ALLOC_TX_CONNECTION_FAIL"); - return -EIO; - } - - if ( vcc->stats ) - atomic_inc(&vcc->stats->tx); - - /* update descriptor send pointer */ - if ( g_atm_priv_data.conn[conn].tx_skb[desc_base] != NULL ) - dev_kfree_skb_any(g_atm_priv_data.conn[conn].tx_skb[desc_base]); - g_atm_priv_data.conn[conn].tx_skb[desc_base] = skb; - - /* write discriptor to memory and write back cache */ - g_atm_priv_data.conn[conn].tx_desc[desc_base] = reg_desc; - dma_cache_wback((unsigned long)skb->data, CELL_SIZE); - - dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, 0, conn, 1); - - if ( vcc->qos.aal == ATM_AAL5 && (ifx_atm_dbg_enable & DBG_ENABLE_MASK_MAC_SWAP) ) { - skb_swap(skb, reg_desc.byteoff); - } - - mailbox_signal(conn, 1); - - adsl_led_flash(); - - return 0; -} - -static int ppe_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags) -{ - int conn; - - if ( vcc == NULL || qos == NULL ) - return -EINVAL; - - conn = find_vcc(vcc); - if ( conn < 0 ) - return -EINVAL; - - set_qsb(vcc, qos, conn); - - return 0; -} - -static INLINE void adsl_led_flash(void) -{ -#if 0 -#if defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK - if ( g_data_led_trigger != NULL ) - ifx_led_trigger_activate(g_data_led_trigger); -#else - if (!IS_ERR(&ifx_mei_atm_led_blink) && &ifx_mei_atm_led_blink ) - ifx_mei_atm_led_blink(); -#endif -#endif -} - -/* - * Description: - * Add a 32-bit value to 64-bit value, and put result in a 64-bit variable. - * Input: - * opt1 --- ppe_u64_t, first operand, a 64-bit unsigned integer value - * opt2 --- unsigned int, second operand, a 32-bit unsigned integer value - * ret --- ppe_u64_t, pointer to a variable to hold result - * Output: - * none - */ -static INLINE void u64_add_u32(ppe_u64_t opt1, unsigned int opt2, ppe_u64_t *ret) -{ - ret->l = opt1.l + opt2; - if ( ret->l < opt1.l || ret->l < opt2 ) - ret->h++; -} - -static INLINE struct sk_buff* alloc_skb_rx(void) -{ - struct sk_buff *skb; - - skb = dev_alloc_skb(RX_DMA_CH_AAL_BUF_SIZE + DATA_BUFFER_ALIGNMENT); - if ( skb != NULL ) { - /* must be burst length alignment */ - if ( ((unsigned int)skb->data & (DATA_BUFFER_ALIGNMENT - 1)) != 0 ) - skb_reserve(skb, ~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1)); - /* pub skb in reserved area "skb->data - 4" */ - *((struct sk_buff **)skb->data - 1) = skb; - /* write back and invalidate cache */ - dma_cache_wback_inv((unsigned long)skb->data - sizeof(skb), sizeof(skb)); - /* invalidate cache */ - dma_cache_inv((unsigned long)skb->data, (unsigned int)skb->end - (unsigned int)skb->data); - } - - return skb; -} - -static INLINE struct sk_buff* alloc_skb_tx(unsigned int size) -{ - struct sk_buff *skb; - - /* allocate memory including header and padding */ - size += TX_INBAND_HEADER_LENGTH + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES; - size &= ~(DATA_BUFFER_ALIGNMENT - 1); - skb = dev_alloc_skb(size + DATA_BUFFER_ALIGNMENT); - /* must be burst length alignment */ - if ( skb != NULL ) - skb_reserve(skb, (~((unsigned int)skb->data + (DATA_BUFFER_ALIGNMENT - 1)) & (DATA_BUFFER_ALIGNMENT - 1)) + TX_INBAND_HEADER_LENGTH); - return skb; -} - -struct sk_buff* atm_alloc_tx(struct atm_vcc *vcc, unsigned int size) -{ - int conn; - struct sk_buff *skb; - - /* oversize packet */ - if ( size > aal5s_max_packet_size ) { - err("atm_alloc_tx: oversize packet"); - return NULL; - } - /* send buffer overflow */ - if ( atomic_read(&sk_atm(vcc)->sk_wmem_alloc) && !atm_may_send(vcc, size) ) { - err("atm_alloc_tx: send buffer overflow"); - return NULL; - } - conn = find_vcc(vcc); - if ( conn < 0 ) { - err("atm_alloc_tx: unknown VCC"); - return NULL; - } - - skb = dev_alloc_skb(size); - if ( skb == NULL ) { - err("atm_alloc_tx: sk buffer is used up"); - return NULL; - } - - atomic_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc); - - return skb; -} - -static INLINE void atm_free_tx_skb_vcc(struct sk_buff *skb, struct atm_vcc *vcc) -{ - if ( vcc->pop != NULL ) - vcc->pop(vcc, skb); - else - dev_kfree_skb_any(skb); -} - -static INLINE struct sk_buff *get_skb_rx_pointer(unsigned int dataptr) -{ - unsigned int skb_dataptr; - struct sk_buff *skb; - - skb_dataptr = ((dataptr - 1) << 2) | KSEG1; - skb = *(struct sk_buff **)skb_dataptr; - - ASSERT((unsigned int)skb >= KSEG0, "invalid skb - skb = %#08x, dataptr = %#08x", (unsigned int)skb, dataptr); - ASSERT(((unsigned int)skb->data | KSEG1) == ((dataptr << 2) | KSEG1), "invalid skb - skb = %#08x, skb->data = %#08x, dataptr = %#08x", (unsigned int)skb, (unsigned int)skb->data, dataptr); - - return skb; -} - -static INLINE int get_tx_desc(unsigned int conn) -{ - int desc_base = -1; - struct connection *p_conn = &g_atm_priv_data.conn[conn]; - - if ( p_conn->tx_desc[p_conn->tx_desc_pos].own == 0 ) { - desc_base = p_conn->tx_desc_pos; - if ( ++(p_conn->tx_desc_pos) == dma_tx_descriptor_length ) - p_conn->tx_desc_pos = 0; - } - - return desc_base; -} - -static INLINE void mailbox_oam_rx_handler(void) -{ - unsigned int vlddes = WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_OAM)->vlddes; - struct rx_descriptor reg_desc; - struct uni_cell_header *header; - int conn; - struct atm_vcc *vcc; - unsigned int i; - - for ( i = 0; i < vlddes; i++ ) { - do { - reg_desc = g_atm_priv_data.oam_desc[g_atm_priv_data.oam_desc_pos]; - } while ( reg_desc.own || !reg_desc.c ); // keep test OWN and C bit until data is ready - - header = (struct uni_cell_header *)&g_atm_priv_data.oam_buf[g_atm_priv_data.oam_desc_pos * RX_DMA_CH_OAM_BUF_SIZE]; - - if ( header->pti == ATM_PTI_SEGF5 || header->pti == ATM_PTI_E2EF5 ) - conn = find_vpivci(header->vpi, header->vci); - else if ( header->vci == 0x03 || header->vci == 0x04 ) - conn = find_vpi(header->vpi); - else - conn = -1; - - if ( conn >= 0 && g_atm_priv_data.conn[conn].vcc != NULL ) { - vcc = g_atm_priv_data.conn[conn].vcc; - - if ( vcc->push_oam != NULL ) - vcc->push_oam(vcc, header); - else - ifx_push_oam((unsigned char *)header); - adsl_led_flash(); - } - - reg_desc.byteoff = 0; - reg_desc.datalen = RX_DMA_CH_OAM_BUF_SIZE; - reg_desc.own = 1; - reg_desc.c = 0; - - g_atm_priv_data.oam_desc[g_atm_priv_data.oam_desc_pos] = reg_desc; - if ( ++g_atm_priv_data.oam_desc_pos == RX_DMA_CH_OAM_DESC_LEN ) - g_atm_priv_data.oam_desc_pos = 0; - - mailbox_signal(RX_DMA_CH_OAM, 0); - } -} - -static INLINE void mailbox_aal_rx_handler(void) -{ - unsigned int vlddes = WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_AAL)->vlddes; - struct rx_descriptor reg_desc; - int conn; - struct atm_vcc *vcc; - struct sk_buff *skb, *new_skb; - struct rx_inband_trailer *trailer; - unsigned int i; - - for ( i = 0; i < vlddes; i++ ) { - do { - reg_desc = g_atm_priv_data.aal_desc[g_atm_priv_data.aal_desc_pos]; - } while ( reg_desc.own || !reg_desc.c ); // keep test OWN and C bit until data is ready - - conn = reg_desc.id; - - if ( g_atm_priv_data.conn[conn].vcc != NULL ) { - vcc = g_atm_priv_data.conn[conn].vcc; - - skb = get_skb_rx_pointer(reg_desc.dataptr); - - if ( reg_desc.err ) { - if ( vcc->qos.aal == ATM_AAL5 ) { - trailer = (struct rx_inband_trailer *)((unsigned int)skb->data + ((reg_desc.byteoff + reg_desc.datalen + MAX_RX_PACKET_PADDING_BYTES) & ~MAX_RX_PACKET_PADDING_BYTES)); - if ( trailer->stw_crc ) - g_atm_priv_data.conn[conn].aal5_vcc_crc_err++; - if ( trailer->stw_ovz ) - g_atm_priv_data.conn[conn].aal5_vcc_oversize_sdu++; - g_atm_priv_data.wrx_drop_pdu++; - } - if ( vcc->stats ) { - atomic_inc(&vcc->stats->rx_drop); - atomic_inc(&vcc->stats->rx_err); - } - } - else if ( atm_charge(vcc, skb->truesize) ) { - new_skb = alloc_skb_rx(); - if ( new_skb != NULL ) { - skb_reserve(skb, reg_desc.byteoff); - skb_put(skb, reg_desc.datalen); - ATM_SKB(skb)->vcc = vcc; - - dump_skb(skb, DUMP_SKB_LEN, (char *)__func__, 0, conn, 0); - - vcc->push(vcc, skb); - - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wrx_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->rx); - adsl_led_flash(); - - reg_desc.dataptr = (unsigned int)new_skb->data >> 2; - } - else { - atm_return(vcc, skb->truesize); - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wrx_drop_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->rx_drop); - } - } - else { - if ( vcc->qos.aal == ATM_AAL5 ) - g_atm_priv_data.wrx_drop_pdu++; - if ( vcc->stats ) - atomic_inc(&vcc->stats->rx_drop); - } - } - else { - g_atm_priv_data.wrx_drop_pdu++; - } - - reg_desc.byteoff = 0; - reg_desc.datalen = RX_DMA_CH_AAL_BUF_SIZE; - reg_desc.own = 1; - reg_desc.c = 0; - - g_atm_priv_data.aal_desc[g_atm_priv_data.aal_desc_pos] = reg_desc; - if ( ++g_atm_priv_data.aal_desc_pos == dma_rx_descriptor_length ) - g_atm_priv_data.aal_desc_pos = 0; - - mailbox_signal(RX_DMA_CH_AAL, 0); - } -} - -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET -static void do_ppe_tasklet(unsigned long arg) -{ - *MBOX_IGU1_ISRC = *MBOX_IGU1_ISR; - mailbox_oam_rx_handler(); - mailbox_aal_rx_handler(); - if ( (*MBOX_IGU1_ISR & ((1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM))) != 0 ) - tasklet_schedule(&g_dma_tasklet); - else - enable_irq(PPE_MAILBOX_IGU1_INT); -} -#endif - -static irqreturn_t mailbox_irq_handler(int irq, void *dev_id) -{ - if ( !*MBOX_IGU1_ISR ) - return IRQ_HANDLED; - -#if defined(ENABLE_TASKLET) && ENABLE_TASKLET - disable_irq(PPE_MAILBOX_IGU1_INT); - tasklet_schedule(&g_dma_tasklet); -#else - *MBOX_IGU1_ISRC = *MBOX_IGU1_ISR; - mailbox_oam_rx_handler(); - mailbox_aal_rx_handler(); -#endif - - return IRQ_HANDLED; -} - -static INLINE void mailbox_signal(unsigned int queue, int is_tx) -{ - int count = 1000; - - if ( is_tx ) { - while ( MBOX_IGU3_ISR_ISR(queue + FIRST_QSB_QID + 16) && count) - count--; - *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(queue + FIRST_QSB_QID + 16); - } - else { - while ( MBOX_IGU3_ISR_ISR(queue) && count) - count--; - *MBOX_IGU3_ISRS = MBOX_IGU3_ISRS_SET(queue); - } - ASSERT(count != 0, "MBOX_IGU3_ISR = 0x%08x", ltq_r32(MBOX_IGU3_ISR)); -} - -static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue) -{ - struct clk *clk = clk_get(0, "fpi"); - unsigned int qsb_clk = clk_get_rate(clk); - unsigned int qsb_qid = queue + FIRST_QSB_QID; - union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}}; - union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}}; - unsigned int tmp; - -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) { - static char *str_traffic_class[9] = { - "ATM_NONE", - "ATM_UBR", - "ATM_CBR", - "ATM_VBR", - "ATM_ABR", - "ATM_ANYCLASS", - "ATM_VBR_RT", - "ATM_UBR_PLUS", - "ATM_MAX_PCR" - }; - printk(KERN_INFO "QoS Parameters:\n"); - printk(KERN_INFO "\tAAL : %d\n", qos->aal); - printk(KERN_INFO "\tTX Traffic Class: %s\n", str_traffic_class[qos->txtp.traffic_class]); - printk(KERN_INFO "\tTX Max PCR : %d\n", qos->txtp.max_pcr); - printk(KERN_INFO "\tTX Min PCR : %d\n", qos->txtp.min_pcr); - printk(KERN_INFO "\tTX PCR : %d\n", qos->txtp.pcr); - printk(KERN_INFO "\tTX Max CDV : %d\n", qos->txtp.max_cdv); - printk(KERN_INFO "\tTX Max SDU : %d\n", qos->txtp.max_sdu); - printk(KERN_INFO "\tTX SCR : %d\n", qos->txtp.scr); - printk(KERN_INFO "\tTX MBS : %d\n", qos->txtp.mbs); - printk(KERN_INFO "\tTX CDV : %d\n", qos->txtp.cdv); - printk(KERN_INFO "\tRX Traffic Class: %s\n", str_traffic_class[qos->rxtp.traffic_class]); - printk(KERN_INFO "\tRX Max PCR : %d\n", qos->rxtp.max_pcr); - printk(KERN_INFO "\tRX Min PCR : %d\n", qos->rxtp.min_pcr); - printk(KERN_INFO "\tRX PCR : %d\n", qos->rxtp.pcr); - printk(KERN_INFO "\tRX Max CDV : %d\n", qos->rxtp.max_cdv); - printk(KERN_INFO "\tRX Max SDU : %d\n", qos->rxtp.max_sdu); - printk(KERN_INFO "\tRX SCR : %d\n", qos->rxtp.scr); - printk(KERN_INFO "\tRX MBS : %d\n", qos->rxtp.mbs); - printk(KERN_INFO "\tRX CDV : %d\n", qos->rxtp.cdv); - } -#endif // defined(DEBUG_QOS) && DEBUG_QOS - - /* - * Peak Cell Rate (PCR) Limiter - */ - if ( qos->txtp.max_pcr == 0 ) - qsb_queue_parameter_table.bit.tp = 0; /* disable PCR limiter */ - else { - /* peak cell rate would be slightly lower than requested [maximum_rate / pcr = (qsb_clock / 8) * (time_step / 4) / pcr] */ - tmp = ((qsb_clk * qsb_tstep) >> 5) / qos->txtp.max_pcr + 1; - /* check if overflow takes place */ - qsb_queue_parameter_table.bit.tp = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp; - } - - // A funny issue. Create two PVCs, one UBR and one UBR with max_pcr. - // Send packets to these two PVCs at same time, it trigger strange behavior. - // In A1, RAM from 0x80000000 to 0x0x8007FFFF was corrupted with fixed pattern 0x00000000 0x40000000. - // In A4, PPE firmware keep emiting unknown cell and do not respond to driver. - // To work around, create UBR always with max_pcr. - // If user want to create UBR without max_pcr, we give a default one larger than line-rate. - if ( qos->txtp.traffic_class == ATM_UBR && qsb_queue_parameter_table.bit.tp == 0 ) { - int port = g_atm_priv_data.conn[queue].port; - unsigned int max_pcr = g_atm_priv_data.port[port].tx_max_cell_rate + 1000; - - tmp = ((qsb_clk * qsb_tstep) >> 5) / max_pcr + 1; - if ( tmp > QSB_TP_TS_MAX ) - tmp = QSB_TP_TS_MAX; - else if ( tmp < 1 ) - tmp = 1; - qsb_queue_parameter_table.bit.tp = tmp; - } - - /* - * Weighted Fair Queueing Factor (WFQF) - */ - switch ( qos->txtp.traffic_class ) { - case ATM_CBR: - case ATM_VBR_RT: - /* real time queue gets weighted fair queueing bypass */ - qsb_queue_parameter_table.bit.wfqf = 0; - break; - case ATM_VBR_NRT: - case ATM_UBR_PLUS: - /* WFQF calculation here is based on virtual cell rates, to reduce granularity for high rates */ - /* WFQF is maximum cell rate / garenteed cell rate */ - /* wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX / requested_minimum_peak_cell_rate */ - if ( qos->txtp.min_pcr == 0 ) - qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX; - else - { - tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX / qos->txtp.min_pcr; - if ( tmp == 0 ) - qsb_queue_parameter_table.bit.wfqf = 1; - else if ( tmp > QSB_WFQ_NONUBR_MAX ) - qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_NONUBR_MAX; - else - qsb_queue_parameter_table.bit.wfqf = tmp; - } - break; - default: - case ATM_UBR: - qsb_queue_parameter_table.bit.wfqf = QSB_WFQ_UBR_BYPASS; - } - - /* - * Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 - */ - if ( qos->txtp.traffic_class == ATM_VBR_RT || qos->txtp.traffic_class == ATM_VBR_NRT ) { - if ( qos->txtp.scr == 0 ) { - /* disable shaper */ - qsb_queue_vbr_parameter_table.bit.taus = 0; - qsb_queue_vbr_parameter_table.bit.ts = 0; - } - else { - /* Cell Loss Priority (CLP) */ - if ( (vcc->atm_options & ATM_ATMOPT_CLP) ) - /* CLP1 */ - qsb_queue_parameter_table.bit.vbr = 1; - else - /* CLP0 */ - qsb_queue_parameter_table.bit.vbr = 0; - /* Rate Shaper Parameter (TS) and Burst Tolerance Parameter for SCR (tauS) */ - tmp = ((qsb_clk * qsb_tstep) >> 5) / qos->txtp.scr + 1; - qsb_queue_vbr_parameter_table.bit.ts = tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp; - tmp = (qos->txtp.mbs - 1) * (qsb_queue_vbr_parameter_table.bit.ts - qsb_queue_parameter_table.bit.tp) / 64; - if ( tmp == 0 ) - qsb_queue_vbr_parameter_table.bit.taus = 1; - else if ( tmp > QSB_TAUS_MAX ) - qsb_queue_vbr_parameter_table.bit.taus = QSB_TAUS_MAX; - else - qsb_queue_vbr_parameter_table.bit.taus = tmp; - } - } - else { - qsb_queue_vbr_parameter_table.bit.taus = 0; - qsb_queue_vbr_parameter_table.bit.ts = 0; - } - - /* Queue Parameter Table (QPT) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_QPT_SET_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(qsb_queue_parameter_table.dword); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_QPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("QPT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - /* Queue VBR Paramter Table (QVPT) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_QVPT_SET_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(qsb_queue_vbr_parameter_table.dword); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_VBR) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(qsb_qid); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("QVPT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) { - printk("set_qsb\n"); - printk(" qsb_clk = %lu\n", (unsigned long)qsb_clk); - printk(" qsb_queue_parameter_table.bit.tp = %d\n", (int)qsb_queue_parameter_table.bit.tp); - printk(" qsb_queue_parameter_table.bit.wfqf = %d (0x%08X)\n", (int)qsb_queue_parameter_table.bit.wfqf, (int)qsb_queue_parameter_table.bit.wfqf); - printk(" qsb_queue_parameter_table.bit.vbr = %d\n", (int)qsb_queue_parameter_table.bit.vbr); - printk(" qsb_queue_parameter_table.dword = 0x%08X\n", (int)qsb_queue_parameter_table.dword); - printk(" qsb_queue_vbr_parameter_table.bit.ts = %d\n", (int)qsb_queue_vbr_parameter_table.bit.ts); - printk(" qsb_queue_vbr_parameter_table.bit.taus = %d\n", (int)qsb_queue_vbr_parameter_table.bit.taus); - printk(" qsb_queue_vbr_parameter_table.dword = 0x%08X\n", (int)qsb_queue_vbr_parameter_table.dword); - } -#endif -} - -static void qsb_global_set(void) -{ - struct clk *clk = clk_get(0, "fpi"); - unsigned int qsb_clk = clk_get_rate(clk); - int i; - unsigned int tmp1, tmp2, tmp3; - - *QSB_ICDV = QSB_ICDV_TAU_SET(qsb_tau); - *QSB_SBL = QSB_SBL_SBL_SET(qsb_srvm); - *QSB_CFG = QSB_CFG_TSTEPC_SET(qsb_tstep >> 1); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) { - printk("qsb_clk = %u\n", qsb_clk); - printk("QSB_ICDV (%08X) = %d (%d), QSB_SBL (%08X) = %d (%d), QSB_CFG (%08X) = %d (%d)\n", (unsigned int)QSB_ICDV, *QSB_ICDV, QSB_ICDV_TAU_SET(qsb_tau), (unsigned int)QSB_SBL, *QSB_SBL, QSB_SBL_SBL_SET(qsb_srvm), (unsigned int)QSB_CFG, *QSB_CFG, QSB_CFG_TSTEPC_SET(qsb_tstep >> 1)); - } -#endif - - /* - * set SCT and SPT per port - */ - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) { - if ( g_atm_priv_data.port[i].tx_max_cell_rate != 0 ) { - tmp1 = ((qsb_clk * qsb_tstep) >> 1) / g_atm_priv_data.port[i].tx_max_cell_rate; - tmp2 = tmp1 >> 6; /* integer value of Tsb */ - tmp3 = (tmp1 & ((1 << 6) - 1)) + 1; /* fractional part of Tsb */ - /* carry over to integer part (?) */ - if ( tmp3 == (1 << 6) ) - { - tmp3 = 0; - tmp2++; - } - if ( tmp2 == 0 ) - tmp2 = tmp3 = 1; - /* 1. set mask */ - /* 2. write value to data transfer register */ - /* 3. start the tranfer */ - /* SCT (FracRate) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_SET_SCT_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(tmp3); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SCT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("SCT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - /* SPT (SBV + PN + IntRage) */ - *QSB_RTM = QSB_RTM_DM_SET(QSB_SET_SPT_MASK); - *QSB_RTD = QSB_RTD_TTV_SET(QSB_SPT_SBV_VALID | QSB_SPT_PN_SET(i & 0x01) | QSB_SPT_INTRATE_SET(tmp2)); - *QSB_RAMAC = QSB_RAMAC_RW_SET(QSB_RAMAC_RW_WRITE) | QSB_RAMAC_TSEL_SET(QSB_RAMAC_TSEL_SPT) | QSB_RAMAC_LH_SET(QSB_RAMAC_LH_LOW) | QSB_RAMAC_TESEL_SET(i & 0x01); -#if defined(DEBUG_QOS) && DEBUG_QOS - if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ) - printk("SPT: QSB_RTM (%08X) = 0x%08X, QSB_RTD (%08X) = 0x%08X, QSB_RAMAC (%08X) = 0x%08X\n", (unsigned int)QSB_RTM, *QSB_RTM, (unsigned int)QSB_RTD, *QSB_RTD, (unsigned int)QSB_RAMAC, *QSB_RAMAC); -#endif - } - } -} - -static INLINE void set_htu_entry(unsigned int vpi, unsigned int vci, unsigned int queue, int aal5, int is_retx) -{ - struct htu_entry htu_entry = { res1: 0x00, - clp: is_retx ? 0x01 : 0x00, - pid: g_atm_priv_data.conn[queue].port & 0x01, - vpi: vpi, - vci: vci, - pti: 0x00, - vld: 0x01}; - - struct htu_mask htu_mask = { set: 0x01, -#if !defined(ENABLE_ATM_RETX) || !ENABLE_ATM_RETX - clp: 0x01, - pid_mask: 0x02, -#else - clp: g_retx_htu ? 0x00 : 0x01, - pid_mask: RETX_MODE_CFG->retx_en ? 0x03 : 0x02, -#endif - vpi_mask: 0x00, -#if !defined(ENABLE_ATM_RETX) || !ENABLE_ATM_RETX - vci_mask: 0x0000, -#else - vci_mask: RETX_MODE_CFG->retx_en ? 0xFF00 : 0x0000, -#endif - pti_mask: 0x03, // 0xx, user data - clear: 0x00}; - - struct htu_result htu_result = {res1: 0x00, - cellid: queue, - res2: 0x00, - type: aal5 ? 0x00 : 0x01, - ven: 0x01, - res3: 0x00, - qid: queue}; - - *HTU_RESULT(queue + OAM_HTU_ENTRY_NUMBER) = htu_result; - *HTU_MASK(queue + OAM_HTU_ENTRY_NUMBER) = htu_mask; - *HTU_ENTRY(queue + OAM_HTU_ENTRY_NUMBER) = htu_entry; -} - -static INLINE void clear_htu_entry(unsigned int queue) -{ - HTU_ENTRY(queue + OAM_HTU_ENTRY_NUMBER)->vld = 0; -} - -static void validate_oam_htu_entry(void) -{ - HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 1; - HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 1; - HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 1; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - HTU_ENTRY(OAM_ARQ_HTU_ENTRY)->vld = 1; -#endif -} - -static void invalidate_oam_htu_entry(void) -{ - HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY)->vld = 0; - HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY)->vld = 0; - HTU_ENTRY(OAM_F5_HTU_ENTRY)->vld = 0; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - HTU_ENTRY(OAM_ARQ_HTU_ENTRY)->vld = 0; -#endif -} - -static INLINE int find_vpi(unsigned int vpi) -{ - int i; - unsigned int bit; - - for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { - if ( (g_atm_priv_data.conn_table & bit) != 0 - && g_atm_priv_data.conn[i].vcc != NULL - && vpi == g_atm_priv_data.conn[i].vcc->vpi ) - return i; - } - - return -1; -} - -static INLINE int find_vpivci(unsigned int vpi, unsigned int vci) -{ - int i; - unsigned int bit; - - for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { - if ( (g_atm_priv_data.conn_table & bit) != 0 - && g_atm_priv_data.conn[i].vcc != NULL - && vpi == g_atm_priv_data.conn[i].vcc->vpi - && vci == g_atm_priv_data.conn[i].vcc->vci ) - return i; - } - - return -1; -} - -static INLINE int find_vcc(struct atm_vcc *vcc) -{ - int i; - unsigned int bit; - - for ( i = 0, bit = 1; i < MAX_PVC_NUMBER; i++, bit <<= 1 ) { - if ( (g_atm_priv_data.conn_table & bit) != 0 - && g_atm_priv_data.conn[i].vcc == vcc ) - return i; - } - - return -1; -} - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - -static void retx_polling_func(unsigned long arg) -{ - int sys_flag; - volatile struct dsl_param *p_dsl_param; - int new_retx_htu; - int retx_en; - int i, max_htu; - - local_irq_save(sys_flag); - if ( g_retx_playout_buffer == 0 && g_xdata_addr != NULL && (((volatile struct dsl_param *)g_xdata_addr)->RetxEnable || ((volatile struct dsl_param *)g_xdata_addr)->ServiceSpecificReTx) ) { - local_irq_restore(sys_flag); - g_retx_playout_buffer = __get_free_pages(GFP_KERNEL, RETX_PLAYOUT_BUFFER_ORDER); - if ( g_retx_playout_buffer == 0 ) - panic("no memory for g_retx_playout_buffer\n"); - memset((void *)g_retx_playout_buffer, 0, RETX_PLAYOUT_BUFFER_SIZE); - dma_cache_inv(g_retx_playout_buffer, RETX_PLAYOUT_BUFFER_SIZE); - } - else - local_irq_restore(sys_flag); - - - local_irq_save(sys_flag); - if ( g_xdata_addr != NULL ) { - p_dsl_param = (volatile struct dsl_param *)g_xdata_addr; - g_retx_polling_cnt += RETX_POLLING_INTERVAL; - - if ( p_dsl_param->update_flag ) { - do_gettimeofday(&g_retx_polling_start); - - g_dsl_param = *p_dsl_param; - - // we always enable retx (just for test purpose) - //g_dsl_param.RetxEnable = 1; - //RETX_TSYNC_CFG->fw_alpha = 0; - - if ( g_dsl_param.RetxEnable || g_dsl_param.ServiceSpecificReTx ) { - // ReTX enabled - // MIB counter updated for each polling - p_dsl_param->RxDtuCorruptedCNT = *RxDTUCorruptedCNT; - p_dsl_param->RxRetxDtuUnCorrectedCNT = *RxRetxDTUUncorrectedCNT; - p_dsl_param->RxLastEFB = *RxLastEFBCNT; - p_dsl_param->RxDtuCorrectedCNT = *RxDTUCorrectedCNT; - - // for RETX paramters, we check only once for every second - if ( g_retx_polling_cnt < HZ ) - goto _clear_update_flag; - - g_retx_polling_cnt -= HZ; - - if ( g_dsl_param.ServiceSpecificReTx && g_dsl_param.ReTxPVC == 0 ) - new_retx_htu = 1; - else - new_retx_htu = 0; - - // default fw_alpha equals to default hardware alpha - RETX_TSYNC_CFG->fw_alpha = 0; - - RETX_TD_CFG->td_max = g_dsl_param.MaxDelayrt; - RETX_TD_CFG->td_min = g_dsl_param.MinDelayrt; - - *RETX_PLAYOUT_BUFFER_BASE = ((((unsigned int)g_retx_playout_buffer | KSEG1) + 15) & 0xFFFFFFF0) >> 2; - - if ( g_dsl_param.ServiceSpecificReTx ) { - *RETX_SERVICE_HEADER_CFG= g_dsl_param.ReTxPVC << 4; - if ( g_dsl_param.ReTxPVC == 0 ) - *RETX_MASK_HEADER_CFG = 1; - else - *RETX_MASK_HEADER_CFG = 0; - } - else { - *RETX_SERVICE_HEADER_CFG= 0; - *RETX_MASK_HEADER_CFG = 0; - } - - retx_en = 1; - } - else { - // ReTX disabled - - new_retx_htu = 0; - - RETX_TSYNC_CFG->fw_alpha = 7; - - *RETX_SERVICE_HEADER_CFG = 0; - *RETX_MASK_HEADER_CFG = 0; - - retx_en = 0; - } - - - if ( retx_en != RETX_MODE_CFG->retx_en ) { - unsigned int pid_mask, vci_mask; - - if ( retx_en ) { - pid_mask = 0x03; - vci_mask = 0xFF00; - } - else { - pid_mask = 0x02; - vci_mask = 0x0000; - } - - max_htu = *CFG_WRX_HTUTS; - for ( i = OAM_HTU_ENTRY_NUMBER; i < max_htu; i++ ) - if ( HTU_ENTRY(i)->vld ) { - HTU_MASK(i)->pid_mask = pid_mask; - HTU_MASK(i)->vci_mask = vci_mask; - } - } - - if ( new_retx_htu != g_retx_htu ) { - int conn, retx_conn; - - g_retx_htu = new_retx_htu; - - if ( g_retx_htu ) { - max_htu = *CFG_WRX_HTUTS; - for ( i = OAM_HTU_ENTRY_NUMBER; i < max_htu; i++ ) - if ( HTU_ENTRY(i)->vld ) - HTU_MASK(i)->clp = 0; - - for ( conn = 0; conn < MAX_PVC_NUMBER; conn++ ) - if ( g_atm_priv_data.conn[conn].vcc && g_atm_priv_data.conn[conn].vcc->qos.aal == ATM_AAL5 && !HTU_ENTRY(conn + OAM_HTU_ENTRY_NUMBER)->clp ) { - retx_conn = (conn + 8) % 16; // ReTX queue - - if ( retx_conn < MAX_PVC_NUMBER && test_and_set_bit(retx_conn, &g_atm_priv_data.conn_table) == 0 ) { - g_atm_priv_data.conn[retx_conn].vcc = g_atm_priv_data.conn[conn].vcc; - set_htu_entry(g_atm_priv_data.conn[conn].vcc->vpi, g_atm_priv_data.conn[conn].vcc->vci, retx_conn, g_atm_priv_data.conn[conn].vcc->qos.aal == ATM_AAL5 ? 1 : 0, 1); - } - else { - err("Queue number %d for ReTX queue of PVC(%d.%d) is not available!", retx_conn, g_atm_priv_data.conn[conn].vcc->vpi, g_atm_priv_data.conn[conn].vcc->vci); - } - } - } - else - { - for ( retx_conn = 0; retx_conn < MAX_PVC_NUMBER; retx_conn++ ) - if ( g_atm_priv_data.conn[retx_conn].vcc && HTU_ENTRY(retx_conn + OAM_HTU_ENTRY_NUMBER)->clp ) { - clear_htu_entry(retx_conn); - g_atm_priv_data.conn[retx_conn].vcc = NULL; - g_atm_priv_data.conn[retx_conn].aal5_vcc_crc_err = 0; - g_atm_priv_data.conn[retx_conn].aal5_vcc_oversize_sdu = 0; - clear_bit(retx_conn, &g_atm_priv_data.conn_table); - } - - max_htu = *CFG_WRX_HTUTS; - for ( i = OAM_HTU_ENTRY_NUMBER; i < max_htu; i++ ) - if ( HTU_ENTRY(i)->vld ) - HTU_MASK(i)->clp = 1; - } - } - - RETX_MODE_CFG->retx_en = retx_en; - -_clear_update_flag: - p_dsl_param->update_flag = 0; - - do_gettimeofday(&g_retx_polling_end); - } - - g_retx_polling_timer.expires = jiffies + RETX_POLLING_INTERVAL; - add_timer(&g_retx_polling_timer); - } - local_irq_restore(sys_flag); -} - -static int init_atm_tc_retrans_param(void) -{ - int i = 0; - struct DTU_stat_info reset_val; - - RETX_MODE_CFG->invld_range = 128; - RETX_MODE_CFG->buff_size = RETX_PLAYOUT_FW_BUFF_SIZE > 4096/32 ? 4096/32 : RETX_PLAYOUT_FW_BUFF_SIZE ; - RETX_MODE_CFG->retx_en = 1; - - // default fw_alpha equals to default hardware alpha - RETX_TSYNC_CFG->fw_alpha = 7; - RETX_TSYNC_CFG->sync_inp = 0; - - RETX_TD_CFG->td_max = 0; - RETX_TD_CFG->td_min = 0; - - // *RETX_PLAYOUT_BUFFER_BASE = KSEG1ADDR(g_retx_playout_buffer); // need " >> 2 " ? - *RETX_PLAYOUT_BUFFER_BASE = ((((unsigned int)g_retx_playout_buffer | KSEG1) + 15) & 0xFFFFFFF0) >> 2; - - *RETX_SERVICE_HEADER_CFG = 0; - *RETX_MASK_HEADER_CFG = 0; - - // 20us - RETX_MIB_TIMER_CFG->tick_cycle = 4800; - RETX_MIB_TIMER_CFG->ticks_per_sec = 50000; - - *LAST_DTU_SID_IN = 255; - *RFBI_FIRST_CW = 1; - // init DTU_STAT_INFO - - memset(&reset_val, 0, sizeof(reset_val)); - reset_val.dtu_rd_ptr = reset_val.dtu_wr_ptr = 0xffff; - - for(i = 0 ; i < 256; i ++) { - DTU_STAT_INFO[i] = reset_val; - } - return 0; -} - -static void clear_atm_tc_retrans_param(void) -{ - if ( g_retx_playout_buffer ) { - free_pages(g_retx_playout_buffer, RETX_PLAYOUT_BUFFER_ORDER); - g_retx_playout_buffer = 0; - } -} - -#endif - -#if defined(DEBUG_DUMP_SKB) && DEBUG_DUMP_SKB -static void dump_skb(struct sk_buff *skb, unsigned int len, char *title, int port, int ch, int is_tx) -{ - int i; - - if ( !(ifx_atm_dbg_enable & (is_tx ? DBG_ENABLE_MASK_DUMP_SKB_TX : DBG_ENABLE_MASK_DUMP_SKB_RX)) ) - return; - - if ( skb->len < len ) - len = skb->len; - - if ( len > RX_DMA_CH_AAL_BUF_SIZE ) { - printk("too big data length: skb = %08x, skb->data = %08x, skb->len = %d\n", (unsigned int)skb, (unsigned int)skb->data, skb->len); - return; - } - - if ( ch >= 0 ) - printk("%s (port %d, ch %d)\n", title, port, ch); - else - printk("%s\n", title); - printk(" skb->data = %08X, skb->tail = %08X, skb->len = %d\n", (unsigned int)skb->data, (unsigned int)skb->tail, (int)skb->len); - for ( i = 1; i <= len; i++ ) { - if ( i % 16 == 1 ) - printk(" %4d:", i - 1); - printk(" %02X", (int)(*((char*)skb->data + i - 1) & 0xFF)); - if ( i % 16 == 0 ) - printk("\n"); - } - if ( (i - 1) % 16 != 0 ) - printk("\n"); -} -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC -static void skb_swap(struct sk_buff *skb, unsigned int byteoff) -{ - unsigned int mac_offset = ~0; - unsigned int ip_offset = ~0; - unsigned char tmp[8]; - unsigned char *p = NULL; - - skb_pull(skb, byteoff + TX_INBAND_HEADER_LENGTH); - - if ( skb->data[0] == 0xAA && skb->data[1] == 0xAA && skb->data[2] == 0x03 ) { - // LLC - if ( skb->data[3] == 0x00 && skb->data[4] == 0x80 && skb->data[5] == 0xC2 ) { - // EoA - if ( skb->data[22] == 0x08 && skb->data[23] == 0x00 ) { - // IPv4 - mac_offset = 10; - ip_offset = 24; - } - else if ( skb->data[31] == 0x21 ) { - // PPPoE IPv4 - mac_offset = 10; - ip_offset = 32; - } - } - else { - // IPoA - if ( skb->data[6] == 0x08 && skb->data[7] == 0x00 ) { - // IPv4 - ip_offset = 8; - } - } - } - else if ( skb->data[0] == 0xFE && skb->data[1] == 0xFE && skb->data[2] == 0x03 ) { - // LLC PPPoA - if ( skb->data[4] == 0x00 && skb->data[5] == 0x21 ) { - // IPv4 - ip_offset = 6; - } - } - else { - // VC-mux - if ( skb->data[0] == 0x00 && skb->data[1] == 0x21 ) { - // PPPoA IPv4 - ip_offset = 2; - } - else if ( skb->data[0] == 0x00 && skb->data[1] == 0x00 ) { - // EoA - if ( skb->data[14] == 0x08 && skb->data[15] ==0x00 ) { - // IPv4 - mac_offset = 2; - ip_offset = 16; - } - else if ( skb->data[23] == 0x21 ) { - // PPPoE IPv4 - mac_offset = 2; - ip_offset = 26; - } - } - else { - // IPoA - ip_offset = 0; - } - } - - if ( mac_offset != ~0 && !(skb->data[mac_offset] & 0x01) ) { - p = skb->data + mac_offset; - // swap MAC - memcpy(tmp, p, 6); - memcpy(p, p + 6, 6); - memcpy(p + 6, tmp, 6); - p += 12; - } - - if ( ip_offset != ~0 ) { - p = skb->data + ip_offset + 12; - // swap IP - memcpy(tmp, p, 4); - memcpy(p, p + 4, 4); - memcpy(p + 4, tmp, 4); - p += 8; - } - - if ( p != NULL ) { - dma_cache_wback((unsigned long)skb->data, (unsigned long)p - (unsigned long)skb->data); - } - - skb_push(skb, byteoff + TX_INBAND_HEADER_LENGTH); -} -#endif - -static INLINE void proc_file_create(void) -{ - struct proc_dir_entry *res; - - g_atm_dir = proc_mkdir("driver/ifx_atm", NULL); - - create_proc_read_entry("version", - 0, - g_atm_dir, - proc_read_version, - NULL); - - res = create_proc_entry("mib", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_mib; - res->write_proc = proc_write_mib; - } - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - res = create_proc_entry("retx_mib", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_retx_mib; - res->write_proc = proc_write_retx_mib; - } -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - res = create_proc_entry("dbg", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_dbg; - res->write_proc = proc_write_dbg; - } - - res = create_proc_entry("mem", - 0, - g_atm_dir); - if ( res != NULL ) - res->write_proc = proc_write_mem; - - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) || defined(CONFIG_DANUBE) || defined(CONFIG_AMAZON_SE) - res = create_proc_entry("pp32", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_pp32; - res->write_proc = proc_write_pp32; - } - #endif -#endif - -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - create_proc_read_entry("htu", - 0, - g_atm_dir, - proc_read_htu, - NULL); - - create_proc_read_entry("txq", - 0, - g_atm_dir, - proc_read_txq, - NULL); - - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - create_proc_read_entry("retx_fw", - 0, - g_atm_dir, - proc_read_retx_fw, - NULL); - - res = create_proc_entry("retx_stats", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_retx_stats; - res->write_proc = proc_write_retx_stats; - } - - res = create_proc_entry("retx_cfg", - 0, - g_atm_dir); - if ( res != NULL ) { - res->read_proc = proc_read_retx_cfg; - res->write_proc = proc_write_retx_cfg; - } - - create_proc_read_entry("retx_dsl_param", - 0, - g_atm_dir, - proc_read_retx_dsl_param, - NULL); - #endif -#endif -} - -static INLINE void proc_file_delete(void) -{ -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - remove_proc_entry("retx_dsl_param", g_atm_dir); - - remove_proc_entry("retx_cfg", g_atm_dir); - - remove_proc_entry("retx_stats", g_atm_dir); - - remove_proc_entry("retx_fw", g_atm_dir); - #endif - - remove_proc_entry("txq", g_atm_dir); - - remove_proc_entry("htu", g_atm_dir); -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) || defined(CONFIG_DANUBE) || defined(CONFIG_AMAZON_SE) - remove_proc_entry("pp32", g_atm_dir); - #endif - - remove_proc_entry("mem", g_atm_dir); - - remove_proc_entry("dbg", g_atm_dir); -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - remove_proc_entry("retx_mib", g_atm_dir); -#endif - - remove_proc_entry("mib", g_atm_dir); - - remove_proc_entry("version", g_atm_dir); - - remove_proc_entry("driver/ifx_atm", NULL); -} - -static int proc_read_version(char *buf, char **start, off_t offset, int count, int *eof, void *data) -{ - int len = 0; - - len += ifx_atm_version(buf + len); - - if ( offset >= len ) { - *start = buf; - *eof = 1; - return 0; - } - *start = buf + offset; - if ( (len -= offset) > count ) - return count; - *eof = 1; - return len; -} - -static int proc_read_mib(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "Firmware\n"); - len += sprintf(page + off + len, " wrx_drophtu_cell = %u\n", WAN_MIB_TABLE->wrx_drophtu_cell); - len += sprintf(page + off + len, " wrx_dropdes_pdu = %u\n", WAN_MIB_TABLE->wrx_dropdes_pdu); - len += sprintf(page + off + len, " wrx_correct_pdu = %u\n", WAN_MIB_TABLE->wrx_correct_pdu); - len += sprintf(page + off + len, " wrx_err_pdu = %u\n", WAN_MIB_TABLE->wrx_err_pdu); - len += sprintf(page + off + len, " wrx_dropdes_cell = %u\n", WAN_MIB_TABLE->wrx_dropdes_cell); - len += sprintf(page + off + len, " wrx_correct_cell = %u\n", WAN_MIB_TABLE->wrx_correct_cell); - len += sprintf(page + off + len, " wrx_err_cell = %u\n", WAN_MIB_TABLE->wrx_err_cell); - len += sprintf(page + off + len, " wrx_total_byte = %u\n", WAN_MIB_TABLE->wrx_total_byte); - len += sprintf(page + off + len, " wtx_total_pdu = %u\n", WAN_MIB_TABLE->wtx_total_pdu); - len += sprintf(page + off + len, " wtx_total_cell = %u\n", WAN_MIB_TABLE->wtx_total_cell); - len += sprintf(page + off + len, " wtx_total_byte = %u\n", WAN_MIB_TABLE->wtx_total_byte); - len += sprintf(page + off + len, "Driver\n"); - len += sprintf(page + off + len, " wrx_pdu = %u\n", g_atm_priv_data.wrx_pdu); - len += sprintf(page + off + len, " wrx_drop_pdu = %u\n", g_atm_priv_data.wrx_drop_pdu); - len += sprintf(page + off + len, " wtx_pdu = %u\n", g_atm_priv_data.wtx_pdu); - len += sprintf(page + off + len, " wtx_err_pdu = %u\n", g_atm_priv_data.wtx_err_pdu); - len += sprintf(page + off + len, " wtx_drop_pdu = %u\n", g_atm_priv_data.wtx_drop_pdu); - - *eof = 1; - - return len; -} - -static int proc_write_mib(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[1024]; - char *p; - int len, rlen; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(p, "clear") == 0 || stricmp(p, "clear all") == 0 - || stricmp(p, "clean") == 0 || stricmp(p, "clean all") == 0 ) { - memset(WAN_MIB_TABLE, 0, sizeof(*WAN_MIB_TABLE)); - g_atm_priv_data.wrx_pdu = 0; - g_atm_priv_data.wrx_drop_pdu = 0; - g_atm_priv_data.wtx_pdu = 0; - g_atm_priv_data.wtx_err_pdu = 0; - g_atm_priv_data.wtx_drop_pdu = 0; - } - - return count; -} - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - -static int proc_read_retx_mib(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - printk("Retx FW DTU MIB :\n"); - printk(" rx_total_dtu = %u\n", *URETX_RX_TOTAL_DTU); - printk(" rx_bad_dtu = %u\n", *URETX_RX_BAD_DTU); - printk(" rx_good_dtu = %u\n", *URETX_RX_GOOD_DTU); - printk(" rx_corrected_dtu = %u\n", *URETX_RX_CORRECTED_DTU); - printk(" rx_outofdate_dtu = %u\n", *URETX_RX_OUTOFDATE_DTU); - printk(" rx_duplicate_dtu = %u\n", *URETX_RX_DUPLICATE_DTU); - printk(" rx_timeout_dtu = %u\n", *URETX_RX_TIMEOUT_DTU); - printk(" RxDTURetransmittedCNT = %u\n", *RxDTURetransmittedCNT); - printk("\n"); - - printk("Retx Standard DTU MIB:\n"); - printk(" RxLastEFB = %u\n", *RxLastEFBCNT); - printk(" RxDTUCorrectedCNT = %u\n", *RxDTUCorrectedCNT); - printk(" RxDTUCorruptedCNT = %u\n", *RxDTUCorruptedCNT); - printk(" RxRetxDTUUncorrectedCNT = %u\n", *RxRetxDTUUncorrectedCNT); - printk("\n"); - - printk("Retx FW Cell MIB :\n"); - printk(" bc0_total_cell = %u\n", *WRX_BC0_CELL_NUM); - printk(" bc0_drop_cell = %u\n", *WRX_BC0_DROP_CELL_NUM); - printk(" bc0_nonretx_cell = %u\n", *WRX_BC0_NONRETX_CELL_NUM); - printk(" bc0_retx_cell = %u\n", *WRX_BC0_RETX_CELL_NUM); - printk(" bc0_outofdate_cell = %u\n", *WRX_BC0_OUTOFDATE_CELL_NUM); - printk(" bc0_directup_cell = %u\n", *WRX_BC0_DIRECTUP_NUM); - printk(" bc0_to_pb_total_cell = %u\n", *WRX_BC0_PBW_TOTAL_NUM); - printk(" bc0_to_pb_succ_cell = %u\n", *WRX_BC0_PBW_SUCC_NUM); - printk(" bc0_to_pb_fail_cell = %u\n", *WRX_BC0_PBW_FAIL_NUM); - printk(" bc1_total_cell = %u\n", *WRX_BC1_CELL_NUM); - - printk("\n"); - - printk("ATM Rx AAL5/OAM MIB:\n"); - printk(" wrx_drophtu_cell = %u\n", WAN_MIB_TABLE->wrx_drophtu_cell); - printk(" wrx_dropdes_pdu = %u\n", WAN_MIB_TABLE->wrx_dropdes_pdu); - - printk(" wrx_correct_pdu = %-10u ", WAN_MIB_TABLE->wrx_correct_pdu); - if ( WAN_MIB_TABLE->wrx_correct_pdu == 0 ) - printk("\n"); - else { - int i = 0; - - printk("[ "); - for ( i = 0; i < 16; ++i ) { - if ( WRX_PER_PVC_CORRECT_PDU_BASE[i] ) - printk("q%-2d = %-10u , ", i, WRX_PER_PVC_CORRECT_PDU_BASE[i]); - } - printk("]\n"); - } - - printk(" wrx_err_pdu = %-10u ", WAN_MIB_TABLE->wrx_err_pdu); - if ( WAN_MIB_TABLE->wrx_err_pdu == 0 ) - printk("\n"); - else { - int i = 0; - - printk("[ "); - for ( i = 0; i < 16; ++i ) { - if ( WRX_PER_PVC_ERROR_PDU_BASE[i] ) - printk("q%-2d = %-10u , ", i, WRX_PER_PVC_ERROR_PDU_BASE[i] ); - } - printk("]\n"); - } - - printk(" wrx_dropdes_cell = %u\n", WAN_MIB_TABLE->wrx_dropdes_cell); - printk(" wrx_correct_cell = %u\n", WAN_MIB_TABLE->wrx_correct_cell); - printk(" wrx_err_cell = %u\n", WAN_MIB_TABLE->wrx_err_cell); - printk(" wrx_total_byte = %u\n", WAN_MIB_TABLE->wrx_total_byte); - printk("\n"); - - printk("ATM Tx MIB:\n"); - printk(" wtx_total_pdu = %u\n", WAN_MIB_TABLE->wtx_total_pdu); - printk(" wtx_total_cell = %u\n", WAN_MIB_TABLE->wtx_total_cell); - printk(" wtx_total_byte = %u\n", WAN_MIB_TABLE->wtx_total_byte); - printk("\n"); - - printk("Debugging Info:\n"); - printk(" Firmware version = %d.%d.%d.%d.%d.%d\n", - (int)FW_VER_ID->family, (int)FW_VER_ID->fwtype, (int)FW_VER_ID->interface, - (int)FW_VER_ID->fwmode, (int)FW_VER_ID->major, (int)FW_VER_ID->minor); - - printk(" retx_alpha_switch_to_hunt_times = %u\n", *URETX_ALPHA_SWITCH_TO_HUNT_TIMES); - - printk("\n"); - - *eof = 1; - - return len; -} - -static int proc_write_retx_mib(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[2048]; - char *p; - int len, rlen; - int i; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(p, "clean") == 0 || stricmp(p, "clear") == 0 || stricmp(p, "clear_all") == 0) { - *URETX_RX_TOTAL_DTU = 0; - *URETX_RX_BAD_DTU = 0; - *URETX_RX_GOOD_DTU = 0; - *URETX_RX_CORRECTED_DTU = 0; - *URETX_RX_OUTOFDATE_DTU = 0; - *URETX_RX_DUPLICATE_DTU = 0; - *URETX_RX_TIMEOUT_DTU = 0; - *RxDTURetransmittedCNT = 0; - - *WRX_BC0_CELL_NUM = 0; - *WRX_BC0_DROP_CELL_NUM = 0; - *WRX_BC0_NONRETX_CELL_NUM = 0; - *WRX_BC0_RETX_CELL_NUM = 0; - *WRX_BC0_OUTOFDATE_CELL_NUM = 0; - *WRX_BC0_DIRECTUP_NUM = 0; - *WRX_BC0_PBW_TOTAL_NUM = 0; - *WRX_BC0_PBW_SUCC_NUM = 0; - *WRX_BC0_PBW_FAIL_NUM = 0; - *WRX_BC1_CELL_NUM = 0; - - for ( i = 0; i < 16; ++i ) { - WRX_PER_PVC_CORRECT_PDU_BASE[i] = 0; - WRX_PER_PVC_ERROR_PDU_BASE[i] = 0; - } - - WAN_MIB_TABLE->wrx_drophtu_cell = 0; - WAN_MIB_TABLE->wrx_dropdes_pdu = 0; - WAN_MIB_TABLE->wrx_correct_pdu = 0; - WAN_MIB_TABLE->wrx_err_pdu = 0; - WAN_MIB_TABLE->wrx_dropdes_cell = 0; - WAN_MIB_TABLE->wrx_correct_cell = 0; - WAN_MIB_TABLE->wrx_err_cell = 0; - WAN_MIB_TABLE->wrx_total_byte = 0; - - WAN_MIB_TABLE->wtx_total_pdu = 0; - WAN_MIB_TABLE->wtx_total_cell = 0; - WAN_MIB_TABLE->wtx_total_byte = 0; - - *URETX_ALPHA_SWITCH_TO_HUNT_TIMES = 0; - - if (stricmp(p, "clear_all") == 0) { - *RxLastEFBCNT = 0; - *RxDTUCorrectedCNT = 0; - *RxDTUCorruptedCNT = 0; - *RxRetxDTUUncorrectedCNT = 0; - } - } - - return count; -} - -#endif - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - -static int proc_read_dbg(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "error print - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ERR) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "debug print - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "assert - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "dump rx skb - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_SKB_RX) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "dump tx skb - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_SKB_TX) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "qos - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_QOS) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "dump init - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DUMP_INIT) ? "enabled" : "disabled"); - len += sprintf(page + off + len, "mac swap - %s\n", (ifx_atm_dbg_enable & DBG_ENABLE_MASK_MAC_SWAP) ? "enabled" : "disabled"); - - *eof = 1; - - return len; -} - -static int proc_write_dbg(struct file *file, const char *buf, unsigned long count, void *data) -{ - static const char *dbg_enable_mask_str[] = { - " error print", - " err", - " debug print", - " dbg", - " assert", - " assert", - " dump rx skb", - " rx", - " dump tx skb", - " tx", - " dump qos", - " qos", - " dump init", - " init", - " mac swap", - " swap", - " all" - }; - static const int dbg_enable_mask_str_len[] = { - 12, 4, - 12, 4, - 7, 7, - 12, 3, - 12, 3, - 9, 4, - 10, 5, - 9, 5, - 4 - }; - unsigned int dbg_enable_mask[] = { - DBG_ENABLE_MASK_ERR, - DBG_ENABLE_MASK_DEBUG_PRINT, - DBG_ENABLE_MASK_ASSERT, - DBG_ENABLE_MASK_DUMP_SKB_RX, - DBG_ENABLE_MASK_DUMP_SKB_TX, - DBG_ENABLE_MASK_DUMP_QOS, - DBG_ENABLE_MASK_DUMP_INIT, - DBG_ENABLE_MASK_MAC_SWAP, - DBG_ENABLE_MASK_ALL - }; - - char *str; - int str_buff_len = 1024; - char *p; - - int len, rlen; - - int f_enable = 0; - int i; - - str = vmalloc(str_buff_len); - if(!str){ - return 0; - } - - len = count < str_buff_len ? count : str_buff_len - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ){ - vfree(str); - return 0; - } - - if ( strincmp(p, "enable", 6) == 0 ) { - p += 6; - f_enable = 1; - } - else if ( strincmp(p, "disable", 7) == 0 ) { - p += 7; - f_enable = -1; - } - else if ( strincmp(p, "help", 4) == 0 || *p == '?' ) { - printk("echo <enable/disable> [err/dbg/assert/rx/tx/init/all] > /proc/eth/dbg\n"); - } - - if ( f_enable ) { - if ( *p == 0 ) { - if ( f_enable > 0 ) - ifx_atm_dbg_enable |= DBG_ENABLE_MASK_ALL & ~DBG_ENABLE_MASK_MAC_SWAP; - else - ifx_atm_dbg_enable &= ~DBG_ENABLE_MASK_ALL | DBG_ENABLE_MASK_MAC_SWAP; - } - else { - do { - for ( i = 0; i < NUM_ENTITY(dbg_enable_mask_str); i++ ) - if ( strincmp(p, dbg_enable_mask_str[i], dbg_enable_mask_str_len[i]) == 0 ) { - if ( f_enable > 0 ) - ifx_atm_dbg_enable |= dbg_enable_mask[i >> 1]; - else - ifx_atm_dbg_enable &= ~dbg_enable_mask[i >> 1]; - p += dbg_enable_mask_str_len[i]; - break; - } - } while ( i < NUM_ENTITY(dbg_enable_mask_str) ); - } - } - - vfree(str); - return count; -} - -static inline unsigned long sb_addr_to_fpi_addr_convert(unsigned long sb_addr) -{ - #define PP32_SB_ADDR_END 0xFFFF - - if ( sb_addr < PP32_SB_ADDR_END ) - return (unsigned long)SB_BUFFER(sb_addr); - else - return sb_addr; -} - -static int proc_write_mem(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *p1, *p2; - int len; - int colon; - unsigned long *p; - int i, n, l; - int local_buf_size = 1024; - char *local_buf = NULL; - - local_buf = vmalloc(local_buf_size); - if ( !local_buf ){ - return 0; - } - - len = local_buf_size < count ? local_buf_size - 1 : count; - len = len - copy_from_user(local_buf, buf, len); - local_buf[len] = 0; - - p1 = local_buf; - colon = 1; - while ( get_token(&p1, &p2, &len, &colon) ) { - if ( stricmp(p1, "w") == 0 || stricmp(p1, "write") == 0 || stricmp(p1, "r") == 0 || stricmp(p1, "read") == 0 ) - break; - - p1 = p2; - colon = 1; - } - - if ( *p1 == 'w' ) { - ignore_space(&p2, &len); - p = (unsigned long *)get_number(&p2, &len, 1); - p = (unsigned long *)sb_addr_to_fpi_addr_convert((unsigned long)p); - - if ( (unsigned int)p >= KSEG0 ) - while ( 1 ) { - ignore_space(&p2, &len); - if ( !len || !((*p2 >= '0' && *p2 <= '9') || (*p2 >= 'a' && *p2 <= 'f') || (*p2 >= 'A' && *p2 <= 'F')) ) - break; - - *p++ = (unsigned int)get_number(&p2, &len, 1); - } - } - else if ( *p1 == 'r' ) { - ignore_space(&p2, &len); - p = (unsigned long *)get_number(&p2, &len, 1); - p = (unsigned long *)sb_addr_to_fpi_addr_convert((unsigned long)p); - - if ( (unsigned int)p >= KSEG0 ) { - ignore_space(&p2, &len); - n = (int)get_number(&p2, &len, 0); - if ( n ) { - char str[32] = {0}; - char *pch = str; - int k; - unsigned int data; - char c; - - n += (l = ((int)p >> 2) & 0x03); - p = (unsigned long *)((unsigned int)p & ~0x0F); - for ( i = 0; i < n; i++ ) { - if ( (i & 0x03) == 0 ) { - printk("%08X:", (unsigned int)p); - pch = str; - } - if ( i < l ) { - printk(" "); - sprintf(pch, " "); - } - else { - data = (unsigned int)*p; - printk(" %08X", data); - for ( k = 0; k < 4; k++ ) { - c = ((char*)&data)[k]; - pch[k] = c < ' ' ? '.' : c; - } - } - p++; - pch += 4; - if ( (i & 0x03) == 0x03 ) { - pch[0] = 0; - printk(" ; %s\n", str); - } - } - if ( (n & 0x03) != 0x00 ) { - for ( k = 4 - (n & 0x03); k > 0; k-- ) - printk(" "); - pch[0] = 0; - printk(" ; %s\n", str); - } - } - } - } - - vfree(local_buf); - return count; -} - - #if defined(CONFIG_AR9) || defined(CONFIG_VR9) - -static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - static const char *stron = " on"; - static const char *stroff = "off"; - - int len = 0; - int cur_context; - int f_stopped; - char str[256]; - char strlength; - int i, j; - - int pp32; - - for ( pp32 = 0; pp32 < NUM_OF_PP32; pp32++ ) { - f_stopped = 0; - - len += sprintf(page + off + len, "===== pp32 core %d =====\n", pp32); - - #ifdef CONFIG_VR9 - if ( (*PP32_FREEZE & (1 << (pp32 << 4))) != 0 ) { - sprintf(str, "freezed"); - f_stopped = 1; - } - #else - if ( 0 ) { - } - #endif - else if ( PP32_CPU_USER_STOPPED(pp32) || PP32_CPU_USER_BREAKIN_RCV(pp32) || PP32_CPU_USER_BREAKPOINT_MET(pp32) ) { - strlength = 0; - if ( PP32_CPU_USER_STOPPED(pp32) ) - strlength += sprintf(str + strlength, "stopped"); - if ( PP32_CPU_USER_BREAKPOINT_MET(pp32) ) - strlength += sprintf(str + strlength, strlength ? " | breakpoint" : "breakpoint"); - if ( PP32_CPU_USER_BREAKIN_RCV(pp32) ) - strlength += sprintf(str + strlength, strlength ? " | breakin" : "breakin"); - f_stopped = 1; - } - #if 0 - else if ( PP32_CPU_CUR_PC(pp32) == PP32_CPU_CUR_PC(pp32) ) { - sprintf(str, "hang"); - f_stopped = 1; - } - #endif - else - sprintf(str, "running"); - cur_context = PP32_BRK_CUR_CONTEXT(pp32); - len += sprintf(page + off + len, "Context: %d, PC: 0x%04x, %s\n", cur_context, PP32_CPU_CUR_PC(pp32), str); - - if ( PP32_CPU_USER_BREAKPOINT_MET(pp32) ) { - strlength = 0; - if ( PP32_BRK_PC_MET(pp32, 0) ) - strlength += sprintf(str + strlength, "pc0"); - if ( PP32_BRK_PC_MET(pp32, 1) ) - strlength += sprintf(str + strlength, strlength ? " | pc1" : "pc1"); - if ( PP32_BRK_DATA_ADDR_MET(pp32, 0) ) - strlength += sprintf(str + strlength, strlength ? " | daddr0" : "daddr0"); - if ( PP32_BRK_DATA_ADDR_MET(pp32, 1) ) - strlength += sprintf(str + strlength, strlength ? " | daddr1" : "daddr1"); - if ( PP32_BRK_DATA_VALUE_RD_MET(pp32, 0) ) { - strlength += sprintf(str + strlength, strlength ? " | rdval0" : "rdval0"); - if ( PP32_BRK_DATA_VALUE_RD_LO_EQ(pp32, 0) ) { - if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " >="); - } - if ( PP32_BRK_DATA_VALUE_RD_MET(pp32, 1) ) { - strlength += sprintf(str + strlength, strlength ? " | rdval1" : "rdval1"); - if ( PP32_BRK_DATA_VALUE_RD_LO_EQ(pp32, 1) ) { - if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_RD_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " >="); - } - if ( PP32_BRK_DATA_VALUE_WR_MET(pp32, 0) ) { - strlength += sprintf(str + strlength, strlength ? " | wtval0" : "wtval0"); - if ( PP32_BRK_DATA_VALUE_WR_LO_EQ(pp32, 0) ) { - if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 0) ) - strlength += sprintf(str + strlength, " >="); - } - if ( PP32_BRK_DATA_VALUE_WR_MET(pp32, 1) ) { - strlength += sprintf(str + strlength, strlength ? " | wtval1" : "wtval1"); - if ( PP32_BRK_DATA_VALUE_WR_LO_EQ(pp32, 1) ) { - if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " =="); - else - strlength += sprintf(str + strlength, " <="); - } - else if ( PP32_BRK_DATA_VALUE_WR_GT_EQ(pp32, 1) ) - strlength += sprintf(str + strlength, " >="); - } - len += sprintf(page + off + len, "break reason: %s\n", str); - } - - if ( f_stopped ) - { - len += sprintf(page + off + len, "General Purpose Register (Context %d):\n", cur_context); - for ( i = 0; i < 4; i++ ) { - for ( j = 0; j < 4; j++ ) - len += sprintf(page + off + len, " %2d: %08x", i + j * 4, *PP32_GP_CONTEXTi_REGn(pp32, cur_context, i + j * 4)); - len += sprintf(page + off + len, "\n"); - } - } - - len += sprintf(page + off + len, "break out on: break in - %s, stop - %s\n", - PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(pp32) ? stron : stroff, - PP32_CTRL_OPT_BREAKOUT_ON_STOP(pp32) ? stron : stroff); - len += sprintf(page + off + len, " stop on: break in - %s, break point - %s\n", - PP32_CTRL_OPT_STOP_ON_BREAKIN(pp32) ? stron : stroff, - PP32_CTRL_OPT_STOP_ON_BREAKPOINT(pp32) ? stron : stroff); - len += sprintf(page + off + len, "breakpoint:\n"); - len += sprintf(page + off + len, " pc0: 0x%08x, %s\n", *PP32_BRK_PC(pp32, 0), PP32_BRK_GRPi_PCn(pp32, 0, 0) ? "group 0" : "off"); - len += sprintf(page + off + len, " pc1: 0x%08x, %s\n", *PP32_BRK_PC(pp32, 1), PP32_BRK_GRPi_PCn(pp32, 1, 1) ? "group 1" : "off"); - len += sprintf(page + off + len, " daddr0: 0x%08x, %s\n", *PP32_BRK_DATA_ADDR(pp32, 0), PP32_BRK_GRPi_DATA_ADDRn(pp32, 0, 0) ? "group 0" : "off"); - len += sprintf(page + off + len, " daddr1: 0x%08x, %s\n", *PP32_BRK_DATA_ADDR(pp32, 1), PP32_BRK_GRPi_DATA_ADDRn(pp32, 1, 1) ? "group 1" : "off"); - len += sprintf(page + off + len, " rdval0: 0x%08x\n", *PP32_BRK_DATA_VALUE_RD(pp32, 0)); - len += sprintf(page + off + len, " rdval1: 0x%08x\n", *PP32_BRK_DATA_VALUE_RD(pp32, 1)); - len += sprintf(page + off + len, " wrval0: 0x%08x\n", *PP32_BRK_DATA_VALUE_WR(pp32, 0)); - len += sprintf(page + off + len, " wrval1: 0x%08x\n", *PP32_BRK_DATA_VALUE_WR(pp32, 1)); - } - - *eof = 1; - - return len; -} - -static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *str = NULL; - char *p; - unsigned int addr; - int str_buff_len = 1024; - - int len, rlen; - - int pp32 = 0; - - str = vmalloc(str_buff_len); - if (!str) { - return 0; - } - - len = count < str_buff_len ? count : str_buff_len - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ){ - vfree(str); - return 0; - } - - if ( strincmp(p, "pp32 ", 5) == 0 ) { - p += 5; - rlen -= 5; - - while ( rlen > 0 && *p >= '0' && *p <= '9' ) { - pp32 += *p - '0'; - p++; - rlen--; - } - while ( rlen > 0 && *p && *p <= ' ' ) { - p++; - rlen--; - } - - if ( pp32 >= NUM_OF_PP32 ) { - err("incorrect pp32 index - %d", pp32); - vfree(str); - return count; - } - } - - if ( stricmp(p, "start") == 0 ) - *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_RESTART; - else if ( stricmp(p, "stop") == 0 ) - *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_STOP; - else if ( stricmp(p, "step") == 0 ) - *PP32_CTRL_CMD(pp32) = PP32_CTRL_CMD_STEP; - #ifdef CONFIG_VR9 - else if ( stricmp(p, "restart") == 0 ) - *PP32_FREEZE &= ~(1 << (pp32 << 4)); - else if ( stricmp(p, "freeze") == 0 ) - *PP32_FREEZE |= 1 << (pp32 << 4); - #endif - else if ( strincmp(p, "pc0 ", 4) == 0 ) { - p += 4; - rlen -= 4; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_OFF(0, 0); - *PP32_BRK_PC_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_PC(pp32, 0) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_PC(pp32, 0) = addr; - *PP32_BRK_PC_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_ON(0, 0); - } - } - else if ( strincmp(p, "pc1 ", 4) == 0 ) { - p += 4; - rlen -= 4; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_OFF(1, 1); - *PP32_BRK_PC_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_PC(pp32, 1) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_PC(pp32, 1) = addr; - *PP32_BRK_PC_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_PCn_ON(1, 1); - } - } - else if ( strincmp(p, "daddr0 ", 7) == 0 ) { - p += 7; - rlen -= 7; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_OFF(0, 0); - *PP32_BRK_DATA_ADDR_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_DATA_ADDR(pp32, 0) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_DATA_ADDR(pp32, 0) = addr; - *PP32_BRK_DATA_ADDR_MASK(pp32, 0) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_ON(0, 0); - } - } - else if ( strincmp(p, "daddr1 ", 7) == 0 ) { - p += 7; - rlen -= 7; - if ( stricmp(p, "off") == 0 ) { - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_OFF(1, 1); - *PP32_BRK_DATA_ADDR_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN; - *PP32_BRK_DATA_ADDR(pp32, 1) = 0; - } - else { - addr = get_number(&p, &rlen, 1); - *PP32_BRK_DATA_ADDR(pp32, 1) = addr; - *PP32_BRK_DATA_ADDR_MASK(pp32, 1) = PP32_BRK_CONTEXT_MASK_EN | PP32_BRK_CONTEXT_MASK(0) | PP32_BRK_CONTEXT_MASK(1) | PP32_BRK_CONTEXT_MASK(2) | PP32_BRK_CONTEXT_MASK(3); - *PP32_BRK_TRIG(pp32) = PP32_BRK_GRPi_DATA_ADDRn_ON(1, 1); - } - } - else { - - printk("echo \"<command>\" > /proc/driver/ifx_ptm/pp32\n"); - printk(" command:\n"); - printk(" start - run pp32\n"); - printk(" stop - stop pp32\n"); - printk(" step - run pp32 with one step only\n"); - printk(" pc0 - pc0 <addr>/off, set break point PC0\n"); - printk(" pc1 - pc1 <addr>/off, set break point PC1\n"); - printk(" daddr0 - daddr0 <addr>/off, set break point data address 0\n"); - printk(" daddr0 - daddr1 <addr>/off, set break point data address 1\n"); - printk(" help - print this screen\n"); - } - - if ( *PP32_BRK_TRIG(pp32) ) - *PP32_CTRL_OPT(pp32) = PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON; - else - *PP32_CTRL_OPT(pp32) = PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF; - vfree(str); - return count; -} - -#elif defined(CONFIG_DANUBE) - -static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - static const char *halt_stat[] = { - "reset", - "break in line", - "stop", - "step", - "code", - "data0", - "data1" - }; - static const char *brk_src_data[] = { - "off", - "read", - "write", - "read/write", - "write_equal", - "N/A", - "N/A", - "N/A" - }; - static const char *brk_src_code[] = { - "off", - "on" - }; - - int len = 0; - int i; - int k; - unsigned long bit; - int tsk; - - tsk = *PP32_DBG_TASK_NO & 0x03; - len += sprintf(page + off + len, "Task No %d, PC %04x\n", tsk, *PP32_DBG_CUR_PC & 0xFFFF); - - if ( !(*PP32_HALT_STAT & 0x01) ) - len += sprintf(page + off + len, " Halt State: Running\n"); - else { - len += sprintf(page + off + len, " Halt State: Stopped"); - k = 0; - for ( bit = 2, i = 0; bit <= (1 << 7); bit <<= 1, i++ ) - if ( (*PP32_HALT_STAT & bit) ) { - if ( !k ) { - len += sprintf(page + off + len, ", "); - k++; - } - else - len += sprintf(page + off + len, " | "); - len += sprintf(page + off + len, halt_stat[i]); - } - - len += sprintf(page + off + len, "\n"); - - len += sprintf(page + off + len, " Regs (Task %d):\n", tsk); - for ( i = 0; i < 8; i++ ) - len += sprintf(page + off + len, " %2d. %08x %2d. %08x\n", i, *PP32_DBG_REG_BASE(tsk, i), i + 8, *PP32_DBG_REG_BASE(tsk, i + 8)); - } - - len += sprintf(page + off + len, " Break Src: data1 - %s, data0 - %s, pc3 - %s, pc2 - %s, pc1 - %s, pc0 - %s\n", - brk_src_data[(*PP32_BRK_SRC >> 11) & 0x07], - brk_src_data[(*PP32_BRK_SRC >> 8) & 0x07], - brk_src_code[(*PP32_BRK_SRC >> 3) & 0x01], - brk_src_code[(*PP32_BRK_SRC >> 2) & 0x01], - brk_src_code[(*PP32_BRK_SRC >> 1) & 0x01], - brk_src_code[*PP32_BRK_SRC & 0x01]); - - for ( i = 0; i < 4; i++ ) - len += sprintf(page + off + len, " pc%d: %04x - %04x\n", i, *PP32_DBG_PC_MIN(i), *PP32_DBG_PC_MAX(i)); - - for ( i = 0; i < 2; i++ ) - len += sprintf(page + off + len, " data%d: %04x - %04x (%08x)\n", i, *PP32_DBG_DATA_MIN(i), *PP32_DBG_DATA_MAX(i), *PP32_DBG_DATA_VAL(i)); - - *eof = 1; - - return len; -} - -static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *str; - char *p; - - int len, rlen; - int str_buff_len = 2048; - str = vmalloc(str_buff_len); - if (!str){ - return 0; - } - len = count < str_buff_len ? count : str_buff_len - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - vfree(str); - return 0; - - if ( stricmp(p, "start") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_START_SET(1); - else if ( stricmp(p, "stop") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_STOP_SET(1); - else if ( stricmp(p, "step") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_STEP_SET(1); - else if ( strincmp(p, "pc", 2) == 0 && p[2] >= '0' && p[2] <= '3' && p[3] <= ' ' ) { - int n = p[2] - '0'; - int on_off_flag = -1; - int addr_min, addr_max; - - p += 4; - rlen -= 4; - ignore_space(&p, &rlen); - - if ( strincmp(p, "off", 3) == 0 && p[3] <= ' ' ) { - p += 3; - rlen -= 3; - on_off_flag = 0; - } - else if ( strincmp(p, "on", 2) == 0 && p[2] <= ' ' ) { - p += 2; - rlen -= 2; - on_off_flag = 1; - } - ignore_space(&p, &rlen); - - if ( rlen ) { - addr_min = get_number(&p, &rlen, 1); - ignore_space(&p, &rlen); - if ( rlen ) - addr_max = get_number(&p, &rlen, 1); - else - addr_max = addr_min; - - *PP32_DBG_PC_MIN(n) = addr_min; - *PP32_DBG_PC_MAX(n) = addr_max; - } - - if ( on_off_flag == 0 ) - *PP32_BRK_SRC &= ~(1 << n); - else if ( on_off_flag > 0 ) - *PP32_BRK_SRC |= 1 << n; - } - else if ( strincmp(p, "data", 4) == 0 && p[4] >= '0' && p[4] <= '1' && p[5] <= ' ' ) { - const static char *data_cmd_str[] = {"r", "w", "rw", "w=", "off", "min", "min addr", "max", "max addr", "val", "value"}; - const static int data_cmd_len[] = {1, 1, 2, 2, 3, 3, 8, 3, 8, 3, 5}; - const static int data_cmd_idx[] = {1, 2, 3, 4, 0, 5, 5, 6, 6, 7, 7}; - int n = p[4] - '0'; - int on_off_flag = -1, on_off_mask = 0; - int addr_min = -1, addr_max = -1; - int value = 0, f_got_value = 0; - int stat = 0; - int i; - int tmp; - - p += 6; - rlen -= 6; - - while ( 1 ) { - ignore_space(&p, &rlen); - if ( rlen <= 0 ) - break; - for ( i = 0; i < NUM_ENTITY(data_cmd_str); i++ ) - if ( strincmp(p, data_cmd_str[i], data_cmd_len[i]) == 0 && p[data_cmd_len[i]] <= ' ' ) { - p += data_cmd_len[i]; - rlen -= data_cmd_len[i]; - stat = data_cmd_idx[i]; - if ( stat <= 4 ) { - on_off_mask = 7; - on_off_flag = stat; - } - break; - } - if ( i == NUM_ENTITY(data_cmd_str) ) { - if ( (*p >= '0' && *p <= '9') || (*p >= 'a' && *p <= 'f') || (*p >= 'A' && *p <= 'F') ) { - tmp = get_number(&p, &rlen, 1); - if ( stat <= 5 ) { - addr_min = tmp; - stat = 6; - } - else if ( stat >= 7 ) { - value = tmp; - f_got_value = 1; - } - else { - addr_max = tmp; - stat = 7; - } - } - else - for ( ; rlen && *p > ' '; rlen--, p++ ); - } - } - - if ( addr_min >= 0 ) - *PP32_DBG_DATA_MIN(n) = *PP32_DBG_DATA_MAX(n) = addr_min; - if ( addr_max >= 0 ) - *PP32_DBG_DATA_MAX(n) = addr_max; - if ( f_got_value ) - *PP32_DBG_DATA_VAL(n) = value; - if ( on_off_mask && on_off_flag >= 0 ) { - on_off_flag <<= n ? 11 : 8; - on_off_mask <<= n ? 11 : 8; - *PP32_BRK_SRC = (*PP32_BRK_SRC & ~on_off_mask) | on_off_flag; - } - } - else { - printk("echo \"<command>\" > /proc/eth/etop\n"); - printk(" command:\n"); - printk(" start - run pp32\n"); - printk(" stop - stop pp32\n"); - printk(" step - run pp32 with one step only\n"); - printk(" pc - pc? [on/off] [min addr] [max addr], set PC break point\n"); - printk(" data - data? [r/w/rw/w=/off] [min <addr>] [max <addr>] [val <value>], set data break point\n"); - printk(" help - print this screen\n"); - } - - vfree(str); - return count; -} - - #elif defined(CONFIG_AMAZON_SE) - -static int proc_read_pp32(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - static const char *halt_stat[] = { - "reset", - "break in line", - "stop", - "step", - "code", - "data0", - "data1" - }; - static const char *brk_src_data[] = { - "off", - "read", - "write", - "read/write", - "write_equal", - "N/A", - "N/A", - "N/A" - }; - static const char *brk_src_code[] = { - "off", - "on" - }; - - int len = 0; - int i; - int k; - unsigned long bit; - - len += sprintf(page + off + len, "Task No %d, PC %04x\n", *PP32_DBG_TASK_NO & 0x03, *PP32_DBG_CUR_PC & 0xFFFF); - - if ( !(*PP32_HALT_STAT & 0x01) ) - len += sprintf(page + off + len, " Halt State: Running\n"); - else - { - len += sprintf(page + off + len, " Halt State: Stopped"); - k = 0; - for ( bit = 2, i = 0; bit <= (1 << 7); bit <<= 1, i++ ) - if ( (*PP32_HALT_STAT & bit) ) - { - if ( !k ) - { - len += sprintf(page + off + len, ", "); - k++; - } - else - len += sprintf(page + off + len, " | "); - len += sprintf(page + off + len, halt_stat[i]); - } - - len += sprintf(page + off + len, "\n"); - } - - len += sprintf(page + off + len, " Break Src: data1 - %s, data0 - %s, pc3 - %s, pc2 - %s, pc1 - %s, pc0 - %s\n", - brk_src_data[(*PP32_BRK_SRC >> 11) & 0x07], brk_src_data[(*PP32_BRK_SRC >> 8) & 0x07], brk_src_code[(*PP32_BRK_SRC >> 3) & 0x01], brk_src_code[(*PP32_BRK_SRC >> 2) & 0x01], brk_src_code[(*PP32_BRK_SRC >> 1) & 0x01], brk_src_code[*PP32_BRK_SRC & 0x01]); - -// for ( i = 0; i < 4; i++ ) -// len += sprintf(page + off + len, " pc%d: %04x - %04x\n", i, *PP32_DBG_PC_MIN(i), *PP32_DBG_PC_MAX(i)); - -// for ( i = 0; i < 2; i++ ) -// len += sprintf(page + off + len, " data%d: %04x - %04x (%08x)\n", i, *PP32_DBG_DATA_MIN(i), *PP32_DBG_DATA_MAX(i), *PP32_DBG_DATA_VAL(i)); - - *eof = 1; - - return len; -} - -static int proc_write_pp32(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[2048]; - char *p; - - int len, rlen; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(str, "start") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_RESTART; - else if ( stricmp(str, "stop") == 0 ) - *PP32_DBG_CTRL = DBG_CTRL_STOP; -// else if ( stricmp(str, "step") == 0 ) -// *PP32_DBG_CTRL = DBG_CTRL_STEP_SET(1); - else - { - printk("echo \"<command>\" > /proc/eth/etop\n"); - printk(" command:\n"); - printk(" start - run pp32\n"); - printk(" stop - stop pp32\n"); -// printk(" step - run pp32 with one step only\n"); - printk(" help - print this screen\n"); - } - - return count; -} - - #endif - -#endif - -#if defined(ENABLE_FW_PROC) && ENABLE_FW_PROC - -static INLINE int print_htu(char *buf, int i) -{ - int len = 0; - - if ( HTU_ENTRY(i)->vld ) { - len += sprintf(buf + len, "%2d. valid\n", i); - len += sprintf(buf + len, " entry 0x%08x - pid %01x vpi %02x vci %04x pti %01x\n", *(unsigned int*)HTU_ENTRY(i), HTU_ENTRY(i)->pid, HTU_ENTRY(i)->vpi, HTU_ENTRY(i)->vci, HTU_ENTRY(i)->pti); - len += sprintf(buf + len, " mask 0x%08x - pid %01x vpi %02x vci %04x pti %01x\n", *(unsigned int*)HTU_MASK(i), HTU_MASK(i)->pid_mask, HTU_MASK(i)->vpi_mask, HTU_MASK(i)->vci_mask, HTU_MASK(i)->pti_mask); - len += sprintf(buf + len, " result 0x%08x - type: %s, qid: %d", *(unsigned int*)HTU_RESULT(i), HTU_RESULT(i)->type ? "cell" : "AAL5", HTU_RESULT(i)->qid); - if ( HTU_RESULT(i)->type ) - len += sprintf(buf + len, ", cell id: %d, verification: %s", HTU_RESULT(i)->cellid, HTU_RESULT(i)->ven ? "on" : "off"); - len += sprintf(buf + len, "\n"); - } - else - len += sprintf(buf + len, "%2d. invalid\n", i); - - return len; -} - -static int proc_read_htu(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - int len_max = off + count; - char *pstr; - int llen; - char *str; - int htuts = *CFG_WRX_HTUTS; - int i; - - str = vmalloc (1024); - if (!str) - return 0; - - pstr = *start = page; - - llen = sprintf(pstr, "HTU Table (Max %d):\n", htuts); - pstr += llen; - len += llen; - - for ( i = 0; i < htuts; i++ ) { - llen = print_htu(str, i); - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_HTU_OVERRUN_END; - } - - *eof = 1; - vfree(str); - return len - off; - -PROC_READ_HTU_OVERRUN_END: - - return len - llen - off; -} - -static INLINE int print_tx_queue(char *buf, int i) -{ - int len = 0; - - if ( (*WTX_DMACH_ON & (1 << i)) ) { - len += sprintf(buf + len, "%2d. valid\n", i); - len += sprintf(buf + len, " queue 0x%08x - sbid %u, qsb vcid %u, qsb %s\n", (unsigned int)WTX_QUEUE_CONFIG(i), (unsigned int)WTX_QUEUE_CONFIG(i)->sbid, (unsigned int)WTX_QUEUE_CONFIG(i)->qsb_vcid, WTX_QUEUE_CONFIG(i)->qsben ? "enable" : "disable"); - len += sprintf(buf + len, " dma 0x%08x - base %08x, len %u, vlddes %u\n", (unsigned int)WTX_DMA_CHANNEL_CONFIG(i), WTX_DMA_CHANNEL_CONFIG(i)->desba, WTX_DMA_CHANNEL_CONFIG(i)->deslen, WTX_DMA_CHANNEL_CONFIG(i)->vlddes); - } - else - len += sprintf(buf + len, "%2d. invalid\n", i); - - return len; -} - -static int proc_read_txq(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - int len_max = off + count; - char *pstr; - int llen; - int str_buff_len = 1024; - char *str; - - int i; - - str = vmalloc(str_buff_len); - if (!str){ - return 0; - } - pstr = *start = page; - - llen = sprintf(pstr, "TX Queue Config (Max %d):\n", *CFG_WTX_DCHNUM); - pstr += llen; - len += llen; - - for ( i = 0; i < 16; i++ ) { - llen = print_tx_queue(str, i); - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_HTU_OVERRUN_END; - } - - - *eof = 1; - - vfree(str); - return len - off; - -PROC_READ_HTU_OVERRUN_END: - - return len - llen - off; -} - - #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - -static int proc_read_retx_fw(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - unsigned int next_dtu_sid_out, last_dtu_sid_in, next_cell_sid_out, isr_cell_id; - unsigned int curr_time, sec_counter, curr_efb; - struct Retx_adsl_ppe_intf adsl_ppe_intf; - - adsl_ppe_intf = *RETX_ADSL_PPE_INTF; - next_dtu_sid_out = *NEXT_DTU_SID_OUT; - last_dtu_sid_in = *LAST_DTU_SID_IN; - next_cell_sid_out = *NEXT_CELL_SID_OUT; - isr_cell_id = *ISR_CELL_ID; - - curr_time = *URetx_curr_time; - sec_counter = *URetx_sec_counter; - curr_efb = *RxCURR_EFB; - - - len += sprintf(page + off + len, "Adsl-PPE Interface:\n"); - len += sprintf(page + off + len, " dtu_sid = 0x%02x [%3u]\n", adsl_ppe_intf.dtu_sid, adsl_ppe_intf.dtu_sid); - len += sprintf(page + off + len, " dtu_timestamp = 0x%02x\n", adsl_ppe_intf.dtu_timestamp); - len += sprintf(page + off + len, " local_time = 0x%02x\n", adsl_ppe_intf.local_time); - len += sprintf(page + off + len, " is_last_cw = %u\n", adsl_ppe_intf.is_last_cw); - len += sprintf(page + off + len, " reinit_flag = %u\n", adsl_ppe_intf.reinit_flag); - len += sprintf(page + off + len, " is_bad_cw = %u\n", adsl_ppe_intf.is_bad_cw); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "Retx Firmware Context:\n"); - len += sprintf(page + off + len, " next_dtu_sid_out (0x%08x) = 0x%02x [%3u]\n", (unsigned int )NEXT_DTU_SID_OUT, next_dtu_sid_out, next_dtu_sid_out); - len += sprintf(page + off + len, " last_dtu_sid_in (0x%08x) = 0x%02x [%3u]\n", (unsigned int )LAST_DTU_SID_IN, last_dtu_sid_in, last_dtu_sid_in); - len += sprintf(page + off + len, " next_cell_sid_out (0x%08x) = %u\n", (unsigned int )NEXT_CELL_SID_OUT, next_cell_sid_out); - len += sprintf(page + off + len, " isr_cell_id (0x%08x) = %u\n", (unsigned int )ISR_CELL_ID, isr_cell_id); - len += sprintf(page + off + len, " pb_cell_search_idx (0x%08x) = %u\n", (unsigned int )PB_CELL_SEARCH_IDX, *PB_CELL_SEARCH_IDX); - len += sprintf(page + off + len, " pb_read_pend_flag (0x%08x) = %u\n", (unsigned int )PB_READ_PEND_FLAG, *PB_READ_PEND_FLAG); - len += sprintf(page + off + len, " rfbi_first_cw (0x%08x) = %u\n", (unsigned int )RFBI_FIRST_CW, *RFBI_FIRST_CW); - len += sprintf(page + off + len, " rfbi_bad_cw (0x%08x) = %u\n", (unsigned int )RFBI_BAD_CW, *RFBI_BAD_CW); - len += sprintf(page + off + len, " rfbi_invalid_cw (0x%08x) = %u\n", (unsigned int )RFBI_INVALID_CW, *RFBI_INVALID_CW); - len += sprintf(page + off + len, " rfbi_retx_cw (0x%08x) = %u\n", (unsigned int )RFBI_RETX_CW, *RFBI_RETX_CW); - len += sprintf(page + off + len, " rfbi_chk_dtu_status (0x%08x) = %u\n", (unsigned int )RFBI_CHK_DTU_STATUS,*RFBI_CHK_DTU_STATUS); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "SFSM Status: bc0 bc1 \n\n"); - len += sprintf(page + off + len, " state = %-22s , %s\n", - (*__WRXCTXT_PortState(0) & 3) == 0 ? "Hunt" : - (*__WRXCTXT_PortState(0) & 3) == 1 ? "Pre_sync" : - (*__WRXCTXT_PortState(0) & 3) == 2 ? "Sync" : - "Unknown(error)", - (*__WRXCTXT_PortState(1) & 3) == 0 ? "Hunt" : - (*__WRXCTXT_PortState(1) & 3) == 1 ? "Pre_sync" : - (*__WRXCTXT_PortState(1) & 3) == 2 ? "Sync" : - "Unknown(error)" ); - len += sprintf(page + off + len, " dbase = 0x%04x ( 0x%08x ) , 0x%04x ( 0x%08x )\n", - SFSM_DBA(0)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_DBA(0)->dbase + 0x2000), - SFSM_DBA(1)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_DBA(1)->dbase + 0x2000)); - len += sprintf(page + off + len, " cbase = 0x%04x ( 0x%08x ) , 0x%04x ( 0x%08x )\n", - SFSM_CBA(0)->cbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_CBA(0)->cbase + 0x2000), - SFSM_CBA(1)->cbase, (unsigned int)PPM_INT_UNIT_ADDR(SFSM_CBA(1)->cbase + 0x2000)); - len += sprintf(page + off + len, " sen = %-22d , %d\n", SFSM_CFG(0)->sen, SFSM_CFG(1)->sen ); - len += sprintf(page + off + len, " idlekeep = %-22d , %d\n", SFSM_CFG(0)->idlekeep, SFSM_CFG(1)->idlekeep ); - len += sprintf(page + off + len, " pnum = %-22d , %d\n", SFSM_CFG(0)->pnum, SFSM_CFG(1)->pnum ); - len += sprintf(page + off + len, " pptr = %-22d , %d\n", SFSM_PGCNT(0)->pptr, SFSM_PGCNT(1)->pptr); - len += sprintf(page + off + len, " upage = %-22d , %d\n", SFSM_PGCNT(0)->upage, SFSM_PGCNT(1)->upage); - len += sprintf(page + off + len, " l2_rdptr = %-22d , %d\n", *__WRXCTXT_L2_RdPtr(0), *__WRXCTXT_L2_RdPtr(1) ); - len += sprintf(page + off + len, " l2_page = %-22d , %d\n", *__WRXCTXT_L2Pages(0), *__WRXCTXT_L2Pages(1) ); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "FFSM Status: bc0 bc1 \n\n"); - len += sprintf(page + off + len, " dbase = 0x%04x ( 0x%08x ) , 0x%04x ( 0x%08x )\n", - FFSM_DBA(0)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(FFSM_DBA(0)->dbase + 0x2000), - FFSM_DBA(1)->dbase, (unsigned int)PPM_INT_UNIT_ADDR(FFSM_DBA(1)->dbase + 0x2000)); - len += sprintf(page + off + len, " pnum = %-22d , %d\n", FFSM_CFG(0)->pnum, FFSM_CFG(1)->pnum); - len += sprintf(page + off + len, " vpage = %-22d , %d\n", FFSM_PGCNT(0)->vpage, FFSM_PGCNT(1)->vpage); - len += sprintf(page + off + len, " ival = %-22d , %d\n", FFSM_PGCNT(0)->ival, FFSM_PGCNT(1)->ival); - len += sprintf(page + off + len, " tc_wrptr = %-22d , %d\n", *__WTXCTXT_TC_WRPTR(0), *__WTXCTXT_TC_WRPTR(1)); - len += sprintf(page + off + len, "\n"); - - - len += sprintf(page + off + len, "Misc: \n\n"); - len += sprintf(page + off + len, " curr_time = %08x\n", curr_time ); - len += sprintf(page + off + len, " sec_counter = %d\n", sec_counter ); - len += sprintf(page + off + len, " curr_efb = %d\n", curr_efb ); - len += sprintf(page + off + len, "\n"); - - *eof = 1; - - return len; -} - -static inline int is_valid(unsigned int * dtu_vld_stat, int dtu_sid) -{ - int dw_idx = (dtu_sid / 32) & 7; - int bit_pos = dtu_sid % 32; - - return dtu_vld_stat[dw_idx] & (0x80000000 >> bit_pos); -} - -static int proc_read_retx_stats(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int i; - int len = 0; - int len_max = off + count; - char *pstr; - char str[2048]; - int llen = 0; - - unsigned int next_dtu_sid_out, last_dtu_sid_in, next_cell_sid_out; - unsigned int dtu_vld_stat[8]; - struct DTU_stat_info dtu_stat_info[256]; - struct Retx_adsl_ppe_intf adsl_ppe_intf; - - pstr = *start = page; - - __sync(); - - // capture a snapshot of internal status - next_dtu_sid_out = *NEXT_DTU_SID_OUT; - last_dtu_sid_in = *LAST_DTU_SID_IN; - next_cell_sid_out = *NEXT_CELL_SID_OUT; - adsl_ppe_intf = *RETX_ADSL_PPE_INTF; - - memcpy(&dtu_vld_stat, (void *)DTU_VLD_STAT, sizeof(dtu_vld_stat)); - memcpy(&dtu_stat_info, (void *)DTU_STAT_INFO, sizeof(dtu_stat_info)); - - - llen += sprintf(str + llen, "Adsl-PPE Interface:\n"); - llen += sprintf(str + llen, " dtu_sid = 0x%02x [%3u]\n", adsl_ppe_intf.dtu_sid, adsl_ppe_intf.dtu_sid); - llen += sprintf(str + llen, " dtu_timestamp = 0x%02x\n", adsl_ppe_intf.dtu_timestamp); - llen += sprintf(str + llen, " local_time = 0x%02x\n", adsl_ppe_intf.local_time); - llen += sprintf(str + llen, " is_last_cw = %u\n", adsl_ppe_intf.is_last_cw); - llen += sprintf(str + llen, " reinit_flag = %u\n", adsl_ppe_intf.reinit_flag); - llen += sprintf(str + llen, " is_bad_cw = %u\n", adsl_ppe_intf.is_bad_cw); - llen += sprintf(str + llen, "\n"); - - llen += sprintf(str + llen, "Retx Internal State:\n"); - llen += sprintf(str + llen, " next_dtu_sid_out (0x%08x) = 0x%02x [%3u]\n", (unsigned int )NEXT_DTU_SID_OUT, next_dtu_sid_out, next_dtu_sid_out); - llen += sprintf(str + llen, " last_dtu_sid_in (0x%08x) = 0x%02x [%3u]\n", (unsigned int )LAST_DTU_SID_IN, last_dtu_sid_in, last_dtu_sid_in); - llen += sprintf(str + llen, " next_cell_sid_out (0x%08x) = %u\n", (unsigned int )NEXT_CELL_SID_OUT, next_cell_sid_out); - llen += sprintf(str + llen, " dtu_valid_stat (0x%08x)\n", (unsigned int )DTU_VLD_STAT); - llen += sprintf(str + llen, " dtu_stat_info (0x%08x)\n", (unsigned int )DTU_STAT_INFO); - llen += sprintf(str + llen, " pb_buffer_usage (0x%08x)\n", (unsigned int )PB_BUFFER_USAGE); - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - - - llen += sprintf(str + llen, "\n"); - llen += sprintf(str + llen, "DTU_VALID_STAT: [0x%08x]:\n", (unsigned int)DTU_VLD_STAT); - llen += sprintf(str + llen, "%08X: %08X %08X %08X %08X %08X %08X %08X %08X\n", - (unsigned int)DTU_VLD_STAT, - dtu_vld_stat[0], dtu_vld_stat[1], dtu_vld_stat[2], dtu_vld_stat[3], - dtu_vld_stat[4], dtu_vld_stat[5], dtu_vld_stat[6], dtu_vld_stat[7]); - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - - - llen += sprintf(str + llen, "\n"); - llen += sprintf(str + llen, "DTU_STAT_INFO: [0x%08x]:\n", (unsigned int)DTU_STAT_INFO); - llen += sprintf(str + llen, "dtu_id ts complete bad cell_cnt dtu_rd_ptr dtu_wr_ptr\n"); - llen += sprintf(str + llen, "---------------------------------------------------------------------\n"); - for ( i = 0; i < 256; i++ ) { - if ( !is_valid(dtu_vld_stat, i) ) - continue; - - llen += sprintf(str + llen, "0x%02x [%3u] 0x%02x %d %d %3d %5d %5d\n", - i, i, - DTU_STAT_INFO[i].time_stamp, - DTU_STAT_INFO[i].complete, - DTU_STAT_INFO[i].bad, - DTU_STAT_INFO[i].cell_cnt, - DTU_STAT_INFO[i].dtu_rd_ptr, - DTU_STAT_INFO[i].dtu_wr_ptr ); - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) - { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - } - - - llen += sprintf(str + llen, "\n"); - llen += sprintf(str + llen, "Playout buffer status --- valid status [0x%08x]:\n", (unsigned int)PB_BUFFER_USAGE); - for( i = 0; i < RETX_MODE_CFG->buff_size; i += 8 ) { - llen += sprintf(str + llen, "%08X: %08X %08X %08X %08X %08X %08X %08X %08X\n", - (unsigned int)PB_BUFFER_USAGE + i * sizeof(unsigned int), - PB_BUFFER_USAGE[i], PB_BUFFER_USAGE[i+1], PB_BUFFER_USAGE[i+2], PB_BUFFER_USAGE[i+3], - PB_BUFFER_USAGE[i+4], PB_BUFFER_USAGE[i+5], PB_BUFFER_USAGE[i+6], PB_BUFFER_USAGE[i+7]); - } - - if ( len <= off && len + llen > off ) { - memcpy(pstr, str + off - len, len + llen - off); - pstr += len + llen - off; - } - else if ( len > off ) { - memcpy(pstr, str, llen); - pstr += llen; - } - len += llen; - if ( len >= len_max ) - goto PROC_READ_RETX_STATS_OVERRUN_END; - llen = 0; - - - *eof = 1; - - return len - off; - -PROC_READ_RETX_STATS_OVERRUN_END: - return len - llen - off; -} - -static int proc_write_retx_stats(struct file *file, const char *buf, unsigned long count, void *data) -{ - char str[2048]; - char *p; - - int len, rlen; - - len = count < sizeof(str) ? count : sizeof(str) - 1; - rlen = len - copy_from_user(str, buf, len); - while ( rlen && str[rlen - 1] <= ' ' ) - rlen--; - str[rlen] = 0; - for ( p = str; *p && *p <= ' '; p++, rlen-- ); - if ( !*p ) - return 0; - - if ( stricmp(p, "help") == 0 ) { - printk("echo clear_pb > /proc/driver/ifx_atm/retx_stats \n"); - printk(" :clear context in playout buffer\n\n"); - printk("echo read_pb <pb_index> <cell_num> > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read playout buffer contents\n\n"); - printk("echo read_[r|t]x_cb > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read cell buffer\n\n"); - printk("echo clear_[r|t]x_cb > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : clear cell buffer\n\n"); - printk("echo read_bad_dtu_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read bad dtu intrface information record\n\n"); - printk("echo clear_bad_dtu_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : clear bad dtu interface information record\n\n"); - printk("echo read_wrx_context [i] > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : clear bad dtu interface information record\n\n"); - printk("echo read_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : read interface info record buffer\n\n"); - printk("echo reinit_intf_rec > /proc/driver/ifx_atm/retx_stats\n"); - printk(" : reinit intf record, must be called before showtime\n\n"); - } - else if ( stricmp(p, "reinit_intf_rec") == 0 ) { - int i = 0; - struct Retx_adsl_ppe_intf_rec rec[16]; - - *DBG_DTU_INTF_WRPTR = 0; - *DBG_INTF_FCW_DUP_CNT = 0; - *DBG_INTF_SID_CHANGE_IN_DTU_CNT = 0; - *DBG_INTF_LCW_DUP_CNT = 0; - - *DBG_RFBI_DONE_INT_CNT = 0; - *DBG_RFBI_INTV0 = 0; - *DBG_RFBI_INTV1 = 0; - *DBG_RFBI_BC0_INVALID_CNT = 0; - *DBG_RFBI_LAST_T = 0; - *DBG_DREG_BEG_END = 0; - - memset((void *) DBG_INTF_INFO(0), 0, sizeof(rec)); - for( i = 0; i < 16; i++ ) - DBG_INTF_INFO(i)->res1_1 = 1; - DBG_INTF_INFO(15)->dtu_sid = 255; - } - else if ( stricmp(p, "read_intf_rec") == 0 ) { - int i, cnt; - unsigned int dtu_intf_wrptr, fcw_dup_cnt, sid_change_in_dtu_cnt, lcw_dup_cnt ; - unsigned int rfbi_done_int_cnt, rfbi_intv0, rfbi_intv1, rfbi_bc0_invalid_cnt, dreg_beg_end; - struct Retx_adsl_ppe_intf_rec rec[16]; - - memcpy((void *) rec, (void *) DBG_INTF_INFO(0), sizeof(rec)); - - dtu_intf_wrptr = *DBG_DTU_INTF_WRPTR; - fcw_dup_cnt = *DBG_INTF_FCW_DUP_CNT; - sid_change_in_dtu_cnt = *DBG_INTF_SID_CHANGE_IN_DTU_CNT; - lcw_dup_cnt = *DBG_INTF_LCW_DUP_CNT; - - rfbi_done_int_cnt = *DBG_RFBI_DONE_INT_CNT; - rfbi_intv0 = *DBG_RFBI_INTV0; - rfbi_intv1 = *DBG_RFBI_INTV1; - rfbi_bc0_invalid_cnt = *DBG_RFBI_BC0_INVALID_CNT; - dreg_beg_end = *DBG_DREG_BEG_END; - - printk("PPE-Adsl Interface recrod [addr 0x23F0]:\n\n"); - - printk(" rfbi_done_int_cnt = %d [0x%x] \n", rfbi_done_int_cnt, rfbi_done_int_cnt); - printk(" rfbi_intv = 0x%08x 0x%08x [%d, %d, %d, %d, %d, %d, %d, %d]\n", - rfbi_intv0, rfbi_intv1, - rfbi_intv0 >> 24, (rfbi_intv0>>16) & 0xff, (rfbi_intv0>>8) & 0xff, rfbi_intv0 & 0xff, - rfbi_intv1 >> 24, (rfbi_intv1>>16) & 0xff, (rfbi_intv1>>8) & 0xff, rfbi_intv1 & 0xff - ); - printk(" rfbi_bc0_invld_cnt = %d\n", rfbi_bc0_invalid_cnt); - printk(" dreg_beg_end = %d, %d\n\n", dreg_beg_end >> 16, dreg_beg_end & 0xffff); - - printk(" wrptr = %d [0x%x] \n", dtu_intf_wrptr, dtu_intf_wrptr); - printk(" fcw_dup_cnt = %d\n", fcw_dup_cnt); - printk(" sid_chg_cnt = %d\n", sid_change_in_dtu_cnt); - printk(" lcw_dup_cnt = %d\n\n", lcw_dup_cnt); - - - printk(" idx itf_dw0 itf_dw1 dtu_sid timestamp local_time res1 last_cw bad_flag reinit\n"); - printk(" -------------------------------------------------------------------------------------\n"); - for ( i = (dtu_intf_wrptr + 1) % 16, cnt = 0; cnt < 16; cnt ++, i = (i + 1) % 16 ) { - if(cnt < 15) - printk(" "); - else - printk(" *"); - printk("%3d %04x %04x %3d[%02x] %3d[%02x] %3d[%02x] 0x%02x %d %d %d\n", - i, - (*(unsigned int *)&rec[i]) & 0xffff, - (*(unsigned int *)&rec[i]) >> 16, - rec[i].dtu_sid, rec[i].dtu_sid, - rec[i].dtu_timestamp, rec[i].dtu_timestamp, - rec[i].local_time, rec[i].local_time, - rec[i].res1_1, - rec[i].is_last_cw, - rec[i].is_bad_cw, - rec[i].reinit_flag ); - } - } - else if ( stricmp(p, "read_wrx_context") == 0 ) { - int i = 0; - int flag = 0; - for( i = 0; i < 8; ++i ) { - if ( !WRX_QUEUE_CONTEXT(i)->curr_des0 || !WRX_QUEUE_CONTEXT(i)->curr_des1 ) - continue; - - flag = 1; - printk("WRX queue context [ %d ]: \n", i); - printk(" curr_len = %4d, mfs = %d, ec = %d, clp1 = %d, aal5dp = %d\n", - WRX_QUEUE_CONTEXT(i)->curr_len, WRX_QUEUE_CONTEXT(i)->mfs, - WRX_QUEUE_CONTEXT(i)->ec, WRX_QUEUE_CONTEXT(i)->clp1, - WRX_QUEUE_CONTEXT(i)->aal5dp); - printk(" initcrc = %08x\n", WRX_QUEUE_CONTEXT(i)->intcrc); - printk(" currdes = %08x %08x\n", - WRX_QUEUE_CONTEXT(i)->curr_des0, WRX_QUEUE_CONTEXT(i)->curr_des1); - printk(" last_dw = %08x\n\n", WRX_QUEUE_CONTEXT(i)->last_dword); - if( WRX_QUEUE_CONTEXT(i)->curr_len ) { - int j = 0; - unsigned char *p_char; - struct rx_descriptor *desc = (struct rx_descriptor *)&(WRX_QUEUE_CONTEXT(i)->curr_des0); - p_char = (unsigned char *)(((unsigned int)desc->dataptr << 2) | KSEG1); - printk(" Data in SDRAM:\n "); - - for ( j = 0 ; j < WRX_QUEUE_CONTEXT(i)->curr_len; ++j ) { - printk ("%02x", p_char[j]); - if ( j % 16 == 15 ) - printk("\n "); - else if ( j % 4 == 3 ) - printk (" "); - } - printk("\n\n"); - } - } - if ( !flag ) { - printk("No active wrx queue context\n"); - } - } - else if ( stricmp(p, "clear_pb") == 0 ) { - if ( g_retx_playout_buffer ) - memset((void *)g_retx_playout_buffer, 0, RETX_PLAYOUT_BUFFER_SIZE); - } - else if ( stricmp(p, "read_bad_dtu_intf_rec") == 0 ) { - struct Retx_adsl_ppe_intf first_dtu_intf, last_dtu_intf; - first_dtu_intf = *FIRST_BAD_REC_RETX_ADSL_PPE_INTF; - last_dtu_intf = *BAD_REC_RETX_ADSL_PPE_INTF; - - printk("\nAdsl-PPE Interface for first and last DTU of recent noise:\n\n"); - printk(" dtu_sid = 0x%02x [%3u], 0x%02x [%3u]\n", - first_dtu_intf.dtu_sid, first_dtu_intf.dtu_sid, - last_dtu_intf.dtu_sid, last_dtu_intf.dtu_sid); - printk(" dtu_timestamp = 0x%02x , 0x%02x\n", - first_dtu_intf.dtu_timestamp, last_dtu_intf.dtu_timestamp); - printk(" local_time = 0x%02x , 0x%02x\n", - first_dtu_intf.local_time, last_dtu_intf.local_time); - printk(" is_last_cw = %u , %u\n", - first_dtu_intf.is_last_cw, last_dtu_intf.is_last_cw); - printk(" reinit_flag = %u , %u\n", - first_dtu_intf.reinit_flag, last_dtu_intf.reinit_flag); - printk(" is_bad_cw = %u , %u\n\n", - first_dtu_intf.is_bad_cw, last_dtu_intf.is_bad_cw); - } - else if ( stricmp(p, "clear_bad_dtu_intf_rec") == 0 ) { - memset((void *)BAD_REC_RETX_ADSL_PPE_INTF, 0, sizeof(struct Retx_adsl_ppe_intf)); - memset((void *)FIRST_BAD_REC_RETX_ADSL_PPE_INTF, 0, sizeof(struct Retx_adsl_ppe_intf)); - } - else if ( stricmp(p, "clear_tx_cb") == 0 ) { - unsigned int *dbase0; - unsigned int pnum0; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( FFSM_DBA(0)->dbase + 0x2000); - pnum0 = FFSM_CFG(0)->pnum; - memset(dbase0, 0, 14 * sizeof(unsigned int ) * pnum0); - } - else if ( stricmp(p, "clear_rx_cb") == 0 ) { - unsigned int *dbase0, *cbase0, *dbase1, *cbase1; - unsigned int pnum0; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(0)->dbase + 0x2000); - cbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(0)->cbase + 0x2000); - - dbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(1)->dbase + 0x2000); - cbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(1)->cbase + 0x2000); - - pnum0 = SFSM_CFG(0)->pnum; - - memset(dbase0, 0, 14 * sizeof(unsigned int ) * pnum0); - memset(cbase0, 0, sizeof(unsigned int ) * pnum0); - - memset(dbase1, 0, 14 * sizeof(unsigned int )); - memset(cbase1, 0, sizeof(unsigned int )); - } - else if ( strnicmp(p, "read_tx_cb", 10) == 0 ) { - unsigned int *dbase0; - unsigned int pnum0, i; - unsigned int * cell; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( FFSM_DBA(0)->dbase + 0x2000); - pnum0 = FFSM_CFG(0)->pnum; - - printk("ATM TX BC 0 CELL data/ctrl buffer:\n\n"); - for(i = 0; i < pnum0 ; ++ i) { - cell = dbase0 + i * 14; - printk("cell %2d: %08x %08x\n", i, cell[0], cell[1]); - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - } - else if ( strnicmp(p, "read_rx_cb", 10) == 0 ) { - unsigned int *dbase0, *cbase0, *dbase1, *cbase1; - unsigned int pnum0, i; - unsigned int * cell; - - dbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(0)->dbase + 0x2000); - cbase0 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(0)->cbase + 0x2000); - - dbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_DBA(1)->dbase + 0x2000); - cbase1 = (unsigned int *)PPM_INT_UNIT_ADDR( SFSM_CBA(1)->cbase + 0x2000); - - pnum0 = SFSM_CFG(0)->pnum; - - printk("ATM RX BC 0 CELL data/ctrl buffer:\n\n"); - for(i = 0; i < pnum0 ; ++ i) { - struct Retx_ctrl_field * p_ctrl; - - cell = dbase0 + i * 14; - p_ctrl = (struct Retx_ctrl_field *) ( &cbase0[i]); - printk("cell %2d: %08x %08x -- [%08x]:", i, cell[0], cell[1], cbase0[i]); - - printk("l2_drop: %d, retx: %d", p_ctrl->l2_drop, p_ctrl->retx); - if ( p_ctrl->retx ) { - printk(", dtu_sid = %u, cell_sid = %u", p_ctrl->dtu_sid, p_ctrl->cell_sid); - } - - printk("\n"); - - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - - printk("\n"); - printk("ATM RX BC 1 CELL data/ctrl buffer:\n\n"); - cell = dbase1; - printk("cell %2d: %08x %08x -- [%08x]: dtu_sid:%3d, cell_sid:%3d, next_ptr: %4d\n", - 0, cell[0], cell[1], cbase0[i], ( cell[1] >> 16) & 0xff, (cell[1] >> 24) & 0xff, cell[1] & 0xffff ); - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - else if ( strnicmp(p, "read_pb ", 8) == 0 ) - { - int start_cell_idx = 0; - int cell_num = 0; - unsigned int *cell; - unsigned int pb_buff_size = RETX_MODE_CFG->buff_size * 32; - - p += 8; - rlen -= 8; - ignore_space(&p, &rlen); - - start_cell_idx = get_number(&p, &rlen, 0); - ignore_space(&p, &rlen); - cell_num = get_number(&p, &rlen, 0); - - if ( start_cell_idx >= pb_buff_size ) { - printk(" Invalid cell index\n"); - } - else { - int i; - if ( cell_num < 0 ) - cell_num = 1; - - if ( cell_num + start_cell_idx > pb_buff_size ) - cell_num = pb_buff_size - start_cell_idx; - - for ( i = 0; i < cell_num ; ++i ) { - cell = (unsigned int *)((unsigned int *)g_retx_playout_buffer + (14 * (start_cell_idx + i))); - printk("cell %4d: %08x %08x [next_ptr = %4u, dtu_sid = %3u, cell_sid = %3u]\n", - start_cell_idx + i, cell[0], cell[1], cell[1] & 0xffff, (cell[1] >> 16) & 0xff, (cell[1] >> 24) & 0xff); - printk(" %08x %08x %08x %08x\n", cell[2], cell[3], cell[4], cell[5]); - printk(" %08x %08x %08x %08x\n", cell[6], cell[7], cell[8], cell[9]); - printk(" %08x %08x %08x %08x\n", cell[10], cell[11], cell[12], cell[13]); - } - } - } - - return count; -} - -static int proc_read_retx_cfg(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "ReTX FW Config:\n"); - len += sprintf(page + off + len, " RETX_MODE_CFG = 0x%08x, invld_range=%u, buff_size=%u, retx=%u\n", *(volatile unsigned int *)RETX_MODE_CFG, (unsigned int)RETX_MODE_CFG->invld_range, (unsigned int)RETX_MODE_CFG->buff_size * 32, (unsigned int)RETX_MODE_CFG->retx_en); - len += sprintf(page + off + len, " RETX_TSYNC_CFG = 0x%08x, fw_alpha=%u, sync_inp=%u\n", *(volatile unsigned int *)RETX_TSYNC_CFG, (unsigned int)RETX_TSYNC_CFG->fw_alpha, (unsigned int)RETX_TSYNC_CFG->sync_inp); - len += sprintf(page + off + len, " RETX_TD_CFG = 0x%08x, td_max=%u, td_min=%u\n", *(volatile unsigned int *)RETX_TD_CFG, (unsigned int)RETX_TD_CFG->td_max, (unsigned int)RETX_TD_CFG->td_min); - len += sprintf(page + off + len, " RETX_PLAYOUT_BUFFER_BASE = 0x%08x\n", *RETX_PLAYOUT_BUFFER_BASE); - len += sprintf(page + off + len, " RETX_SERVICE_HEADER_CFG = 0x%08x\n", *RETX_SERVICE_HEADER_CFG); - len += sprintf(page + off + len, " RETX_MASK_HEADER_CFG = 0x%08x\n", *RETX_MASK_HEADER_CFG); - len += sprintf(page + off + len, " RETX_MIB_TIMER_CFG = 0x%08x, tick_cycle = %d, ticks_per_sec = %d\n", - *(unsigned int *)RETX_MIB_TIMER_CFG, RETX_MIB_TIMER_CFG->tick_cycle, RETX_MIB_TIMER_CFG->ticks_per_sec); - - *eof = 1; - - return len; -} - -static int proc_write_retx_cfg(struct file *file, const char *buf, unsigned long count, void *data) -{ - char *p1, *p2; - int len; - int colon; - char local_buf[1024]; - char *tokens[4] = {0}; - unsigned int token_num = 0; - - len = sizeof(local_buf) < count ? sizeof(local_buf) - 1 : count; - len = len - copy_from_user(local_buf, buf, len); - local_buf[len] = 0; - - p1 = local_buf; - colon = 0; - while ( token_num < NUM_ENTITY(tokens) && get_token(&p1, &p2, &len, &colon) ) { - tokens[token_num++] = p1; - - p1 = p2; - } - - if ( token_num > 0 ) { - if ( stricmp(tokens[0], "help") == 0 ) { - printk("echo help > /proc/driver/ifx_atm/retx_cfg ==> \n\tprint this help message\n\n"); - - printk("echo set retx <enable|disable|0|1|on|off> > /proc/driver/ifx_atm/retx_cfg\n"); - printk("\t:enable or disable retx feature\n\n"); - - printk("echo set <td_max|td_min|fw_alpha|sync_inp|invld_range|buff_size> <number> > /proc/driver/ifx_atm/retx_cfg\n"); - printk("\t: set td_max, td_min, fw_alpha, sync_inp, invalid_range, buff_size\n\n"); - - printk("echo set <service_header|service_mask> <hex_number> /proc/driver/ifx_atm/retx_cfg \n"); - printk("\t: set service_header, service_mask\n\n"); - } - else if ( stricmp(tokens[0], "set") == 0 && token_num >= 3 ) { - - if ( stricmp(tokens[1], "retx") == 0 ) { - if ( stricmp(tokens[2], "enable") == 0 || - stricmp(tokens[2], "on") == 0 || - stricmp(tokens[2], "1") == 0 ) - RETX_MODE_CFG->retx_en = 1; - else if ( stricmp(tokens[2], "disable") == 0 || - stricmp(tokens[2], "off") == 0 || - stricmp(tokens[2], "0") == 0 ) - RETX_MODE_CFG->retx_en = 0; - printk("RETX_MODE_CFG->retx_en - %d\n", RETX_MODE_CFG->retx_en); - } - else { - unsigned int dec_val, hex_val; - - p1 = tokens[2]; - dec_val = (unsigned int)get_number(&p1, NULL, 0); - p2 = tokens[2]; - hex_val = (unsigned int)get_number(&p2, NULL, 1); - - if ( *p2 == 0 ) { - if ( stricmp(tokens[1], "service_header") == 0 ) { - *RETX_SERVICE_HEADER_CFG = hex_val; - printk("RETX_SERVICE_HEADER_CFG - 0x%08x\n", *RETX_SERVICE_HEADER_CFG); - } - else if ( stricmp(tokens[1], "service_mask") == 0 ) { - *RETX_MASK_HEADER_CFG = hex_val; - printk("RETX_MASK_HEADER_CFG - 0x%08x\n", *RETX_MASK_HEADER_CFG); - } - } - if ( *p1 == 0 ) { - if ( stricmp(tokens[1], "td_max") == 0 ) { - (unsigned int)RETX_TD_CFG->td_max = (dec_val >= 0xff ? 0Xff : dec_val); - printk("RETX_TD_CFG->td_max - %d\n", RETX_TD_CFG->td_max); - } - else if ( stricmp(tokens[1], "td_min") == 0 ) { - (unsigned int)RETX_TD_CFG->td_min = (dec_val >= 0xff ? 0Xff : dec_val); - printk("RETX_TD_CFG->td_min - %d\n", RETX_TD_CFG->td_min); - } - else if ( stricmp(tokens[1], "fw_alpha") == 0 ) { - RETX_TSYNC_CFG->fw_alpha = dec_val >= 0x7FFE ? 0X7EEE : dec_val; - printk("RETX_TSYNC_CFG->fw_alpha - %d\n", RETX_TSYNC_CFG->fw_alpha); - } - else if ( stricmp(tokens[1], "sync_inp") == 0 ) { - RETX_TSYNC_CFG->sync_inp = dec_val >= 0x7FFE ? 0X7EEE : dec_val; - printk("RETX_TSYNC_CFG->sync_inp - %d\n", RETX_TSYNC_CFG->sync_inp); - } - else if ( stricmp(tokens[1], "invld_range") == 0 ) { - RETX_MODE_CFG->invld_range = dec_val >= 250 ? 250 : dec_val; - printk("RETX_MODE_CFG->invld_range - %d\n", RETX_MODE_CFG->invld_range); - } - else if ( stricmp(tokens[1], "buff_size") == 0 ) { - dec_val = (dec_val + 31) / 32; - RETX_MODE_CFG->buff_size = dec_val >= 4096 / 32 ? 4096 / 32 : dec_val; - printk("RETX_MODE_CFG->buff_size - %d\n", RETX_MODE_CFG->buff_size); - } - } - } - - } - } - - return count; -} - -static int proc_read_retx_dsl_param(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - int len = 0; - - len += sprintf(page + off + len, "DSL Param [timestamp %ld.%ld]:\n", g_retx_polling_start.tv_sec, g_retx_polling_start.tv_usec); - - if ( g_xdata_addr == NULL ) - len += sprintf(page + off + len, " DSL parameters not available !\n"); - else { - volatile struct dsl_param *p_dsl_param = (volatile struct dsl_param *)g_xdata_addr; - - len += sprintf(page + off + len, " update_flag = %u\n", p_dsl_param->update_flag); - len += sprintf(page + off + len, " MinDelayrt = %u\n", p_dsl_param->MinDelayrt); - len += sprintf(page + off + len, " MaxDelayrt = %u\n", p_dsl_param->MaxDelayrt); - len += sprintf(page + off + len, " RetxEnable = %u\n", p_dsl_param->RetxEnable); - len += sprintf(page + off + len, " ServiceSpecificReTx = %u\n", p_dsl_param->ServiceSpecificReTx); - len += sprintf(page + off + len, " ReTxPVC = 0x%08x\n", p_dsl_param->ReTxPVC); - len += sprintf(page + off + len, " RxDtuCorruptedCNT = %u\n", p_dsl_param->RxDtuCorruptedCNT); - len += sprintf(page + off + len, " RxRetxDtuUnCorrectedCNT = %u\n", p_dsl_param->RxRetxDtuUnCorrectedCNT); - len += sprintf(page + off + len, " RxLastEFB = %u\n", p_dsl_param->RxLastEFB); - len += sprintf(page + off + len, " RxDtuCorrectedCNT = %u\n", p_dsl_param->RxDtuCorrectedCNT); - } - if ( g_retx_polling_end.tv_sec != 0 || g_retx_polling_end.tv_usec != 0 ) { - unsigned long polling_time_usec; - - polling_time_usec = (g_retx_polling_end.tv_sec - g_retx_polling_start.tv_sec) * 1000000 + (g_retx_polling_end.tv_usec - g_retx_polling_start.tv_usec); - len += sprintf(page + off + len, "DSL Param Update Time: %lu.%03lums\n", polling_time_usec / 1000, polling_time_usec % 1000); - } - - return len; -} - - #endif - -#endif - -static int stricmp(const char *p1, const char *p2) -{ - int c1, c2; - - while ( *p1 && *p2 ) { - c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1; - c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2; - if ( (c1 -= c2) ) - return c1; - p1++; - p2++; - } - - return *p1 - *p2; -} - -#if defined(ENABLE_DBG_PROC) && ENABLE_DBG_PROC - -static int strincmp(const char *p1, const char *p2, int n) -{ - int c1 = 0, c2; - - while ( n && *p1 && *p2 ) { - c1 = *p1 >= 'A' && *p1 <= 'Z' ? *p1 + 'a' - 'A' : *p1; - c2 = *p2 >= 'A' && *p2 <= 'Z' ? *p2 + 'a' - 'A' : *p2; - if ( (c1 -= c2) ) - return c1; - p1++; - p2++; - n--; - } - - return n ? *p1 - *p2 : c1; -} - -static int get_token(char **p1, char **p2, int *len, int *colon) -{ - int tlen = 0; - - while ( *len && !((**p1 >= 'A' && **p1 <= 'Z') || (**p1 >= 'a' && **p1<= 'z') || (**p1 >= '0' && **p1<= '9')) ) - { - (*p1)++; - (*len)--; - } - if ( !*len ) - return 0; - - if ( *colon ) - { - *colon = 0; - *p2 = *p1; - while ( *len && **p2 > ' ' && **p2 != ',' ) - { - if ( **p2 == ':' ) - { - *colon = 1; - break; - } - (*p2)++; - (*len)--; - tlen++; - } - **p2 = 0; - } - else - { - *p2 = *p1; - while ( *len && **p2 > ' ' && **p2 != ',' ) - { - (*p2)++; - (*len)--; - tlen++; - } - **p2 = 0; - } - - return tlen; -} - -static unsigned int get_number(char **p, int *len, int is_hex) -{ - unsigned int ret = 0; - unsigned int n = 0; - - if ( (*p)[0] == '0' && (*p)[1] == 'x' ) - { - is_hex = 1; - (*p) += 2; - if ( len ) - (*len) -= 2; - } - - if ( is_hex ) - { - while ( (!len || *len) && ((**p >= '0' && **p <= '9') || (**p >= 'a' && **p <= 'f') || (**p >= 'A' && **p <= 'F')) ) - { - if ( **p >= '0' && **p <= '9' ) - n = **p - '0'; - else if ( **p >= 'a' && **p <= 'f' ) - n = **p - 'a' + 10; - else if ( **p >= 'A' && **p <= 'F' ) - n = **p - 'A' + 10; - ret = (ret << 4) | n; - (*p)++; - if ( len ) - (*len)--; - } - } - else - { - while ( (!len || *len) && **p >= '0' && **p <= '9' ) - { - n = **p - '0'; - ret = ret * 10 + n; - (*p)++; - if ( len ) - (*len)--; - } - } - - return ret; -} - -static void ignore_space(char **p, int *len) -{ - while ( *len && (**p <= ' ' || **p == ':' || **p == '.' || **p == ',') ) - { - (*p)++; - (*len)--; - } -} - -#endif - -static INLINE int ifx_atm_version(char *buf) -{ - int len = 0; - unsigned int major, minor; - - ifx_atm_get_fw_ver(&major, &minor); - - len += sprintf(buf + len, " ATM (A1) firmware version %d.%d.%d\n", IFX_ATM_VER_MAJOR, IFX_ATM_VER_MID,IFX_ATM_VER_MINOR); - - return len; -} - -static INLINE void check_parameters(void) -{ - /* Please refer to Amazon spec 15.4 for setting these values. */ - if ( qsb_tau < 1 ) - qsb_tau = 1; - if ( qsb_tstep < 1 ) - qsb_tstep = 1; - else if ( qsb_tstep > 4 ) - qsb_tstep = 4; - else if ( qsb_tstep == 3 ) - qsb_tstep = 2; - - /* There is a delay between PPE write descriptor and descriptor is */ - /* really stored in memory. Host also has this delay when writing */ - /* descriptor. So PPE will use this value to determine if the write */ - /* operation makes effect. */ - if ( write_descriptor_delay < 0 ) - write_descriptor_delay = 0; - - if ( aal5_fill_pattern < 0 ) - aal5_fill_pattern = 0; - else - aal5_fill_pattern &= 0xFF; - - /* Because of the limitation of length field in descriptors, the packet */ - /* size could not be larger than 64K minus overhead size. */ - if ( aal5r_max_packet_size < 0 ) - aal5r_max_packet_size = 0; - else if ( aal5r_max_packet_size >= 65535 - MAX_RX_FRAME_EXTRA_BYTES ) - aal5r_max_packet_size = 65535 - MAX_RX_FRAME_EXTRA_BYTES; - if ( aal5r_min_packet_size < 0 ) - aal5r_min_packet_size = 0; - else if ( aal5r_min_packet_size > aal5r_max_packet_size ) - aal5r_min_packet_size = aal5r_max_packet_size; - if ( aal5s_max_packet_size < 0 ) - aal5s_max_packet_size = 0; - else if ( aal5s_max_packet_size >= 65535 - MAX_TX_FRAME_EXTRA_BYTES ) - aal5s_max_packet_size = 65535 - MAX_TX_FRAME_EXTRA_BYTES; - if ( aal5s_min_packet_size < 0 ) - aal5s_min_packet_size = 0; - else if ( aal5s_min_packet_size > aal5s_max_packet_size ) - aal5s_min_packet_size = aal5s_max_packet_size; - - if ( dma_rx_descriptor_length < 2 ) - dma_rx_descriptor_length = 2; - if ( dma_tx_descriptor_length < 2 ) - dma_tx_descriptor_length = 2; - if ( dma_rx_clp1_descriptor_threshold < 0 ) - dma_rx_clp1_descriptor_threshold = 0; - else if ( dma_rx_clp1_descriptor_threshold > dma_rx_descriptor_length ) - dma_rx_clp1_descriptor_threshold = dma_rx_descriptor_length; - - if ( dma_tx_descriptor_length < 2 ) - dma_tx_descriptor_length = 2; -} - -static INLINE int init_priv_data(void) -{ - void *p; - int i; - struct rx_descriptor rx_desc = {0}; - struct sk_buff *skb; - volatile struct tx_descriptor *p_tx_desc; - struct sk_buff **ppskb; - - // clear atm private data structure - memset(&g_atm_priv_data, 0, sizeof(g_atm_priv_data)); - - // allocate memory for RX (AAL) descriptors - p = kzalloc(dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, dma_rx_descriptor_length * sizeof(struct rx_descriptor) + DESC_ALIGNMENT); - g_atm_priv_data.aal_desc_base = p; - p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); - g_atm_priv_data.aal_desc = (volatile struct rx_descriptor *)p; - - // allocate memory for RX (OAM) descriptors - p = kzalloc(RX_DMA_CH_OAM_DESC_LEN * sizeof(struct rx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, RX_DMA_CH_OAM_DESC_LEN * sizeof(struct rx_descriptor) + DESC_ALIGNMENT); - g_atm_priv_data.oam_desc_base = p; - p = (void *)((((unsigned int)p + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); - g_atm_priv_data.oam_desc = (volatile struct rx_descriptor *)p; - - // allocate memory for RX (OAM) buffer - p = kzalloc(RX_DMA_CH_OAM_DESC_LEN * RX_DMA_CH_OAM_BUF_SIZE + DATA_BUFFER_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, RX_DMA_CH_OAM_DESC_LEN * RX_DMA_CH_OAM_BUF_SIZE + DATA_BUFFER_ALIGNMENT); - g_atm_priv_data.oam_buf_base = p; - p = (void *)(((unsigned int)p + DATA_BUFFER_ALIGNMENT - 1) & ~(DATA_BUFFER_ALIGNMENT - 1)); - g_atm_priv_data.oam_buf = p; - - // allocate memory for TX descriptors - p = kzalloc(MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct tx_descriptor) + DESC_ALIGNMENT); - g_atm_priv_data.tx_desc_base = p; - - // allocate memory for TX skb pointers - p = kzalloc(MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4, GFP_KERNEL); - if ( p == NULL ) - return IFX_ERROR; - dma_cache_wback_inv((unsigned long)p, MAX_PVC_NUMBER * dma_tx_descriptor_length * sizeof(struct sk_buff *) + 4); - g_atm_priv_data.tx_skb_base = p; - - // setup RX (AAL) descriptors - rx_desc.own = 1; - rx_desc.c = 0; - rx_desc.sop = 1; - rx_desc.eop = 1; - rx_desc.byteoff = 0; - rx_desc.id = 0; - rx_desc.err = 0; - rx_desc.datalen = RX_DMA_CH_AAL_BUF_SIZE; - for ( i = 0; i < dma_rx_descriptor_length; i++ ) { - skb = alloc_skb_rx(); - if ( skb == NULL ) - return IFX_ERROR; - rx_desc.dataptr = ((unsigned int)skb->data >> 2) & 0x0FFFFFFF; - g_atm_priv_data.aal_desc[i] = rx_desc; - } - - // setup RX (OAM) descriptors - p = (void *)((unsigned int)g_atm_priv_data.oam_buf | KSEG1); - rx_desc.own = 1; - rx_desc.c = 0; - rx_desc.sop = 1; - rx_desc.eop = 1; - rx_desc.byteoff = 0; - rx_desc.id = 0; - rx_desc.err = 0; - rx_desc.datalen = RX_DMA_CH_OAM_BUF_SIZE; - for ( i = 0; i < RX_DMA_CH_OAM_DESC_LEN; i++ ) { - rx_desc.dataptr = ((unsigned int)p >> 2) & 0x0FFFFFFF; - g_atm_priv_data.oam_desc[i] = rx_desc; - p = (void *)((unsigned int)p + RX_DMA_CH_OAM_BUF_SIZE); - } - - // setup TX descriptors and skb pointers - p_tx_desc = (volatile struct tx_descriptor *)((((unsigned int)g_atm_priv_data.tx_desc_base + DESC_ALIGNMENT - 1) & ~(DESC_ALIGNMENT - 1)) | KSEG1); - ppskb = (struct sk_buff **)(((unsigned int)g_atm_priv_data.tx_skb_base + 3) & ~3); - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) { - g_atm_priv_data.conn[i].tx_desc = &p_tx_desc[i * dma_tx_descriptor_length]; - g_atm_priv_data.conn[i].tx_skb = &ppskb[i * dma_tx_descriptor_length]; - } - - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) - g_atm_priv_data.port[i].tx_max_cell_rate = DEFAULT_TX_LINK_RATE; - - return IFX_SUCCESS; -} - -static INLINE void clear_priv_data(void) -{ - int i, j; - struct sk_buff *skb; - - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) { - if ( g_atm_priv_data.conn[i].tx_skb != NULL ) { - for ( j = 0; j < dma_tx_descriptor_length; j++ ) - if ( g_atm_priv_data.conn[i].tx_skb[j] != NULL ) - dev_kfree_skb_any(g_atm_priv_data.conn[i].tx_skb[j]); - } - } - - if ( g_atm_priv_data.tx_skb_base != NULL ) - kfree(g_atm_priv_data.tx_skb_base); - - if ( g_atm_priv_data.tx_desc_base != NULL ) - kfree(g_atm_priv_data.tx_desc_base); - - if ( g_atm_priv_data.oam_buf_base != NULL ) - kfree(g_atm_priv_data.oam_buf_base); - - if ( g_atm_priv_data.oam_desc_base != NULL ) - kfree(g_atm_priv_data.oam_desc_base); - - if ( g_atm_priv_data.aal_desc_base != NULL ) { - for ( i = 0; i < dma_rx_descriptor_length; i++ ) { - if ( g_atm_priv_data.aal_desc[i].sop || g_atm_priv_data.aal_desc[i].eop ) { // descriptor initialized - skb = get_skb_rx_pointer(g_atm_priv_data.aal_desc[i].dataptr); - dev_kfree_skb_any(skb); - } - } - kfree(g_atm_priv_data.aal_desc_base); - } -} - -static INLINE void init_rx_tables(void) -{ - int i; - struct wrx_queue_config wrx_queue_config = {0}; - struct wrx_dma_channel_config wrx_dma_channel_config = {0}; - struct htu_entry htu_entry = {0}; - struct htu_result htu_result = {0}; - struct htu_mask htu_mask = { set: 0x01, - clp: 0x01, - pid_mask: 0x00, - vpi_mask: 0x00, - vci_mask: 0x00, - pti_mask: 0x00, - clear: 0x00}; - - /* - * General Registers - */ - *CFG_WRX_HTUTS = MAX_PVC_NUMBER + OAM_HTU_ENTRY_NUMBER; -#ifndef CONFIG_AMAZON_SE - *CFG_WRX_QNUM = MAX_QUEUE_NUMBER; -#endif - *CFG_WRX_DCHNUM = RX_DMA_CH_TOTAL; - *WRX_DMACH_ON = (1 << RX_DMA_CH_TOTAL) - 1; - *WRX_HUNT_BITTH = DEFAULT_RX_HUNT_BITTH; - - /* - * WRX Queue Configuration Table - */ - wrx_queue_config.uumask = 0; - wrx_queue_config.cpimask = 0; - wrx_queue_config.uuexp = 0; - wrx_queue_config.cpiexp = 0; - wrx_queue_config.mfs = aal5r_max_packet_size; - wrx_queue_config.oversize = aal5r_max_packet_size; - wrx_queue_config.undersize = aal5r_min_packet_size; - wrx_queue_config.errdp = aal5r_drop_error_packet; - wrx_queue_config.dmach = RX_DMA_CH_AAL; - for ( i = 0; i < MAX_QUEUE_NUMBER; i++ ) - *WRX_QUEUE_CONFIG(i) = wrx_queue_config; - WRX_QUEUE_CONFIG(OAM_RX_QUEUE)->dmach = RX_DMA_CH_OAM; - - /* - * WRX DMA Channel Configuration Table - */ - wrx_dma_channel_config.chrl = 0; - wrx_dma_channel_config.clp1th = dma_rx_clp1_descriptor_threshold; - wrx_dma_channel_config.mode = 0; - wrx_dma_channel_config.rlcfg = 0; - - wrx_dma_channel_config.deslen = RX_DMA_CH_OAM_DESC_LEN; - wrx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.oam_desc >> 2) & 0x0FFFFFFF; - *WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_OAM) = wrx_dma_channel_config; - - wrx_dma_channel_config.deslen = dma_rx_descriptor_length; - wrx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.aal_desc >> 2) & 0x0FFFFFFF; - *WRX_DMA_CHANNEL_CONFIG(RX_DMA_CH_AAL) = wrx_dma_channel_config; - - /* - * HTU Tables - */ - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) - { - htu_result.qid = (unsigned int)i; - - *HTU_ENTRY(i + OAM_HTU_ENTRY_NUMBER) = htu_entry; - *HTU_MASK(i + OAM_HTU_ENTRY_NUMBER) = htu_mask; - *HTU_RESULT(i + OAM_HTU_ENTRY_NUMBER) = htu_result; - } - /* OAM HTU Entry */ - htu_entry.vci = 0x03; - htu_mask.pid_mask = 0x03; - htu_mask.vpi_mask = 0xFF; - htu_mask.vci_mask = 0x0000; - htu_mask.pti_mask = 0x07; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_F4_SEG_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_F4_SEG_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_F4_SEG_HTU_ENTRY) = htu_entry; - htu_entry.vci = 0x04; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_F4_TOT_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_F4_TOT_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_F4_TOT_HTU_ENTRY) = htu_entry; - htu_entry.vci = 0x00; - htu_entry.pti = 0x04; - htu_mask.vci_mask = 0xFFFF; - htu_mask.pti_mask = 0x01; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_F5_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_F5_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_F5_HTU_ENTRY) = htu_entry; -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - htu_entry.pid = 0x0; - htu_entry.vpi = 0x01; - htu_entry.vci = 0x0001; - htu_entry.pti = 0x00; - htu_mask.pid_mask = 0x0; - htu_mask.vpi_mask = 0x00; - htu_mask.vci_mask = 0x0000; - htu_mask.pti_mask = 0x3; - htu_result.cellid = OAM_RX_QUEUE; - htu_result.type = 1; - htu_result.ven = 1; - htu_result.qid = OAM_RX_QUEUE; - *HTU_RESULT(OAM_ARQ_HTU_ENTRY) = htu_result; - *HTU_MASK(OAM_ARQ_HTU_ENTRY) = htu_mask; - *HTU_ENTRY(OAM_ARQ_HTU_ENTRY) = htu_entry; -#endif -} - -static INLINE void init_tx_tables(void) -{ - int i; - struct wtx_queue_config wtx_queue_config = {0}; - struct wtx_dma_channel_config wtx_dma_channel_config = {0}; - struct wtx_port_config wtx_port_config = { res1: 0, - qid: 0, - qsben: 1}; - - /* - * General Registers - */ - *CFG_WTX_DCHNUM = MAX_TX_DMA_CHANNEL_NUMBER; - *WTX_DMACH_ON = ((1 << MAX_TX_DMA_CHANNEL_NUMBER) - 1) ^ ((1 << FIRST_QSB_QID) - 1); - *CFG_WRDES_DELAY = write_descriptor_delay; - - /* - * WTX Port Configuration Table - */ - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) - *WTX_PORT_CONFIG(i) = wtx_port_config; - - /* - * WTX Queue Configuration Table - */ - wtx_queue_config.qsben = 1; - wtx_queue_config.sbid = 0; - for ( i = 0; i < MAX_TX_DMA_CHANNEL_NUMBER; i++ ) { - wtx_queue_config.qsb_vcid = i; - *WTX_QUEUE_CONFIG(i) = wtx_queue_config; - } - - /* - * WTX DMA Channel Configuration Table - */ - wtx_dma_channel_config.mode = 0; - wtx_dma_channel_config.deslen = 0; - wtx_dma_channel_config.desba = 0; - for ( i = 0; i < FIRST_QSB_QID; i++ ) - *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config; - /* normal connection */ - wtx_dma_channel_config.deslen = dma_tx_descriptor_length; - for ( ; i < MAX_TX_DMA_CHANNEL_NUMBER ; i++ ) { - wtx_dma_channel_config.desba = ((unsigned int)g_atm_priv_data.conn[i - FIRST_QSB_QID].tx_desc >> 2) & 0x0FFFFFFF; - *WTX_DMA_CHANNEL_CONFIG(i) = wtx_dma_channel_config; - } -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -static int atm_showtime_enter(struct port_cell_info *port_cell, void *xdata_addr) -{ - int i, j; - - ASSERT(port_cell != NULL, "port_cell is NULL"); - ASSERT(xdata_addr != NULL, "xdata_addr is NULL"); - - for ( j = 0; j < ATM_PORT_NUMBER && j < port_cell->port_num; j++ ) - if ( port_cell->tx_link_rate[j] > 0 ) - break; - for ( i = 0; i < ATM_PORT_NUMBER && i < port_cell->port_num; i++ ) - g_atm_priv_data.port[i].tx_max_cell_rate = port_cell->tx_link_rate[i] > 0 ? port_cell->tx_link_rate[i] : port_cell->tx_link_rate[j]; - - qsb_global_set(); - - for ( i = 0; i < MAX_PVC_NUMBER; i++ ) - if ( g_atm_priv_data.conn[i].vcc != NULL ) - set_qsb(g_atm_priv_data.conn[i].vcc, &g_atm_priv_data.conn[i].vcc->qos, i); - - // TODO: ReTX set xdata_addr - g_xdata_addr = xdata_addr; - - g_showtime = 1; - -#if defined(CONFIG_VR9) - IFX_REG_W32(0x0F, UTP_CFG); -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - if ( !timer_pending(&g_retx_polling_timer) ) { - g_retx_polling_cnt = HZ; - g_retx_polling_timer.expires = jiffies + RETX_POLLING_INTERVAL; - add_timer(&g_retx_polling_timer); - } -#endif - - //printk("enter showtime, cell rate: 0 - %d, 1 - %d, xdata addr: 0x%08x\n", g_atm_priv_data.port[0].tx_max_cell_rate, g_atm_priv_data.port[1].tx_max_cell_rate, (unsigned int)g_xdata_addr); - - return IFX_SUCCESS; -} - -static int atm_showtime_exit(void) -{ - if ( !g_showtime ) - return IFX_ERROR; - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - RETX_MODE_CFG->retx_en = 0; // disable ReTX - del_timer(&g_retx_polling_timer); -#endif - -#if defined(CONFIG_VR9) - IFX_REG_W32(0x00, UTP_CFG); -#endif - - g_showtime = 0; - - // TODO: ReTX clean state - g_xdata_addr = NULL; - - printk("leave showtime\n"); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Init/Cleanup API - * #################################### - */ - -/* - * Description: - * Initialize global variables, PP32, comunication structures, register IRQ - * and register device. - * Input: - * none - * Output: - * 0 --- successful - * else --- failure, usually it is negative value of error code - */ -static int __devinit ifx_atm_init(void) -{ - int ret; - int port_num; - struct port_cell_info port_cell = {0}; - int i, j; - char ver_str[256]; - - check_parameters(); - - ret = init_priv_data(); - if ( ret != IFX_SUCCESS ) { - err("INIT_PRIV_DATA_FAIL"); - goto INIT_PRIV_DATA_FAIL; - } - - ifx_atm_init_chip(); - init_rx_tables(); - init_tx_tables(); - - /* create devices */ - for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) - g_atm_priv_data.port[port_num].dev = atm_dev_register("ifxmips_atm", &g_ifx_atm_ops, -1, NULL); -#else - g_atm_priv_data.port[port_num].dev = atm_dev_register("ifxmips_atm", NULL, &g_ifx_atm_ops, -1, NULL); -#endif - - if ( !g_atm_priv_data.port[port_num].dev ) { - err("failed to register atm device %d!", port_num); - ret = -EIO; - goto ATM_DEV_REGISTER_FAIL; - } - else { - g_atm_priv_data.port[port_num].dev->ci_range.vpi_bits = 8; - g_atm_priv_data.port[port_num].dev->ci_range.vci_bits = 16; - g_atm_priv_data.port[port_num].dev->link_rate = g_atm_priv_data.port[port_num].tx_max_cell_rate; - g_atm_priv_data.port[port_num].dev->dev_data = (void*)port_num; - } - } - - /* register interrupt handler */ - ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "atm_mailbox_isr", &g_atm_priv_data); - if ( ret ) { - if ( ret == -EBUSY ) { - err("IRQ may be occupied by other driver, please reconfig to disable it."); - } - else { - err("request_irq fail"); - } - goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL; - } - disable_irq(PPE_MAILBOX_IGU1_INT); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - init_atm_tc_retrans_param(); - - init_timer(&g_retx_polling_timer); - g_retx_polling_timer.function = retx_polling_func; -#endif - - ret = ifx_pp32_start(0); - if ( ret ) { - err("ifx_pp32_start fail!"); - goto PP32_START_FAIL; - } - - port_cell.port_num = ATM_PORT_NUMBER; - if( !IS_ERR(&ifx_mei_atm_showtime_check) && &ifx_mei_atm_showtime_check) - ifx_mei_atm_showtime_check(&g_showtime, &port_cell, &g_xdata_addr); - if ( g_showtime ) { - for ( i = 0; i < ATM_PORT_NUMBER; i++ ) - if ( port_cell.tx_link_rate[i] != 0 ) - break; - for ( j = 0; j < ATM_PORT_NUMBER; j++ ) - g_atm_priv_data.port[j].tx_max_cell_rate = port_cell.tx_link_rate[j] != 0 ? port_cell.tx_link_rate[j] : port_cell.tx_link_rate[i]; - } - - qsb_global_set(); - validate_oam_htu_entry(); - -#if 0 /*defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK*/ - ifx_led_trigger_register("dsl_data", &g_data_led_trigger); -#endif - - /* create proc file */ - proc_file_create(); - - if( !IS_ERR(&ifx_mei_atm_showtime_enter) && &ifx_mei_atm_showtime_enter ) - ifx_mei_atm_showtime_enter = atm_showtime_enter; - - if( !IS_ERR(&ifx_mei_atm_showtime_exit) && !ifx_mei_atm_showtime_exit ) - ifx_mei_atm_showtime_exit = atm_showtime_exit; - - ifx_atm_version(ver_str); - printk(KERN_INFO "%s", ver_str); - - printk("ifxmips_atm: ATM init succeed\n"); - - return IFX_SUCCESS; - -PP32_START_FAIL: - free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); -REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL: -ATM_DEV_REGISTER_FAIL: - while ( port_num-- > 0 ) - atm_dev_deregister(g_atm_priv_data.port[port_num].dev); -INIT_PRIV_DATA_FAIL: - clear_priv_data(); - printk("ifxmips_atm: ATM init failed\n"); - return ret; -} - -/* - * Description: - * Release memory, free IRQ, and deregister device. - * Input: - * none - * Output: - * none - */ -static void __exit ifx_atm_exit(void) -{ - int port_num; - - if( !IS_ERR(&ifx_mei_atm_showtime_enter) && &ifx_mei_atm_showtime_enter ) - ifx_mei_atm_showtime_enter = NULL; - if( !IS_ERR(&ifx_mei_atm_showtime_exit) && !ifx_mei_atm_showtime_exit ) - ifx_mei_atm_showtime_exit = NULL; - - proc_file_delete(); - -#if 0 /*defined(ENABLE_LED_FRAMEWORK) && ENABLE_LED_FRAMEWORK*/ - ifx_led_trigger_deregister(g_data_led_trigger); - g_data_led_trigger = NULL; -#endif - - invalidate_oam_htu_entry(); - - ifx_pp32_stop(0); - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - del_timer(&g_retx_polling_timer); - clear_atm_tc_retrans_param(); -#endif - - free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); - - for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) - atm_dev_deregister(g_atm_priv_data.port[port_num].dev); - - ifx_atm_uninit_chip(); - - clear_priv_data(); -} - -module_init(ifx_atm_init); -module_exit(ifx_atm_exit); -MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/system/ltq-dsl/src/ifxmips_atm_core.h b/package/system/ltq-dsl/src/ifxmips_atm_core.h deleted file mode 100644 index e566039552..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_core.h +++ /dev/null @@ -1,271 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_core.h -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver header file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 17 JUN 2009 Xu Liang Init Version -*******************************************************************************/ - -#ifndef IFXMIPS_ATM_CORE_H -#define IFXMIPS_ATM_CORE_H - - -#include "ifxmips_compat.h" -#include "ifx_atm.h" -#include "ifxmips_atm_ppe_common.h" -#include "ifxmips_atm_fw_regs_common.h" - - - -/* - * #################################### - * Definition - * #################################### - */ - -/* - * Compile Options - */ - -#define ENABLE_DEBUG 1 - -#define ENABLE_ASSERT 1 - -#define INLINE - -#define DEBUG_DUMP_SKB 1 - -#define DEBUG_QOS 1 - -#define DISABLE_QOS_WORKAROUND 0 - -#define ENABLE_DBG_PROC 1 - -#define ENABLE_FW_PROC 1 - -#ifdef CONFIG_IFX_ATM_TASKLET - #define ENABLE_TASKLET 1 -#endif - -#ifdef CONFIG_IFX_ATM_RETX - #define ENABLE_ATM_RETX 1 -#endif - -#if defined(CONFIG_DSL_MEI_CPE_DRV) && !defined(CONFIG_IFXMIPS_DSL_CPE_MEI) - #define CONFIG_IFXMIPS_DSL_CPE_MEI 1 -#endif - -/* - * Debug/Assert/Error Message - */ - -#define DBG_ENABLE_MASK_ERR (1 << 0) -#define DBG_ENABLE_MASK_DEBUG_PRINT (1 << 1) -#define DBG_ENABLE_MASK_ASSERT (1 << 2) -#define DBG_ENABLE_MASK_DUMP_SKB_RX (1 << 8) -#define DBG_ENABLE_MASK_DUMP_SKB_TX (1 << 9) -#define DBG_ENABLE_MASK_DUMP_QOS (1 << 10) -#define DBG_ENABLE_MASK_DUMP_INIT (1 << 11) -#define DBG_ENABLE_MASK_MAC_SWAP (1 << 12) -#define DBG_ENABLE_MASK_ALL (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT | DBG_ENABLE_MASK_MAC_SWAP) - -#define err(format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ERR) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 ) - -#if defined(ENABLE_DEBUG) && ENABLE_DEBUG - #undef dbg - #define dbg(format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_DEBUG_PRINT) ) printk(KERN_WARNING __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 ) -#else - #if !defined(dbg) - #define dbg(format, arg...) - #endif -#endif - -#if defined(ENABLE_ASSERT) && ENABLE_ASSERT - #define ASSERT(cond, format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 ) -#else - #define ASSERT(cond, format, arg...) -#endif - - -/* - * Constants - */ -#define DEFAULT_TX_LINK_RATE 3200 // in cells - -/* - * ATM Port, QSB Queue, DMA RX/TX Channel Parameters - */ -#define ATM_PORT_NUMBER 2 -#define MAX_QUEUE_NUMBER 16 -#define OAM_RX_QUEUE 15 -#define QSB_RESERVE_TX_QUEUE 0 -#define FIRST_QSB_QID 1 -#define MAX_PVC_NUMBER (MAX_QUEUE_NUMBER - FIRST_QSB_QID) -#define MAX_RX_DMA_CHANNEL_NUMBER 8 -#define MAX_TX_DMA_CHANNEL_NUMBER 16 -#define DATA_BUFFER_ALIGNMENT EMA_ALIGNMENT -#define DESC_ALIGNMENT 8 -#define DEFAULT_RX_HUNT_BITTH 4 - -/* - * RX DMA Channel Allocation - */ -#define RX_DMA_CH_OAM 0 -#define RX_DMA_CH_AAL 1 -#define RX_DMA_CH_TOTAL 2 -#define RX_DMA_CH_OAM_DESC_LEN 32 -#define RX_DMA_CH_OAM_BUF_SIZE (CELL_SIZE & ~15) -#define RX_DMA_CH_AAL_BUF_SIZE (2048 - 48) - -/* - * OAM Constants - */ -#define OAM_HTU_ENTRY_NUMBER 3 -#define OAM_F4_SEG_HTU_ENTRY 0 -#define OAM_F4_TOT_HTU_ENTRY 1 -#define OAM_F5_HTU_ENTRY 2 -#define OAM_F4_CELL_ID 0 -#define OAM_F5_CELL_ID 15 -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #undef OAM_HTU_ENTRY_NUMBER - #define OAM_HTU_ENTRY_NUMBER 4 - #define OAM_ARQ_HTU_ENTRY 3 -#endif - -/* - * RX Frame Definitions - */ -#define MAX_RX_PACKET_ALIGN_BYTES 3 -#define MAX_RX_PACKET_PADDING_BYTES 3 -#define RX_INBAND_TRAILER_LENGTH 8 -#define MAX_RX_FRAME_EXTRA_BYTES (RX_INBAND_TRAILER_LENGTH + MAX_RX_PACKET_ALIGN_BYTES + MAX_RX_PACKET_PADDING_BYTES) - -/* - * TX Frame Definitions - */ -#define MAX_TX_HEADER_ALIGN_BYTES 12 -#define MAX_TX_PACKET_ALIGN_BYTES 3 -#define MAX_TX_PACKET_PADDING_BYTES 3 -#define TX_INBAND_HEADER_LENGTH 8 -#define MAX_TX_FRAME_EXTRA_BYTES (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES) - -/* - * Cell Constant - */ -#define CELL_SIZE ATM_AAL0_SDU - -/* - * ReTX Constant - */ -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #define RETX_PLAYOUT_BUFFER_ORDER 6 - #define RETX_PLAYOUT_BUFFER_SIZE (PAGE_SIZE * (1 << RETX_PLAYOUT_BUFFER_ORDER)) - #define RETX_PLAYOUT_FW_BUFF_SIZE (RETX_PLAYOUT_BUFFER_SIZE / (32 * 56 /* cell size */)) - #define RETX_POLLING_INTERVAL (HZ / 100 > 0 ? HZ / 100 : 1) -#endif - - - -/* - * #################################### - * Data Type - * #################################### - */ - -typedef struct { - unsigned int h; - unsigned int l; -} ppe_u64_t; - -struct port { - unsigned int tx_max_cell_rate; - unsigned int tx_current_cell_rate; - - struct atm_dev *dev; -}; - -struct connection { - struct atm_vcc *vcc; - - volatile struct tx_descriptor - *tx_desc; - unsigned int tx_desc_pos; - struct sk_buff **tx_skb; - - unsigned int aal5_vcc_crc_err; /* number of packets with CRC error */ - unsigned int aal5_vcc_oversize_sdu; /* number of packets with oversize error */ - - unsigned int port; -}; - -struct atm_priv_data { - unsigned long conn_table; - struct connection conn[MAX_PVC_NUMBER]; - - volatile struct rx_descriptor - *aal_desc; - unsigned int aal_desc_pos; - - volatile struct rx_descriptor - *oam_desc; - unsigned char *oam_buf; - unsigned int oam_desc_pos; - - struct port port[ATM_PORT_NUMBER]; - - unsigned int wrx_pdu; /* successfully received AAL5 packet */ - unsigned int wrx_drop_pdu; /* AAL5 packet dropped by driver on RX */ - unsigned int wtx_pdu; /* successfully tranmitted AAL5 packet */ - unsigned int wtx_err_pdu; /* error AAL5 packet */ - unsigned int wtx_drop_pdu; /* AAL5 packet dropped by driver on TX */ - - ppe_u64_t wrx_total_byte; - ppe_u64_t wtx_total_byte; - unsigned int prev_wrx_total_byte; - unsigned int prev_wtx_total_byte; - - void *aal_desc_base; - void *oam_desc_base; - void *oam_buf_base; - void *tx_desc_base; - void *tx_skb_base; -}; - - - -/* - * #################################### - * Declaration - * #################################### - */ - -extern unsigned int ifx_atm_dbg_enable; - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor); - -extern void ifx_atm_init_chip(void); -extern void ifx_atm_uninit_chip(void); - -extern int ifx_pp32_start(int pp32); -extern void ifx_pp32_stop(int pp32); - -extern void ifx_reset_ppe(void); - - - -#endif // IFXMIPS_ATM_CORE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_danube.c b/package/system/ltq-dsl/src/ifxmips_atm_danube.c deleted file mode 100644 index 64698b8792..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_danube.c +++ /dev/null @@ -1,326 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_danube.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <linux/clk.h> -#include <asm/delay.h> - -/* - * Chip Specific Head File - */ -#include <lantiq_soc.h> -#include "ifxmips_compat.h" -#include "ifxmips_atm_core.h" -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #include "ifxmips_atm_fw_danube_retx.h" -#else - #include "ifxmips_atm_fw_danube.h" -#endif - -/* - * #################################### - * Definition - * #################################### - */ - -/* - * EMA Settings - */ -#define EMA_CMD_BUF_LEN 0x0040 -#define EMA_CMD_BASE_ADDR (0x00001580 << 2) -#define EMA_DATA_BUF_LEN 0x0100 -#define EMA_DATA_BASE_ADDR (0x00001900 << 2) -#define EMA_WRITE_BURST 0x2 -#define EMA_READ_BURST 0x2 - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Hardware Init/Uninit Functions - */ -static inline void init_pmu(void); -static inline void uninit_pmu(void); -static inline void reset_ppe(void); -static inline void init_ema(void); -static inline void init_mailbox(void); -static inline void init_atm_tc(void); -static inline void clear_share_buffer(void); - - - -/* - * #################################### - * Local Variable - * #################################### - */ - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static inline void init_pmu(void) -{ - //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); -/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/ - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_enable(clk); -} - -static inline void uninit_pmu(void) -{ -/* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/ - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); - struct clk *clk = clk_get_sys("ltq_dsl", NULL); - clk_disable(clk); -} - -static inline void reset_ppe(void) -{ -#if 0 //def MODULE - unsigned int etop_cfg; - unsigned int etop_mdio_cfg; - unsigned int etop_ig_plen_ctrl; - unsigned int enet_mac_cfg; - - etop_cfg = *IFX_PP32_ETOP_CFG; - etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG; - etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL; - enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG; - - *IFX_PP32_ETOP_CFG &= ~0x03C0; - - // reset PPE - ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); - - *IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg; - *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl; - *IFX_PP32_ENET_MAC_CFG = enet_mac_cfg; - *IFX_PP32_ETOP_CFG = etop_cfg; -#endif -} - -static inline void init_ema(void) -{ - IFX_REG_W32((EMA_CMD_BUF_LEN << 16) | (EMA_CMD_BASE_ADDR >> 2), EMA_CMDCFG); - IFX_REG_W32((EMA_DATA_BUF_LEN << 16) | (EMA_DATA_BASE_ADDR >> 2), EMA_DATACFG); - IFX_REG_W32(0x000000FF, EMA_IER); - IFX_REG_W32(EMA_READ_BURST | (EMA_WRITE_BURST << 2), EMA_CFG); -} - -static inline void init_mailbox(void) -{ - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU1_IER); - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU3_IER); -} - -static inline void init_atm_tc(void) -{ - IFX_REG_W32(0x0000, DREG_AT_CTRL); - IFX_REG_W32(0x0000, DREG_AR_CTRL); - IFX_REG_W32(0x0, DREG_AT_IDLE0); - IFX_REG_W32(0x0, DREG_AT_IDLE1); - IFX_REG_W32(0x0, DREG_AR_IDLE0); - IFX_REG_W32(0x0, DREG_AR_IDLE1); - IFX_REG_W32(0x40, RFBI_CFG); - IFX_REG_W32(0x1600, SFSM_DBA0); - IFX_REG_W32(0x1718, SFSM_DBA1); - IFX_REG_W32(0x1830, SFSM_CBA0); - IFX_REG_W32(0x1844, SFSM_CBA1); - IFX_REG_W32(0x14014, SFSM_CFG0); - IFX_REG_W32(0x14014, SFSM_CFG1); - IFX_REG_W32(0x1858, FFSM_DBA0); - IFX_REG_W32(0x18AC, FFSM_DBA1); - IFX_REG_W32(0x10006, FFSM_CFG0); - IFX_REG_W32(0x10006, FFSM_CFG1); - IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC0); - IFX_REG_W32(0x00000001, FFSM_IDLE_HEAD_BC1); -} - -static inline void clear_share_buffer(void) -{ - volatile u32 *p = SB_RAM0_ADDR(0); - unsigned int i; - - for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ ) - IFX_REG_W32(0, p++); -} - -/* - * Description: - * Download PPE firmware binary code. - * Input: - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) -{ - volatile u32 *dest; - - if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 - || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; - - if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) - IFX_REG_W32(0x00, CDM_CFG); - else - IFX_REG_W32(0x04, CDM_CFG); - - /* copy code */ - dest = CDM_CODE_MEMORY(0, 0); - while ( code_dword_len-- > 0 ) - IFX_REG_W32(*code_src++, dest++); - - /* copy data */ - dest = CDM_DATA_MEMORY(0, 0); - while ( data_dword_len-- > 0 ) - IFX_REG_W32(*data_src++, dest++); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) -{ - ASSERT(major != NULL, "pointer is NULL"); - ASSERT(minor != NULL, "pointer is NULL"); - -#if (defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX) || defined(VER_IN_FIRMWARE) - *major = FW_VER_ID->major; - *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif -} - -void ifx_atm_init_chip(void) -{ - init_pmu(); - - reset_ppe(); - - init_ema(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); -} - -void ifx_atm_uninit_chip(void) -{ - uninit_pmu(); -} - -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) -{ - int ret; - - /* download firmware */ - ret = pp32_download_code(firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; - - /* run PP32 */ - IFX_REG_W32(DBG_CTRL_START_SET(1), PP32_DBG_CTRL); - - /* idle for a while to let PP32 init itself */ - udelay(10); - - return IFX_SUCCESS; -} - -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) -{ - /* halt PP32 */ - IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL); -} diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_amazon_se.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_amazon_se.h deleted file mode 100644 index 4daef9fd8c..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_amazon_se.h +++ /dev/null @@ -1,3335 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_AMAZON_SE_H -#define IFXMIPS_ATM_FW_AMAZON_SE_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_amazon_se.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 1 - - -static unsigned int firmware_binary_code[] = { -0x80000ac0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x8000ffe0, -0x00000000, -0x00000000, -0x00000000, -0xc1000002, -0xd90c00f8, -0xc2000002, -0xda0800f9, -0x80004d48, -0xc2000000, -0xda0800f9, -0x800043b8, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80004370, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80005550, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80004270, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc0400000, -0xc0004840, -0xc88400f8, -0x80004a08, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc0400002, -0xc0004840, -0xc88400f8, -0x80004988, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc3c00004, -0xdbc800f9, -0xc10c0002, -0xd90c00f8, -0x8000fee0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc10e0002, -0xd90c00f8, -0xc0004808, -0xc84000f8, -0x800049b8, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003ff0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003f70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003ef0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003e70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003df0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003d70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003cf0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003c70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003bf0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003b70, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x80003af0, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0x00000000, -0xc0000000, -0xc1260002, -0xd90c00f8, -0xc2801af0, -0xc201757c, -0xc2417dde, -0x00000000, -0x00000000, -0xce2800f8, -0x00000000, -0x5aa80002, -0x00000000, -0xce6800f8, -0x00000000, -0x80003a00, -0x00000000, -0x00000000, -0xc3e1fffe, -0x597dffee, -0x593dfe14, -0x90000ae1, -0x00000000, -0x00000000, -0x00000000, -0x90cc0a89, -0x00000000, -0x00000000, -0x00000000, -0xc3c00000, -0xdbc800f9, -0xc1400008, -0xc1900000, -0x71588000, -0x14100100, -0xc140000a, -0xc1900002, -0x71588000, -0x14100100, -0xc140000c, -0xc1900004, -0x71588000, -0x14100100, -0xc1400004, -0xc1900006, -0x71588000, -0x14100100, -0xc1400006, -0xc1900008, -0x71588000, -0x14100100, -0xc140000e, -0xc190000a, -0x71588000, -0x14100100, -0xc1400000, -0xc190000c, -0x71588000, -0x14100100, -0xc1400002, -0xc190000e, -0x71588000, -0x14100100, -0xc0400000, -0xc11c0000, -0xc000082c, -0xcd05ce00, -0xc11c0002, -0xc000082c, -0xcd05ce00, -0xc0400002, -0xc11c0000, -0xc000082c, -0xcd05ce00, -0xc11c0002, -0xc000082c, -0xcd05ce00, -0xc0000824, -0x00000000, -0xcbc000f9, -0xcb8000f9, -0xcb4000f9, -0xcb0000f8, -0xc0004878, -0x5bfc4000, -0xcfc000f9, -0x5bb84000, -0xcf8000f9, -0x5b744000, -0xcf4000f9, -0x5b304000, -0xcf0000f8, -0xc0000a10, -0x00000000, -0xcbc000f9, -0xcb8000f8, -0xc0004874, -0x5bfc4000, -0xcfc000f9, -0x5bb84000, -0xcf8000f8, -0xc30001fe, -0xc000140a, -0xcf0000f8, -0xc3000000, -0x7f018000, -0xc000042e, -0xcf0000f8, -0xc000040e, -0xcf0000f8, -0xc3c1fffe, -0xc000490e, -0xcfc00078, -0xc000492c, -0xcfc00078, -0xc0004924, -0xcfc00038, -0xc0004912, -0xcfc00038, -0xc0004966, -0xcfc00038, -0xc0004968, -0xcfc00078, -0xc000496a, -0xcfc00078, -0xc3c00000, -0xc2800020, -0xc3000000, -0x7f018000, -0x6ff88000, -0x6fd44000, -0x4395c000, -0x5bb84a00, -0x5838000a, -0xcf0000f8, -0x5bfc0002, -0xb7e8ffc8, -0x00000000, -0xc3c00000, -0xc2800010, -0x6ff86000, -0x47bdc000, -0x5bb84c80, -0xc3400000, -0x58380004, -0xcb420078, -0x00000000, -0x58380008, -0xcf400078, -0x5bfc0002, -0xb7e8ffb0, -0x00000000, -0xc3c00000, -0xc2800020, -0xc348001e, -0xc3000000, -0x7f018000, -0x6ff8a000, -0x6fd44000, -0x4795c000, -0x47bdc000, -0x5bb85e00, -0x58380008, -0xcf408418, -0x5838000a, -0xcf0000f8, -0x5bfc0002, -0xb7e8ffb0, -0x00000000, -0x00000000, -0x00000000, -0xc121ffee, -0x5911fe14, -0x14100000, -0x80000530, -0x00000000, -0x80002130, -0x00000000, -0x8000ffe0, -0xc0004958, -0xc84000f8, -0x00000000, -0xc3c00002, -0x787c2000, -0xcc4000f8, -0xc0004848, -0xcb8400f8, -0xc000495c, -0xcac400f8, -0xc0004844, -0xc88400f8, -0x47ad0000, -0x8400ff82, -0xc000487c, -0xc80400f8, -0x00000000, -0x00000000, -0x40080000, -0xca0000f8, -0xc0001624, -0xcb0400f8, -0xa63c007a, -0x00000000, -0x00000000, -0xa71eff22, -0x00000000, -0xc0000824, -0xca8400f8, -0x6ca08000, -0x6ca42000, -0x46250000, -0x42290000, -0xc35e0002, -0xc6340060, -0xc0001624, -0xcf440078, -0xc2000000, -0xc161fffe, -0x5955fffe, -0x14140000, -0x00000000, -0xc0004844, -0xc88400f8, -0xc000082c, -0xca040038, -0x00000000, -0x00000000, -0x58880002, -0xb6080018, -0x00000000, -0xc0800000, -0xc0004844, -0xcc840038, -0x5aec0002, -0xc000495c, -0xcec400f8, -0x5e6c0006, -0x84000060, -0xc0004848, -0xcb8400f8, -0xc0000838, -0xc2500002, -0xce450800, -0x5fb80002, -0xc0004848, -0xcf8400f8, -0x5eec0002, -0xc000495c, -0xcec400f8, -0x00000000, -0xc121ffee, -0x5911fe14, -0x14100000, -0x8000fd98, -0xc000495a, -0xc84000f8, -0x00000000, -0xc3c00002, -0x787c2000, -0xcc4000f8, -0xc0004960, -0xcac400f8, -0x00000000, -0x00000000, -0x5eec0000, -0x8400010a, -0x00000000, -0xb6fc0050, -0xc0001600, -0xca0400f8, -0x00000000, -0x00000000, -0xa61e00d2, -0x6fe90000, -0xc0000a28, -0xce850800, -0xc2c00000, -0xc2800004, -0xb6e800a0, -0xc0001604, -0xca8400f8, -0xc0004960, -0xcec400f8, -0xa69efcc2, -0x00000000, -0x6fe90000, -0xc0000a28, -0xce850800, -0xc2c00002, -0xc0001600, -0xca0400f8, -0x00000000, -0x00000000, -0xa61e002a, -0x6fe90000, -0xc0000a28, -0xce850800, -0xc2c00000, -0xc0001604, -0xca8400f8, -0xc0004960, -0xcec400f8, -0xa69efc2a, -0xc2400000, -0xc0000a14, -0xca440028, -0x00000000, -0x00000000, -0x466d2000, -0xa4400020, -0xc2800000, -0xdfeb0029, -0x80000010, -0xdfea0029, -0xb668fba2, -0x00000000, -0xc00048a0, -0xcb0400f8, -0xc0000a10, -0xca8400f8, -0x6f208000, -0x6f242000, -0x46250000, -0x42a10000, -0xc2400000, -0xc0000a14, -0xca440028, -0xc35e0002, -0xc6340060, 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-0x5838002e, -0xca800078, -0x58380006, -0xca020078, -0xc3400000, -0x5838002e, -0xcb420078, -0x5aa80002, -0x46a10000, -0x84000010, -0xc2800000, -0x5838002e, -0xc6900078, -0xcd000078, -0x5f740002, -0x5838002e, -0xc7501078, -0xcd021078, -0xc0004968, -0xca4000f8, -0xc2000002, -0x6a3d0000, -0x72612000, -0xce4000f8, -0xc000492a, -0xca8000f8, -0x5e740000, -0x84000040, -0xc0004910, -0xca0000f8, -0xc2c00002, -0x6afd6000, -0x7ec16000, -0x762d0000, -0xce0000f8, -0x6abd4010, -0xa68000f2, -0x00000000, -0xc0004910, -0xca0000f8, -0xc2c00002, -0x6afd6000, -0x7ec16000, -0x762d0000, -0xce0000f8, -0x58380032, -0xca0000f8, -0x58000002, -0xca4000f8, -0x5838000c, -0x00000000, -0xce0000f9, -0xce4000f8, -0xc000492a, -0xca0000f8, -0xc2c00002, -0x6afd6000, -0x722d0000, -0xce0000f8, -0xc000492c, -0xca0000f8, -0xc2c00002, -0x6afd6000, -0x722d0000, -0xce0000f8, -0x80000040, -0xc000492c, -0xca0000f8, -0xc2c00002, -0x6afd6000, -0x7ec16000, -0x762d0000, -0xce0000f8, -0xa4880120, -0xc2c00000, -0xc000140e, -0xcac20018, -0xc000490e, -0xca4000f8, -0xc2000002, -0x6a2d0000, -0x7e010000, -0x76612000, -0xce4000f8, -0xc000496a, -0xca4000f8, -0xc2000002, -0x6a2d0000, -0x72612000, -0xce4000f8, -0x6ef0a000, -0x6ed44000, -0x47158000, -0x472d8000, -0x5b305e00, -0x58300000, -0xca0000f8, -0x00000000, -0xc2400002, -0x76612000, -0x8400004a, -0xc24c0002, -0xc6e40018, -0xc624c400, -0x58300010, -0xca400500, -0x00000000, -0xc0001800, -0xce4000f8, -0xa4860070, -0xc2400000, -0xc000140e, -0xca418018, -0xc2020002, -0xc0004900, -0xce002100, -0xc0004908, -0xce4000f8, -0xc1000000, -0xd90000f9, -0xd8400078, -0xc1000004, -0xd90000f9, -0xc0001408, -0xcc8000f8, -0xc10e0002, -0xd90c00f8, -0x8000eda8, -0xdfbc00f9, -0xc000496e, -0x99006670, -0xc94000f8, -0xc7d800f8, -0x00000000, -0xc57000f8, -0x5ef00020, -0x88000148, -0x6f346000, -0x4771a000, -0x5b744c80, -0x58340008, -0xc2400000, -0xca400078, -0x00000000, -0xc2000000, -0x5a640002, -0xce400078, -0x58340004, -0xca000078, -0x00000000, -0x00000000, -0x5e200002, -0xce000078, -0xc0004912, -0xca8000f8, -0xc2400002, -0x6a712000, -0x72a54000, -0xce8000f8, -0x5e200000, -0x84000052, -0xc000480a, -0xca0000f8, -0xc0000408, -0xca8000f8, -0x76250000, -0x00000000, -0x72a14000, -0xce8000f8, -0x80000038, -0xc0004914, -0xca0000f8, -0x7e412000, -0x00000000, -0x76250000, -0xce0000f8, -0x800000d0, -0x6ef4a000, -0x6ed44000, -0x4755a000, -0x476da000, -0x5b745e00, -0x5834002e, -0xc2400000, -0xca420078, -0x00000000, -0xc2000000, -0x5a640002, -0xc6501078, -0xcd021078, -0x58340006, -0xca000078, -0x00000000, -0x00000000, -0x5a200002, -0xce000078, -0xc0004910, -0xca4000f8, -0xc2000002, -0x6a2d0000, -0x72612000, -0xce4000f8, -0xc2000002, -0x6a310000, -0xc000042a, -0xce0000f8, -0xc1040002, -0xd90c00f8, -0x00000000, -0x8000eb18, -0x00000000, -0xc4980928, -0x9d000000, -0xc5580028, -0xc0000838, -0xcd8400f8, -0xc1440200, -0xc1c01600, -0xc55c1070, -0xc000100e, -0x9d000000, -0xcd8000f8, -0xc000100c, -0xcdc000f8, -0xc0004862, -0xc9c000f8, -0x00000000, -0x00000000, -0xd9d800f9, -0xc0005600, -0x401c0000, -0x5dc05800, -0x88000012, -0x5c000200, -0xcd8000f8, -0xc1f0000a, -0x715ca000, -0xdd9800f8, -0xdd9c00f9, -0x41d8e000, -0xc5d40260, -0xc0001010, -0xcd4000f8, -0x6c9c8000, -0x45c8e000, -0x45c8e000, -0x59dc0004, -0xc1601260, -0xc5d40260, -0x9d000000, -0xc0001012, -0xcd4000f8, -0x00000000, -0x00000000, -0xd95800f8, -0x6d586000, -0x4594c000, -0x59984c80, -0xd99800f9, -0x5818000a, -0xc1800000, -0xc9800078, -0xc0005400, -0x6d5ca000, -0x401c0000, -0x40180000, -0xc94000f8, -0x58000002, -0x00000000, -0xc9c000f8, -0xc0004930, -0xcd4000f8, -0xc0004932, -0xcdc000f8, -0x59980004, -0xc1c20020, -0xb59c0018, -0x00000000, -0xc1800000, -0xdd9c00f9, -0x581c000a, -0xcd800078, -0x581c000c, -0xc1800000, -0xc9800020, -0xc1c00002, -0xdd9400f8, -0x69d4e000, -0x5d980002, -0xcd800020, -0xc0004924, -0xc98000f8, -0x00000000, -0x9d000000, -0x00000000, -0x719cc000, -0xcd8000f8, -0xc000492a, -0xc94000f8, -0xc1c00002, -0x69d8e000, -0x7dc0c000, -0x7558a000, -0xcd4000f8, -0xc000492c, -0xc94000f8, -0xdd8000f9, -0x58000032, -0x755ca000, -0x84000090, -0xc94000f9, -0xc98000f8, -0xdd8000f9, -0x5800000c, -0x00000000, -0xcd4000f9, -0xcd8000f8, -0xc000492c, -0xc94000f8, -0xc000492a, -0xc98000f8, -0x715ca000, -0xc000492c, -0xcd4000f8, -0x719cc000, -0xc000492a, -0xcd8000f8, -0x9d000000, -0x00000000, -0x00000000, -0x00000000, -0xc0004862, -0xc98000f8, -0x00000000, -0xc1c00200, -0x4194c000, -0x459ce000, -0x88000012, -0xc5d800f8, -0xc0004862, -0xcd8000f8, -0xc0001406, -0xc98000f8, -0xc1c00002, -0x9d000000, -0xc5d80a00, -0xc5581048, -0xcd8000f8, -0xc0004930, -0xc98000f8, -0xc0004932, -0xc9c000f8, -0xc140000e, -0xc5581c18, -0xdd9400f8, -0xc0005600, -0x40140000, -0x5d405800, -0x88000012, -0x5c000200, -0xcd8000f8, -0x58000002, -0x5d405800, -0x88000012, -0x5c000200, -0xcdc000f8, -0xdd5400f8, -0xc1c00000, -0x58140006, -0xc9c20078, -0xc1800000, -0x58140000, -0xc98000d8, -0x6ddc2000, -0xc000491e, -0x41d8e000, -0xcdc000f8, -0xdd9800f8, -0xc1c00022, -0xc5d80d70, -0xdd9400f9, -0xc5581c18, -0xc000491c, -0xcd8000f8, -0xdd5400f8, -0xc1c00000, -0x58140006, -0xc9c20078, -0xc1800000, -0x58140004, -0xc9820078, -0x00000000, -0x59dc0002, -0x45d8c000, -0x84000010, -0xc1c00000, -0x9d000000, -0x58140006, -0xc5d81078, -0xcd821078, -0xc0004860, -0xc94000f8, -0xc1800100, -0xc1d00002, -0x58146b00, -0xd58000f8, -0x58000002, -0xd58000f9, -0x59540004, -0xb5580018, -0xc0004860, -0xc1400000, -0xcd4000f8, -0xdd9800f9, -0x9d000000, -0xdd9400f8, -0xc0001404, -0xcdc10800, -0xc1c00000, -0xc1800200, -0x5d980004, -0xdf5d0048, -0x459ca000, -0x8800fff2, -0xdd8000f9, -0x5800000c, -0x00000000, -0xc94000f9, -0xc98000f8, -0xc1c00002, -0xc5d43f00, -0xc5d81e00, -0xc0004862, -0xc9c000f8, -0x00000000, -0x00000000, -0x581c5600, -0x5dc05800, -0x88000012, -0x5c000200, -0xcd4000f8, -0x58000002, -0x5dc05800, -0x88000012, -0x5c000200, -0xcd8000f8, -0xc0004862, -0xc9c000f8, -0x00000000, -0xc15004c0, -0xc5d40060, -0xdd9c00f8, -0xc5d41c18, -0xc1c00000, -0xdd8000f9, -0x58000030, -0xc9c00078, -0xdd8000f9, -0x58000002, -0xc98000f8, -0x6ddc2000, -0xc000491c, -0x41d8e000, -0xcd4000f9, -0xcdc000f8, -0xdd9400f9, -0xc1c00000, -0x58140030, -0xc9c00078, -0xc1800000, -0x58140006, -0xc9820078, -0x00000000, -0x59dc0002, -0x45d8c000, -0x84000010, -0xc1c00000, -0x9d000000, -0x58140030, -0xc5d80078, -0xcd800078, -0xc1c00000, -0xdf5c0038, -0x5ddc0080, -0x8400ffea, -0x00000000, -0x9d000000, -0x00000000, -0x00000000, -0x00000000, -0xc160fffe, -0xc0000a10, -0xc9440060, -0xc1a0fffe, -0x59981e08, -0xc000100c, -0xcd4000f8, -0xc000100e, -0xcd8000f8, -0xc0004964, -0xc98000f8, -0x00000000, -0xc170000a, -0x7158a000, -0x6c988000, -0x4588c000, -0x4588c000, -0x59980004, -0xc5940270, -0xc0001010, -0xcd4000f8, -0xc0004946, -0xc94000f8, -0x00000000, -0x00000000, -0x6d58a000, -0x6d5c4000, -0x459cc000, -0x4594c000, -0xc000494a, -0xc94000f8, -0xc0004948, -0xc9c000f8, -0x4194c000, -0xc1400012, -0xc55c1818, -0x9d000000, -0xc59c0268, -0xc0001012, -0xcdc000f8, -0xc1400000, -0x58000012, -0xc9410038, -0xc0004950, -0xc9c000f8, -0xc55800f8, -0xc5940838, -0xc5581078, -0xd99400f8, -0xc000493c, -0xc94000f8, -0xc0004954, -0xc98000f8, -0x59dc00a8, -0x45d4e000, -0x41d8e000, -0x5d5c0030, -0x88000010, -0xc1c00030, -0xc1800000, -0xc5d84028, -0xc1400000, -0xc5d40008, -0x5dd40002, -0x84000072, -0x5dd40004, -0x8400009a, -0x5dd40006, -0x840000c2, -0x5dd80026, -0x840000ea, -0xdd5400f8, -0xdd8000f9, -0x58000008, -0x40180000, -0xcd4000f8, -0x59980002, -0x8000ffc0, -0xdd5400f8, -0xdd8000f9, -0x58000008, -0x40180000, -0xcd4000b8, -0x59980002, -0x8000ff88, -0xdd5400f8, -0xdd8000f9, -0x58000008, -0x40180000, -0xcd400078, -0x59980002, -0x8000ff50, -0xdd5400f8, -0xdd8000f9, -0x58000008, -0x40180000, -0xcd400038, -0x59980002, -0x8000ff18, -0x00000000, -0x9d000000, -0x00000000, -0x00000000, -0x00000000, -0x58000012, -0xc94000f8, -0xc0004954, -0xc9c000f8, -0xc0004950, -0xc9400078, -0xdd8000f9, -0x58000028, -0x5d9c0000, -0x84000052, -0x5d9c0002, -0x84000052, -0x5d9c0004, -0x8400006a, -0xc55b0038, -0xc55c08b8, -0xcd800039, -0xcdc108b8, -0x80000060, -0xcd4000f8, -0x80000050, -0xc55900b8, -0xc55c1838, -0xcd8000b9, -0xcdc31838, -0x80000028, -0xc55a0078, -0xc55c1078, -0xcd800079, -0xcdc21078, -0x9d000000, -0x00000000, -0x00000000, -0x00000000, -0x59540002, -0x6994e018, -0x61c0c008, -0x4194a000, -0x5d940040, -0x88000012, -0xc59400f8, -0x9d000000, -0xcd4000f8, -0x00000000, -0x00000000, -0x9d000000, -0x4158a000, -0xcd4000f8, -0x00000000 -}; - -static unsigned int firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_AMAZON_SE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9.h deleted file mode 100644 index b22bcccca4..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9.h +++ /dev/null @@ -1,439 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_AR9_H -#define IFXMIPS_ATM_FW_AR9_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_ar9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 22 OCT 2007 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 22 OCT 2007 Xu Liang Initiate Version, v00.01 -*******************************************************************************/ - - -#define VER_IN_FIRMWARE 1 - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 16 - - -static unsigned int firmware_binary_code[] = { - 0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000, - 0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004980, 0xc2000000, 0xda0800f9, 0x80003fe8, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80003fa0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80005178, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80003ea0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xc0400000, 0xc0004840, 0xc88400f8, 0x80004640, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xc0400002, 0xc0004840, 0xc88400f8, 0x800045c0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 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0xcd05ce00, 0x99005590, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc1200000, - 0xc0000818, 0xcd061000, 0xc11c0002, 0xc000082c, 0xcd05ce00, 0xc2000000, 0xc000484c, 0xce0400f8, - 0x80000358, 0xc0001ac0, 0xcb8400f8, 0xc000487c, 0xc80400f8, 0x00000000, 0x00000000, 0x40080000, - 0xcbc000f8, 0xc42800f8, 0x00000000, 0x00000000, 0xc68000f8, 0xc13c0000, 0xcd03de00, 0xa780024a, - 0x00000000, 0x00000000, 0xa7c0020a, 0x00000000, 0xc0001b00, 0xc2060006, 0xce046308, 0xa7e801c2, - 0x00000000, 0xc0004850, 0xca0400f8, 0xc2400000, 0xc0001aec, 0xca448018, 0x5a200002, 0xc0004850, - 0xce0400f8, 0xb62400aa, 0x00000000, 0xc68000f8, 0xc13c0002, 0xcd03de00, 0xc0001acc, 0xc2000002, - 0xce040000, 0xc0004848, 0xc94400f8, 0xc1800000, 0xc000082c, 0xc9840028, 0x59540002, 0xc0004848, - 0xcd4400f8, 0x58880002, 0xb49801c8, 0x00000000, 0xc0800000, 0x800001b0, 0xc0004854, 0xc1000000, - 0xcd0400f8, 0xc11c0000, 0xc000082c, 0xcd05ce00, 0x99005590, 0xc0004848, 0xc94400f8, 0xc1800000, - 0xc2000000, 0xc0000820, 0xce0400f8, 0xc1200000, 0xc0000818, 0xcd061000, 0xc11c0002, 0xc000082c, - 0xcd05ce00, 0xc0004850, 0xce0400f8, 0xc2000002, 0xc0001acc, 0xce040008, 0x800000e8, 0xc2000002, - 0xc0004850, 0xce0400f8, 0x8000fe88, 0xc2000000, 0xc0004850, 0xce0400f8, 0xa7e60032, 0x00000000, - 0xc2000002, 0xc0001b00, 0xce040000, 0x8000fe70, 0x00000000, 0xa7860052, 0x00000000, 0xc68000f8, - 0xc13c0002, 0xcd03de00, 0xc2020002, 0xc7e2a540, 0xc0001b00, 0xce0400f8, 0x8000fe18, 0xc2040002, - 0xc0001b00, 0xce044200, 0x8000fdf8, 0xc2c80002, 0x6ac56000, 0xdacc00f8, 0xc0004854, 0xcb4400f8, - 0xc0004848, 0xcb8400f8, 0xc0000838, 0xc3c00000, 0xcbc40028, 0x5ef40004, 0x84000022, 0xc3000000, - 0xc0001acc, 0xcf042100, 0x47f98000, 0x8400002a, 0x47f98000, 0x88000030, 0xc1006e8c, 0x8000b6c8, - 0xc0004840, 0xcc8400f8, 0x8000f6b0, 0xc0001ac0, 0xcac400f8, 0xc0004854, 0xcb4400f8, 0xa6c0fbd2, - 0x00000000, 0x5ef40000, 0x8400f70a, 0x5ef40002, 0x8400f99a, 0x5ef40004, 0x8400fb9a, 0xc1006ce8, - 0x8000b640, 0x00000000, 0xc0800000, 0xdf4b0038, 0xc0004900, 0xcb8000f8, 0xc2000000, 0xc000490a, - 0xa78000d0, 0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002, 0xd90c00f8, 0x6ff46000, 0x477da000, - 0x5b744c80, 0xc2400000, 0x58340004, 0xca400078, 0xc0004900, 0xce000000, 0x5a640002, 0x58340004, - 0xc6500078, 0xcd000078, 0xc0004914, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, - 0xc0000408, 0xce0000f8, 0xa78200d8, 0xc0004908, 0xcbc000f8, 0xc1000000, 0xd90000f9, 0xc1000002, - 0xd90c00f8, 0x6ff4a000, 0x6fd44000, 0x4755a000, 0x477da000, 0x5b747000, 0xc2800000, 0x58340006, - 0xca800078, 0xc2000000, 0xc0004900, 0xce002100, 0x5ea80002, 0x58340006, 0xc6900078, 0xcd000078, - 0x5a7c0020, 0xc2000002, 0x6a250000, 0xc0000408, 0xce0000f8, 0xdca800f9, 0x5ea80000, 0x8400b4b0, - 0x00000000, 0xa4800230, 0x00000000, 0xc3c00000, 0xc000140e, 0xcbc00018, 0xc3400000, 0xc2400000, - 0x6ff86000, 0x47bdc000, 0x5bb84c80, 0x58380008, 0xcb400078, 0x58380006, 0xca400078, 0x5f740002, - 0x58380008, 0xc7500078, 0xcd000078, 0xc2000000, 0x58380004, 0xca020078, 0xc3000000, 0x5838000c, - 0xcb000020, 0x5a640002, 0x46610000, 0x84000010, 0xc2400000, 0x58380006, 0xc6500078, 0xcd000078, - 0xc2000000, 0x5838000a, 0xca020078, 0x5b300002, 0x5838000c, 0xc7100020, 0xcd000020, 0xc2420020, - 0x5a200004, 0x46252000, 0x84000010, 0xc2000000, 0x5838000a, 0xc6101078, 0xcd021078, 0xc0004966, - 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, 0xce4000f8, 0x5f740000, 0x84000040, 0xc0004912, - 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x5f300020, 0x84000040, - 0xc0004924, 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4820070, - 0xc2400000, 0xc000140e, 0xca408018, 0xc2000002, 0xc0004900, 0xce000000, 0xc000490a, 0xce4000f8, - 0xc1000000, 0xd90000f9, 0xd8400078, 0xc1000004, 0xd90000f9, 0xa4840270, 0x00000000, 0xc3c00000, - 0xc000140e, 0xcbc10018, 0xc2800000, 0xc2000000, 0x6ff8a000, 0x6fd44000, 0x4795c000, 0x47bdc000, - 0x5bb87000, 0x5838002e, 0xca800078, 0x58380006, 0xca020078, 0xc3400000, 0x5838002e, 0xcb420078, - 0x5aa80002, 0x46a10000, 0x84000010, 0xc2800000, 0x5838002e, 0xc6900078, 0xcd000078, 0x5f740002, - 0x5838002e, 0xc7501078, 0xcd021078, 0xc0004968, 0xca4000f8, 0xc2000002, 0x6a3d0000, 0x72612000, - 0xce4000f8, 0xc000492a, 0xca8000f8, 0x5e740000, 0x84000040, 0xc0004910, 0xca0000f8, 0xc2c00002, - 0x6afd6000, 0x7ec16000, 0x762d0000, 0xce0000f8, 0x6abd4010, 0xa68000ba, 0x00000000, 0x58380032, - 0xca0000f8, 0x58000002, 0xca4000f8, 0x5838000c, 0x00000000, 0xce0000f9, 0xce4000f8, 0xc000492a, - 0xca0000f8, 0xc2c00002, 0x6afd6000, 0x722d0000, 0xce0000f8, 0xc000492c, 0xca0000f8, 0xc2c00002, - 0x6afd6000, 0x722d0000, 0xce0000f8, 0x80000040, 0xc000492c, 0xca0000f8, 0xc2c00002, 0x6afd6000, - 0x7ec16000, 0x762d0000, 0xce0000f8, 0xa4880148, 0xc2c00000, 0xc000140e, 0xcac20018, 0xc000490e, - 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x7e010000, 0x76612000, 0xce4000f8, 0xc000496a, 0xca4000f8, - 0xc2000002, 0x6a2d0000, 0x72612000, 0xce4000f8, 0x6ef0a000, 0x6ed44000, 0x47158000, 0x472d8000, - 0x5b307000, 0x58300000, 0xca0000f8, 0x00000000, 0xc2400002, 0x76612000, 0x84000072, 0x58300000, - 0xca4000f8, 0xc2800000, 0x00000000, 0xc6684018, 0xc24c0002, 0xc6a40018, 0xc624c400, 0x58300010, - 0xca400500, 0x00000000, 0xc0001800, 0xce4000f8, 0xa4860070, 0xc2400000, 0xc000140e, 0xca418018, - 0xc2020002, 0xc0004900, 0xce002100, 0xc0004908, 0xce4000f8, 0xc1000000, 0xd90000f9, 0xd8400078, - 0xc1000004, 0xd90000f9, 0xc0001408, 0xcc8000f8, 0xc10e0002, 0xd90c00f8, 0x8000edb0, 0xdfbc00f9, - 0xc000496e, 0x99006298, 0xc94000f8, 0xc7d800f8, 0x00000000, 0xc57000f8, 0x5ef00020, 0x88000148, - 0x6f346000, 0x4771a000, 0x5b744c80, 0x58340008, 0xc2400000, 0xca400078, 0x00000000, 0xc2000000, - 0x5a640002, 0xce400078, 0x58340004, 0xca000078, 0x00000000, 0x00000000, 0x5e200002, 0xce000078, - 0xc0004912, 0xca8000f8, 0xc2400002, 0x6a712000, 0x72a54000, 0xce8000f8, 0x5e200000, 0x84000052, - 0xc000480a, 0xca0000f8, 0xc0000408, 0xca8000f8, 0x76250000, 0x00000000, 0x72a14000, 0xce8000f8, - 0x80000038, 0xc0004914, 0xca0000f8, 0x7e412000, 0x00000000, 0x76250000, 0xce0000f8, 0x800000d0, - 0x6ef4a000, 0x6ed44000, 0x4755a000, 0x476da000, 0x5b747000, 0x5834002e, 0xc2400000, 0xca420078, - 0x00000000, 0xc2000000, 0x5a640002, 0xc6501078, 0xcd021078, 0x58340006, 0xca000078, 0x00000000, - 0x00000000, 0x5a200002, 0xce000078, 0xc0004910, 0xca4000f8, 0xc2000002, 0x6a2d0000, 0x72612000, - 0xce4000f8, 0xc2000002, 0x6a310000, 0xc000042a, 0xce0000f8, 0xc1040002, 0xd90c00f8, 0x00000000, - 0x8000eb20, 0x00000000, 0xc4980928, 0x9d000000, 0xc5580028, 0xc0000838, 0xcd8400f8, 0xc1440200, - 0xc1c03800, 0xc55c1070, 0xc000100e, 0x9d000000, 0xcd8000f8, 0xc000100c, 0xcdc000f8, 0xc0004862, - 0xc9c000f8, 0x00000000, 0x00000000, 0xd9d800f9, 0xc0007800, 0x401c0000, 0x5dc07a00, 0x88000012, - 0x5c000200, 0xcd8000f8, 0xc1f0000a, 0x715ca000, 0xdd9800f8, 0xdd9c00f9, 0x41d8e000, 0xc5d40260, - 0xc0001010, 0xcd4000f8, 0x6c9c8000, 0x45c8e000, 0x45c8e000, 0x59dc0004, 0xc1601260, 0xc5d40260, - 0x9d000000, 0xc0001012, 0xcd4000f8, 0x00000000, 0x00000000, 0xd95800f8, 0x6d586000, 0x4594c000, - 0x59984c80, 0xd99800f9, 0x5818000a, 0xc1800000, 0xc9800078, 0xc0006e00, 0x6d5ca000, 0x401c0000, - 0x40180000, 0xc94000f8, 0x58000002, 0x00000000, 0xc9c000f8, 0xc0004930, 0xcd4000f8, 0xc0004932, - 0xcdc000f8, 0x59980004, 0xc1c20020, 0xb59c0018, 0x00000000, 0xc1800000, 0xdd9c00f9, 0x581c000a, - 0xcd800078, 0x581c000c, 0xc1800000, 0xc9800020, 0xc1c00002, 0xdd9400f8, 0x69d4e000, 0x5d980002, - 0xcd800020, 0xc0004924, 0xc98000f8, 0x00000000, 0x9d000000, 0x00000000, 0x719cc000, 0xcd8000f8, - 0xc000492a, 0xc94000f8, 0xc1c00002, 0x69d8e000, 0x7dc0c000, 0x7558a000, 0xcd4000f8, 0xc000492c, - 0xc94000f8, 0xdd8000f9, 0x58000032, 0x755ca000, 0x84000090, 0xc94000f9, 0xc98000f8, 0xdd8000f9, - 0x5800000c, 0x00000000, 0xcd4000f9, 0xcd8000f8, 0xc000492c, 0xc94000f8, 0xc000492a, 0xc98000f8, - 0x715ca000, 0xc000492c, 0xcd4000f8, 0x719cc000, 0xc000492a, 0xcd8000f8, 0x9d000000, 0x00000000, - 0x00000000, 0x00000000, 0xc0004862, 0xc98000f8, 0x00000000, 0xc1c00200, 0x4194c000, 0x459ce000, - 0x88000012, 0xc5d800f8, 0xc0004862, 0xcd8000f8, 0xc0001406, 0xc98000f8, 0xc1c00002, 0x9d000000, - 0xc5d80a00, 0xc5581048, 0xcd8000f8, 0xc0004930, 0xc98000f8, 0xc0004932, 0xc9c000f8, 0xc140000e, - 0xc5581c18, 0xdd9400f8, 0xc0007800, 0x40140000, 0x5d407a00, 0x88000012, 0x5c000200, 0xcd8000f8, - 0x58000002, 0x5d407a00, 0x88000012, 0x5c000200, 0xcdc000f8, 0xdd5400f8, 0xc1c00000, 0x58140006, - 0xc9c20078, 0xc1800000, 0x58140000, 0xc98000d8, 0x6ddc2000, 0xc000491e, 0x41d8e000, 0xcdc000f8, - 0xdd9800f8, 0xc1c00022, 0xc5d80d70, 0xdd9400f9, 0xc5581c18, 0xc000491c, 0xcd8000f8, 0xdd5400f8, - 0xc1c00000, 0x58140006, 0xc9c20078, 0xc1800000, 0x58140004, 0xc9820078, 0x00000000, 0x59dc0002, - 0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000, 0x58140006, 0xc5d81078, 0xcd821078, 0xc0004860, - 0xc94000f8, 0xc1820080, 0xc1d00002, 0x58147700, 0xd58000f8, 0x58000002, 0xd58000f9, 0x59540004, - 0xb5580018, 0xc0004860, 0xc1400000, 0xcd4000f8, 0xdd9800f9, 0x9d000000, 0xdd9400f8, 0xc0001404, - 0xcdc10800, 0xc1c00000, 0xc1800200, 0x5d980004, 0xdf5d0048, 0x459ca000, 0x8800fff2, 0xdd8000f9, - 0x5800000c, 0x00000000, 0xc94000f9, 0xc98000f8, 0xc1c00002, 0xc5d43f00, 0xc5d81e00, 0xc0004862, - 0xc9c000f8, 0x00000000, 0x00000000, 0x581c7800, 0x5dc07a00, 0x88000012, 0x5c000200, 0xcd4000f8, - 0x58000002, 0x5dc07a00, 0x88000012, 0x5c000200, 0xcd8000f8, 0xc0004862, 0xc9c000f8, 0x00000000, - 0xc15004c0, 0xc5d40060, 0xdd9c00f8, 0xc5d41c18, 0xc1c00000, 0xdd8000f9, 0x58000030, 0xc9c00078, - 0xdd8000f9, 0x58000002, 0xc98000f8, 0x6ddc2000, 0xc000491c, 0x41d8e000, 0xcd4000f9, 0xcdc000f8, - 0xdd9400f9, 0xc1c00000, 0x58140030, 0xc9c00078, 0xc1800000, 0x58140006, 0xc9820078, 0x00000000, - 0x59dc0002, 0x45d8c000, 0x84000010, 0xc1c00000, 0x9d000000, 0x58140030, 0xc5d80078, 0xcd800078, - 0xc1c00000, 0xdf5c0038, 0x5ddc0080, 0x8400ffea, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, - 0x00000000, 0xc160fffe, 0xc0000a10, 0xc9440060, 0xc1a0fffe, 0x59983008, 0xc000100c, 0xcd4000f8, - 0xc000100e, 0xcd8000f8, 0xc0004964, 0xc98000f8, 0x00000000, 0xc170000a, 0x7158a000, 0x6c988000, - 0x4588c000, 0x4588c000, 0x59980004, 0xc5940270, 0xc0001010, 0xcd4000f8, 0xc0004946, 0xc94000f8, - 0x00000000, 0x00000000, 0x6d58a000, 0x6d5c4000, 0x459cc000, 0x4594c000, 0xc000494a, 0xc94000f8, - 0xc0004948, 0xc9c000f8, 0x4194c000, 0xc1400012, 0xc55c1818, 0x9d000000, 0xc59c0268, 0xc0001012, - 0xcdc000f8, 0xc1400000, 0x58000012, 0xc9410038, 0xc0004950, 0xc9c000f8, 0xc55800f8, 0xc5940838, - 0xc5581078, 0xd99400f8, 0xc000493c, 0xc94000f8, 0xc0004954, 0xc98000f8, 0x59dc00a8, 0x45d4e000, - 0x41d8e000, 0x5d5c0030, 0x88000010, 0xc1c00030, 0xc1800000, 0xc5d84028, 0xc1400000, 0xc5d40008, - 0x5dd40002, 0x84000072, 0x5dd40004, 0x8400009a, 0x5dd40006, 0x840000c2, 0x5dd80026, 0x840000ea, - 0xdd5400f8, 0xdd8000f9, 0x58000008, 0x40180000, 0xcd4000f8, 0x59980002, 0x8000ffc0, 0xdd5400f8, - 0xdd8000f9, 0x58000008, 0x40180000, 0xcd4000b8, 0x59980002, 0x8000ff88, 0xdd5400f8, 0xdd8000f9, - 0x58000008, 0x40180000, 0xcd400078, 0x59980002, 0x8000ff50, 0xdd5400f8, 0xdd8000f9, 0x58000008, - 0x40180000, 0xcd400038, 0x59980002, 0x8000ff18, 0x00000000, 0x9d000000, 0x00000000, 0x00000000, - 0x00000000, 0x58000012, 0xc94000f8, 0xc0004954, 0xc9c000f8, 0xc0004950, 0xc9400078, 0xdd8000f9, - 0x58000028, 0x5d9c0000, 0x84000052, 0x5d9c0002, 0x84000052, 0x5d9c0004, 0x8400006a, 0xc55b0038, - 0xc55c08b8, 0xcd800039, 0xcdc108b8, 0x80000060, 0xcd4000f8, 0x80000050, 0xc55900b8, 0xc55c1838, - 0xcd8000b9, 0xcdc31838, 0x80000028, 0xc55a0078, 0xc55c1078, 0xcd800079, 0xcdc21078, 0x9d000000, - 0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6994e018, 0x61c0c008, 0x4194a000, 0x5d940040, - 0x88000012, 0xc59400f8, 0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000, 0x9d000000, 0x4158a000, - 0xcd4000f8, 0x00000000, -}; - -static unsigned int firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_AR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9_retx.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9_retx.h deleted file mode 100644 index 51e4f9c6c9..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_ar9_retx.h +++ /dev/null @@ -1,611 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_AR9_H -#define IFXMIPS_ATM_FW_AR9_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_ar9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 22 OCT 2007 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 22 OCT 2007 Xu Liang Initiate Version, v00.01 -*******************************************************************************/ - - -#define VER_IN_FIRMWARE 1 - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 15 - - -static unsigned int firmware_binary_code[] = { - 0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000, - 0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0xC0001B50, 0x8C100000, 0x00000000, 0x00000000, - 0x00000000, 0xC2000000, 0xDA0800F9, 0x80006030, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80006008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC1001DA6, 0x8D3C0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 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0xC0004900, 0xCE002100, - 0x5EA80002, 0x58340006, 0xC6900078, 0xCD000078, 0x5A7C0020, 0xC2000002, 0x6A250000, 0xC0000408, - 0xCE0000F8, 0xC0000032, 0xDCA800F9, 0xC1000002, 0x45294000, 0x00000000, 0x8C100006, 0x00000000, - 0x00000000, 0x00000000, 0xA4800230, 0x00000000, 0xC3C00000, 0xC000140E, 0xCBC00018, 0xC3400000, - 0xC2400000, 0x6FF86000, 0x47BDC000, 0x5BB84C80, 0x58380008, 0xCB400078, 0x58380006, 0xCA400078, - 0x5F740002, 0x58380008, 0xC7500078, 0xCD000078, 0xC2000000, 0x58380004, 0xCA020078, 0xC3000000, - 0x5838000C, 0xCB000020, 0x5A640002, 0x46610000, 0x84000010, 0xC2400000, 0x58380006, 0xC6500078, - 0xCD000078, 0xC2000000, 0x5838000A, 0xCA020078, 0x5B300002, 0x5838000C, 0xC7100020, 0xCD000020, - 0xC2420020, 0x5A200004, 0x46252000, 0x84000010, 0xC2000000, 0x5838000A, 0xC6101078, 0xCD021078, - 0xC0004966, 0xCA4000F8, 0xC2000002, 0x6A3D0000, 0x72612000, 0xCE4000F8, 0x5F740000, 0x84000040, - 0xC0004912, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x5F300020, - 0x84000040, 0xC0004924, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, - 0xA4820070, 0xC2400000, 0xC000140E, 0xCA408018, 0xC2000002, 0xC0004900, 0xCE000000, 0xC000490A, - 0xCE4000F8, 0xC1000000, 0xD90000F9, 0xD8400078, 0xC1000004, 0xD90000F9, 0xA48402A8, 0x00000000, - 0xC3C00000, 0xC000140E, 0xCBC10018, 0xC2800000, 0xC2000000, 0x6FF8A000, 0x6FD44000, 0x4795C000, - 0x47BDC000, 0x5BB87000, 0x5838002E, 0xCA800078, 0x58380006, 0xCA020078, 0xC3400000, 0x5838002E, - 0xCB420078, 0x5AA80002, 0x46A10000, 0x84000010, 0xC2800000, 0x5838002E, 0xC6900078, 0xCD000078, - 0x5F740002, 0x5838002E, 0xC7501078, 0xCD021078, 0xC0004968, 0xCA4000F8, 0xC2000002, 0x6A3D0000, - 0x72612000, 0xCE4000F8, 0xC000492A, 0xCA8000F8, 0x5E740000, 0x84000040, 0xC0004910, 0xCA0000F8, - 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x6ABD4010, 0xA68000F2, 0x00000000, - 0xC0004910, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x762D0000, 0xCE0000F8, 0x58380032, - 0xCA0000F8, 0x58000002, 0xCA4000F8, 0x5838000C, 0x00000000, 0xCE0000F9, 0xCE4000F8, 0xC000492A, - 0xCA0000F8, 0xC2C00002, 0x6AFD6000, 0x722D0000, 0xCE0000F8, 0xC000492C, 0xCA0000F8, 0xC2C00002, - 0x6AFD6000, 0x722D0000, 0xCE0000F8, 0x80000040, 0xC000492C, 0xCA0000F8, 0xC2C00002, 0x6AFD6000, - 0x7EC16000, 0x762D0000, 0xCE0000F8, 0xA4880120, 0xC2C00000, 0xC000140E, 0xCAC20018, 0xC000490E, - 0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76612000, 0xCE4000F8, 0xC000496A, 0xCA4000F8, - 0xC2000002, 0x6A2D0000, 0x72612000, 0xCE4000F8, 0x6EF0A000, 0x6ED44000, 0x47158000, 0x472D8000, - 0x5B307000, 0x58300000, 0xCA0000F8, 0x00000000, 0xC2400002, 0x76612000, 0x8400004A, 0xC24C0002, - 0xC6E40018, 0xC624C400, 0x58300010, 0xCA400500, 0x00000000, 0xC0001800, 0xCE4000F8, 0xA4860070, - 0xC2400000, 0xC000140E, 0xCA418018, 0xC2020002, 0xC0004900, 0xCE002100, 0xC0004908, 0xCE4000F8, - 0xC1000000, 0xD90000F9, 0xD8400078, 0xC1000004, 0xD90000F9, 0xA48C0048, 0xC2800002, 0xC000484A, - 0xCE8000F8, 0xC2800000, 0xC000474A, 0xCE8000F8, 0xC0004846, 0xCE8000F8, 0xC0001408, 0xCC8000F8, - 0xC10E0002, 0xD90C00F8, 0x8000EA78, 0xDFBC00F9, 0xC000496E, 0x99008638, 0xC94000F8, 0xC7D800F8, - 0x00000000, 0xC57000F8, 0x5EF00020, 0x88000148, 0x6F346000, 0x4771A000, 0x5B744C80, 0x58340008, - 0xC2400000, 0xCA400078, 0x00000000, 0xC2000000, 0x5A640002, 0xCE400078, 0x58340004, 0xCA000078, - 0x00000000, 0x00000000, 0x5E200002, 0xCE000078, 0xC0004912, 0xCA8000F8, 0xC2400002, 0x6A712000, - 0x72A54000, 0xCE8000F8, 0x5E200000, 0x84000052, 0xC000480A, 0xCA0000F8, 0xC0000408, 0xCA8000F8, - 0x76250000, 0x00000000, 0x72A14000, 0xCE8000F8, 0x80000038, 0xC0004914, 0xCA0000F8, 0x7E412000, - 0x00000000, 0x76250000, 0xCE0000F8, 0x800000D0, 0x6EF4A000, 0x6ED44000, 0x4755A000, 0x476DA000, - 0x5B747000, 0x5834002E, 0xC2400000, 0xCA420078, 0x00000000, 0xC2000000, 0x5A640002, 0xC6501078, - 0xCD021078, 0x58340006, 0xCA000078, 0x00000000, 0x00000000, 0x5A200002, 0xCE000078, 0xC0004910, - 0xCA4000F8, 0xC2000002, 0x6A2D0000, 0x72612000, 0xCE4000F8, 0xC2000002, 0x6A310000, 0xC000042A, - 0xCE0000F8, 0xC1040002, 0xD90C00F8, 0x00000000, 0x8000E7E8, 0x00000000, 0xC4980928, 0x9D000000, - 0xC5580028, 0xC0000838, 0xCD8400F8, 0xC1440200, 0xC1C03800, 0xC55C1070, 0xC000100E, 0x9D000000, - 0xCD8000F8, 0xC000100C, 0xCDC000F8, 0xC0004862, 0xC9C000F8, 0x00000000, 0x00000000, 0xD9D800F9, - 0xC0007800, 0x401C0000, 0x5DC07A00, 0x88000012, 0x5C000200, 0xCD8000F8, 0xC1F0000A, 0x715CA000, - 0xDD9800F8, 0xDD9C00F9, 0x41D8E000, 0xC5D40260, 0xC0001010, 0xCD4000F8, 0x6C9C8000, 0x45C8E000, - 0x45C8E000, 0x59DC0004, 0xC1601260, 0xC5D40260, 0x9D000000, 0xC0001012, 0xCD4000F8, 0x00000000, - 0x00000000, 0xD95800F8, 0x6D586000, 0x4594C000, 0x59984C80, 0xD99800F9, 0x5818000A, 0xC1800000, - 0xC9800078, 0xC0006E00, 0x6D5CA000, 0x401C0000, 0x40180000, 0xC94000F8, 0x58000002, 0x00000000, - 0xC9C000F8, 0xC0004930, 0xCD4000F8, 0xC0004932, 0xCDC000F8, 0x59980004, 0xC1C20020, 0xB59C0018, - 0x00000000, 0xC1800000, 0xDD9C00F9, 0x581C000A, 0xCD800078, 0x581C000C, 0xC1800000, 0xC9800020, - 0xC1C00002, 0xDD9400F8, 0x69D4E000, 0x5D980002, 0xCD800020, 0xC0004924, 0xC98000F8, 0x00000000, - 0x9D000000, 0x00000000, 0x719CC000, 0xCD8000F8, 0xC000492A, 0xC94000F8, 0xC1C00002, 0x69D8E000, - 0x7DC0C000, 0x7558A000, 0xCD4000F8, 0xC000492C, 0xC94000F8, 0xDD8000F9, 0x58000032, 0x755CA000, - 0x84000090, 0xC94000F9, 0xC98000F8, 0xDD8000F9, 0x5800000C, 0x00000000, 0xCD4000F9, 0xCD8000F8, - 0xC000492C, 0xC94000F8, 0xC000492A, 0xC98000F8, 0x715CA000, 0xC000492C, 0xCD4000F8, 0x719CC000, - 0xC000492A, 0xCD8000F8, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004862, 0xC98000F8, - 0x00000000, 0xC1C00200, 0x4194C000, 0x459CE000, 0x88000012, 0xC5D800F8, 0xC0004862, 0xCD8000F8, - 0xC0001406, 0xC98000F8, 0xC1C00002, 0x9D000000, 0xC5D80A00, 0xC5581048, 0xCD8000F8, 0xC0004930, - 0xC98000F8, 0xC0004932, 0xC9C000F8, 0xC140000E, 0xC5581C18, 0xDD9400F8, 0xC0007800, 0x40140000, - 0x5D407A00, 0x88000012, 0x5C000200, 0xCD8000F8, 0x58000002, 0x5D407A00, 0x88000012, 0x5C000200, - 0xCDC000F8, 0xDD5400F8, 0xC1C00000, 0x58140006, 0xC9C20078, 0xC1800000, 0x58140000, 0xC98000D8, - 0x6DDC2000, 0xC000491E, 0x41D8E000, 0xCDC000F8, 0xDD9800F8, 0xC1C00022, 0xC5D80D70, 0xDD9400F9, - 0xC5581C18, 0xC000491C, 0xCD8000F8, 0xDD5400F8, 0xC1C00000, 0x58140006, 0xC9C20078, 0xC1800000, - 0x58140004, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010, 0xC1C00000, 0x9D000000, - 0x58140006, 0xC5D81078, 0xCD821078, 0xC0004860, 0xC94000F8, 0xC1820080, 0xC1D00002, 0x58147700, - 0xD58000F8, 0x58000002, 0xD58000F9, 0x59540004, 0xB5580018, 0xC0004860, 0xC1400000, 0xCD4000F8, - 0xDD9800F9, 0x9D000000, 0xDD9400F8, 0xC0001404, 0xCDC10800, 0xC1C00000, 0xC1800200, 0x5D980004, - 0xDF5D0048, 0x459CA000, 0x8800FFF2, 0xDD8000F9, 0x5800000C, 0x00000000, 0xC94000F9, 0xC98000F8, - 0xC1C00002, 0xC5D43F00, 0xC5D81E00, 0xC0004862, 0xC9C000F8, 0x00000000, 0x00000000, 0x581C7800, - 0x5DC07A00, 0x88000012, 0x5C000200, 0xCD4000F8, 0x58000002, 0x5DC07A00, 0x88000012, 0x5C000200, - 0xCD8000F8, 0xC0004862, 0xC9C000F8, 0x00000000, 0xC15004C0, 0xC5D40060, 0xDD9C00F8, 0xC5D41C18, - 0xC1C00000, 0xDD8000F9, 0x58000030, 0xC9C00078, 0xDD8000F9, 0x58000002, 0xC98000F8, 0x6DDC2000, - 0xC000491C, 0x41D8E000, 0xCD4000F9, 0xCDC000F8, 0xDD9400F9, 0xC1C00000, 0x58140030, 0xC9C00078, - 0xC1800000, 0x58140006, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010, 0xC1C00000, - 0x9D000000, 0x58140030, 0xC5D80078, 0xCD800078, 0xC1C00000, 0xDF5C0038, 0x5DDC0080, 0x8400FFEA, - 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC160FFFE, 0xC0000A10, 0xC9440060, - 0xC1A0FFFE, 0x59983008, 0xC000100C, 0xCD4000F8, 0xC000100E, 0xCD8000F8, 0xC0004964, 0xC98000F8, - 0x00000000, 0xC170000A, 0x7158A000, 0x6C988000, 0x4588C000, 0x4588C000, 0x59980004, 0xC5940270, - 0xC0001010, 0xCD4000F8, 0xC0004946, 0xC94000F8, 0x00000000, 0x00000000, 0x6D58A000, 0x6D5C4000, - 0x459CC000, 0x4594C000, 0xC000494A, 0xC94000F8, 0xC0004948, 0xC9C000F8, 0x4194C000, 0xC1400012, - 0xC55C1818, 0x9D000000, 0xC59C0268, 0xC0001012, 0xCDC000F8, 0xC1400000, 0x58000012, 0xC9410038, - 0xC0004950, 0xC9C000F8, 0xC55800F8, 0xC5940838, 0xC5581078, 0xD99400F8, 0xC000493C, 0xC94000F8, - 0xC0004954, 0xC98000F8, 0x59DC00A8, 0x45D4E000, 0x41D8E000, 0x5D5C0030, 0x88000010, 0xC1C00030, - 0xC1800000, 0xC5D84028, 0xC1400000, 0xC5D40008, 0x5DD40002, 0x84000072, 0x5DD40004, 0x8400009A, - 0x5DD40006, 0x840000C2, 0x5DD80026, 0x840000EA, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, - 0xCD4000F8, 0x59980002, 0x8000FFC0, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD4000B8, - 0x59980002, 0x8000FF88, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400078, 0x59980002, - 0x8000FF50, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400038, 0x59980002, 0x8000FF18, - 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, 0xC94000F8, 0xC0004954, - 0xC9C000F8, 0xC0004950, 0xC9400078, 0xDD8000F9, 0x58000028, 0x5D9C0000, 0x84000052, 0x5D9C0002, - 0x84000052, 0x5D9C0004, 0x8400006A, 0xC55B0038, 0xC55C08B8, 0xCD800039, 0xCDC108B8, 0x80000060, - 0xCD4000F8, 0x80000050, 0xC55900B8, 0xC55C1838, 0xCD8000B9, 0xCDC31838, 0x80000028, 0xC55A0078, - 0xC55C1078, 0xCD800079, 0xCDC21078, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x59540002, - 0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, 0x88000012, 0xC59400F8, 0x9D000000, 0xCD4000F8, - 0x00000000, 0x00000000, 0x9D000000, 0x4158A000, 0xCD4000F8, 0x00000000, 0xCD8000F9, 0x45408000, - 0x8800FFF0, 0x00000000, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004810, 0xCA010038, - 0xC241FFFE, 0xC1400000, 0x46148000, 0x00000000, 0x9CC00006, 0xC0004200, 0x40180000, 0xC9C000F8, - 0x00000000, 0x00000000, 0x61C08010, 0x8400005A, 0xC2400002, 0x6A512000, 0x71E4E000, 0xCDC000F8, - 0xC0004748, 0xCD8000F8, 0x9CC00000, 0x6D98A000, 0x5998003E, 0x45912000, 0x59540002, 0x59980002, - 0x46188000, 0xC1000000, 0xC51800FE, 0x8000FF38, 0x00000000, 0x40180000, 0xC9C000F8, 0xC2000000, - 0xC5600020, 0xC1210000, 0x69208010, 0x7D008000, 0x75D0E000, 0xCDC000F8, 0x6D542000, 0x58144300, - 0xC1000000, 0xCD0000F9, 0x9CC00000, 0xC121FFFE, 0x5911FFFE, 0xCD0000F9, 0x79588000, 0x6D10A010, - 0x5D100000, 0x840000C0, 0x45948000, 0x880000B0, 0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700, - 0x40140000, 0xCA0000F8, 0x00000000, 0x00000000, 0x6A110000, 0x6A110010, 0x62008018, 0x84000032, - 0x00000000, 0x9CC00000, 0x6D54A000, 0x5954003E, 0x45512000, 0x59540002, 0x6D57A000, 0x6D57A010, - 0x6D54A000, 0x6D936000, 0x6D136010, 0xC1E10000, 0x69D0E010, 0x5DDC0002, 0x7DC0E000, 0x6D98A010, - 0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700, 0x40140000, 0xCA0000F8, 0x00000000, 0x00000000, - 0x6A110000, 0x6A110010, 0x45588000, 0x00000000, 0x761D0002, 0x62008018, 0x84000032, 0x00000000, - 0x9CC00000, 0x6D54A000, 0x5954003E, 0x45512000, 0x45588000, 0x00000000, 0x9CC00002, 0x59540002, - 0x6D57A000, 0x6D57A010, 0xC0004700, 0x40140000, 0xCA0000F8, 0x8000FF68, 0x00000000, 0x00000000, - 0x00000000, 0x58004700, 0xC98000F8, 0x9CC00000, 0x00000000, 0x6994C000, 0x6DA7E010, 0x58004700, - 0xC98000F8, 0xC1210000, 0x9CC00000, 0x69148010, 0x7190C000, 0xCD8000F8, 0xC1000000, 0xC0004810, - 0xC9020038, 0x00000000, 0x00000000, 0x45D0C000, 0x88000062, 0xC2400002, 0x45588000, 0xC1000000, - 0xC52400FC, 0x45D48000, 0xC1000000, 0xC52400FE, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, - 0x59980200, 0xC2400000, 0x455C8000, 0xC1000002, 0xC52400FC, 0x45948000, 0xC1000002, 0xC52400FE, - 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004740, 0xC9C000F8, 0x59180002, 0x6D130000, - 0x6D130010, 0x451C8000, 0xC2400000, 0x9CC00002, 0x00000000, 0x00000000, 0x459C8000, 0x88000062, - 0xC2400002, 0x455C8000, 0xC1000000, 0xC52400FC, 0x45948000, 0xC1000000, 0xC52400FC, 0x9CC00000, - 0x00000000, 0x00000000, 0x00000000, 0xC2400000, 0x45588000, 0xC1000002, 0xC52400FE, 0x45D48000, - 0xC1000002, 0xC52400FE, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6D570000, - 0x6D570010, 0x45588000, 0x6D402000, 0x9CC00002, 0x58004300, 0x58000000, 0xC13C0002, 0xCD03DE00, - 0x8000FFB0, 0x00000000, 0x00000000, 0x00000000, 0xC1020002, 0xD90C00F8, 0xC98000F8, 0x59540002, - 0xC0004730, 0xCD4000F8, 0x5D980002, 0x00000000, 0x80000036, 0x00000000, 0x9CC00000, 0xC0004732, - 0xCD8000F8, 0x00000000, 0xC0004734, 0xC9C000F8, 0xC1800000, 0xC0004816, 0xC9820078, 0xC0004738, - 0xCDC000F8, 0xC1C00000, 0xC0004734, 0x9CC00000, 0xCDC000F8, 0xC0004732, 0xCD8000F8, -}; - -static unsigned int firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_AR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_danube.h deleted file mode 100644 index fff0d31e5e..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube.h +++ /dev/null @@ -1,440 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_DANUBE_H -#define IFXMIPS_ATM_FW_DANUBE_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_danube.h -** PROJECT : Danube -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -*******************************************************************************/ - - -#define VER_IN_FIRMWARE 1 - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 17 - - -static unsigned int firmware_binary_code[] = { - 0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000, - 0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0x80004968, 0xC2000000, 0xDA080001, 0x80003FD0, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80003F88, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80005160, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80003E88, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC0400000, 0xC0004840, 0xC8840000, 0x80004628, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC0400002, 0xC0004840, 0xC8840000, 0x800045A8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC3C00004, 0xDBC80001, 0xC10C0002, 0xD90C0000, 0x8000FEC8, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC10E0002, 0xD90C0000, 0xC0004808, 0xC8400000, 0x800045D8, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x900004D9, 0x00000000, 0x00000000, 0x00000000, 0x90CC0481, - 0x00000000, 0x00000000, 0x00000000, 0xC3C00000, 0xDBC80001, 0xC1400008, 0xC1900000, 0x71948000, - 0x15000100, 0xC140000A, 0xC1900002, 0x71948000, 0x15000100, 0xC140000C, 0xC1900004, 0x71948000, - 0x15000100, 0xC1400004, 0xC1900006, 0x71948000, 0x15000100, 0xC1400006, 0xC1900008, 0x71948000, - 0x15000100, 0xC140000E, 0xC190000A, 0x71948000, 0x15000100, 0xC1400000, 0xC190000C, 0x71948000, - 0x15000100, 0xC1400002, 0xC190000E, 0x71948000, 0x15000100, 0xC0400000, 0xC11C0000, 0xC000082C, - 0xCD040E08, 0xC11C0002, 0xC000082C, 0xCD040E08, 0xC0400002, 0xC11C0000, 0xC000082C, 0xCD040E08, - 0xC11C0002, 0xC000082C, 0xCD040E08, 0xC0000824, 0x00000000, 0xCBC00001, 0xCB800001, 0xCB400001, - 0xCB000000, 0xC0004878, 0x5BFC4000, 0xCFC00001, 0x5BB84000, 0xCF800001, 0x5B744000, 0xCF400001, - 0x5B304000, 0xCF000000, 0xC0000A10, 0x00000000, 0xCBC00001, 0xCB800000, 0xC0004874, 0x5BFC4000, - 0xCFC00001, 0x5BB84000, 0xCF800000, 0xC30001FE, 0xC000140A, 0xCF000000, 0xC3000000, 0x7F018000, - 0xC000042E, 0xCF000000, 0xC000040E, 0xCF000000, 0xC3C1FFFE, 0xC000490E, 0xCFC00080, 0xC000492C, - 0xCFC00080, 0xC0004924, 0xCFC00040, 0xC0004912, 0xCFC00040, 0xC0004966, 0xCFC00040, 0xC0004968, - 0xCFC00080, 0xC000496A, 0xCFC00080, 0xC3C1FFFE, 0xC00049A0, 0xCFC00000, 0xC3C00000, 0xC2800020, - 0xC3000000, 0x7F018000, 0x6FF88000, 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x5838000A, 0xCF000000, - 0x5BFC0002, 0xB7E8FFA8, 0x00000000, 0xC3C00000, 0xC2800010, 0x6FF86000, 0x47F9C000, 0x5BB84C80, - 0xC3400000, 0x58380004, 0xCB420080, 0x00000000, 0x58380008, 0xCF400080, 0x5BFC0002, 0xB7E8FF90, - 0x00000000, 0xC3C00000, 0xC2800020, 0xC348001E, 0xC3000000, 0x7F018000, 0x6FF8A000, 0x6FD44000, - 0x4579C000, 0x47F9C000, 0x5BB84E20, 0x58380008, 0xCF400420, 0x5838000A, 0xCF000000, 0x5BFC0002, - 0xB7E8FF90, 0x00000000, 0x00000000, 0xC3E02242, 0x5BFC0022, 0xC0004002, 0xCFC00000, 0x00000000, - 0xC121FFFE, 0x5911FE14, 0x15000000, 0x80000518, 0x00000000, 0x80002118, 0x00000000, 0x8000FFC8, - 0xC0004958, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000, 0xCC400000, 0xC0004848, 0xCB840000, - 0xC000495C, 0xCAC40000, 0xC0004844, 0xC8840000, 0x46F90000, 0x8400FF6A, 0xC000487C, 0xC8040000, - 0x00000000, 0x00000000, 0x40080000, 0xCA000000, 0xC0001624, 0xCB040000, 0xA63C005A, 0x00000000, - 0x00000000, 0xA71EFF02, 0x00000000, 0xC0000824, 0xCA840000, 0x6CA08000, 0x6CA42000, 0x46610000, - 0x42290000, 0xC35E0002, 0xC6340068, 0xC0001624, 0xCF440080, 0xC2000000, 0xC161FFFE, 0x5955FFFE, - 0x15400000, 0x00000000, 0xC0004844, 0xC8840000, 0xC000082C, 0xCA040040, 0x00000000, 0x00000000, - 0x58880002, 0xB608FFF8, 0x00000000, 0xC0800000, 0xC0004844, 0xCC840040, 0x5AEC0002, 0xC000495C, - 0xCEC40000, 0x5E6C0006, 0x84000048, 0xC0004848, 0xCB840000, 0xC0000838, 0xC2500002, 0xCE440808, - 0x5FB80002, 0xC0004848, 0xCF840000, 0x5EEC0002, 0xC000495C, 0xCEC40000, 0x00000000, 0xC121FFFE, - 0x5911FE14, 0x15000000, 0x8000FD80, 0xC000495A, 0xC8400000, 0x00000000, 0xC3C00002, 0x7BC42000, - 0xCC400000, 0xC0004960, 0xCAC40000, 0x00000000, 0x00000000, 0x5EEC0000, 0x840000F2, 0x00000000, - 0xB6FC0030, 0xC0001600, 0xCA040000, 0x00000000, 0x00000000, 0xA61E00B2, 0x6FE90000, 0xC0000A28, - 0xCE840808, 0xC2C00000, 0xC2800004, 0xB6E80080, 0xC0001604, 0xCA840000, 0xC0004960, 0xCEC40000, - 0xA69EFCA2, 0x00000000, 0x6FE90000, 0xC0000A28, 0xCE840808, 0xC2C00002, 0xC0001600, 0xCA040000, - 0x00000000, 0x00000000, 0xA61E000A, 0x6FE90000, 0xC0000A28, 0xCE840808, 0xC2C00000, 0xC0001604, - 0xCA840000, 0xC0004960, 0xCEC40000, 0xA69EFC0A, 0xC2400000, 0xC0000A14, 0xCA440030, 0x00000000, - 0x00000000, 0x46E52000, 0xA4400000, 0xC2800000, 0xDFEB0031, 0x8000FFF8, 0xDFEA0031, 0xB668FB82, - 0x00000000, 0xC00048A0, 0xCB040000, 0xC0000A10, 0xCA840000, 0x6F208000, 0x6F242000, 0x46610000, - 0x42A10000, 0xC2400000, 0xC0000A14, 0xCA440030, 0xC35E0002, 0xC6340068, 0xC0001604, 0xCF440080, - 0x5B300002, 0xB670FFF8, 0x5AEC0002, 0xC3000000, 0xC00048A0, 0xCF040000, 0xC0004960, 0xCEC40000, - 0x8000FAC0, 0xC0004918, 0xD2800000, 0xC2000000, 0xDF600040, 0x5E600080, 0x8400025A, 0x00000000, - 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC000480A, 0xCA000000, 0xC0004912, 0xCA400000, - 0xC0004924, 0xCA800000, 0xC0004966, 0xCAC00000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, - 0x76610000, 0x76A10000, 0x76E10000, 0x840001B2, 0xC0004918, 0xCA400000, 0xC28001FE, 0x76A10000, - 0x5A640002, 0x6A254010, 0x5EE80000, 0x84000002, 0x6AA54000, 0x8000FFF8, 0xC6280000, 0x62818008, - 0xC0004918, 0xCF000000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0xC0004966, 0xCA400000, - 0xC2000002, 0x6A310000, 0x7E010000, 0x76252000, 0xCE400000, 0x00000000, 0xC121FFFE, 0x5911FE14, - 0x15000000, 0x6F346000, 0x4735A000, 0x5B744C80, 0xC2800000, 0x58340006, 0xCA800080, 0xC2C00000, - 0x58340000, 0xCAC000E0, 0xC2400000, 0x5834000A, 0xCA420080, 0x6EA82000, 0x42E9E000, 0x6F2CA000, - 0x42E56000, 0x5AEC1400, 0xC3990040, 0xC7381C20, 0xC6F80068, 0x99005B78, 0xDB980000, 0xDBD80001, - 0x00000000, 0xDEA00000, 0x47210000, 0x8400FD68, 0xC0004958, 0xC8400000, 0x00000000, 0xC3C00002, - 0x7BC42000, 0xCC400000, 0xC0004848, 0xCB840000, 0xC0004844, 0xC8840000, 0x5FB80000, 0x8400F7DA, - 0xC0001A1C, 0xCA000000, 0xC2400002, 0x6A452000, 0x76610000, 0x8400F7AA, 0xC000487C, 0xC8040000, - 0x00000000, 0x00000000, 0x40080000, 0xCA000000, 0xC4240000, 0x00000000, 0xA63C17BA, 0x00000000, - 0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000, 0xCA000000, 0xC4240000, - 0x00000000, 0xC0004934, 0xCE000000, 0xC2800002, 0xC4681C10, 0xC62821D8, 0xC2600010, 0x5A650040, - 0xC0004800, 0xCB400000, 0xC2200400, 0x5A200000, 0xC7601048, 0xC0001220, 0xCE800000, 0xC0001200, - 0xCE400000, 0xC0001202, 0xCE000000, 0xC0001240, 0xCB400000, 0x00000000, 0x00000000, 0xA754FFC0, - 0xC2000000, 0xC7600048, 0xA7520022, 0x00000000, 0x00000000, 0x990062F0, 0xC0004822, 0xC9400000, - 0xC1800002, 0x80001668, 0x58204080, 0xC2000000, 0xCA000020, 0xC2400000, 0xCA414008, 0xC2800000, - 0xCA812008, 0xC2C00000, 0xCAC20020, 0xC0004938, 0xCE000000, 0xC0004920, 0xCE400000, 0xC0004916, - 0xCE800000, 0xC0004922, 0xCEC00000, 0xA6400520, 0x00000000, 0xC0004938, 0xCBC00000, 0x00000000, - 0xC3800000, 0x6FF48000, 0x6FD44000, 0x4355A000, 0x5B744A00, 0x58340000, 0xCB802018, 0x00000000, - 0xC2000000, 0x6FB46000, 0x47B5A000, 0x5B744C80, 0x5834000C, 0xCA000028, 0xC000491A, 0xCF800000, - 0x5E200000, 0x84000452, 0xC2000000, 0xDF610050, 0x5E6001E8, 0x8800FFD0, 0xC2000002, 0xC2400466, - 0xC2A00000, 0x5AA80000, 0xC0001006, 0xCE000000, 0xC0001008, 0xCE400000, 0xC000100A, 0xCE800000, - 0x990055B8, 0xC1A0FFFE, 0xC0000824, 0xC9840068, 0xC0004934, 0xCA400000, 0xC2000000, 0xC2800002, - 0x990055F8, 0xDA980000, 0xC6140000, 0xC6580000, 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, - 0x990056E0, 0xC000491A, 0xC9400000, 0x00000000, 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, - 0xC0004922, 0xCA001120, 0xC3C00000, 0xC3800000, 0xC0004930, 0xCE001120, 0xC0004932, 0xCBC000E0, - 0xC2800000, 0xC000491E, 0xCFC00000, 0xC0004862, 0xCA800068, 0xC3A0001A, 0x5BB94000, 0xC6B80068, - 0xC000491C, 0xCF800000, 0x99005950, 0xC000491C, 0xC1400000, 0xC9420050, 0x00000000, 0x00000000, - 0x00000000, 0xA8E2FFC8, 0xC2000000, 0xC1220002, 0xD90C0000, 0xDF600040, 0x5E600080, 0x8400FFDA, - 0xC000491C, 0xCA000000, 0xC000491E, 0xCA400000, 0x00000000, 0x00000000, 0x99005B78, 0xDA180000, - 0xDA580001, 0x00000000, 0xC2000000, 0xDF610050, 0x5E6001FE, 0x8800FFD0, 0xC0004916, 0xCA800000, - 0xC2C00000, 0xDFEC0050, 0xC2400000, 0x46E52000, 0x84000032, 0x5EA80000, 0x84000022, 0xC2600002, - 0x990062F0, 0xC000482E, 0xC9400000, 0xC1800002, 0x80000018, 0xC2600000, 0x990062F0, 0xC000482C, - 0xC9400000, 0xC1800002, 0xC2000068, 0xC6240080, 0xC0004930, 0xCE400088, 0xC000491A, 0xC9800000, - 0xC0004862, 0xC9400000, 0x6D9C6000, 0x459CE000, 0x59DC4C80, 0x990059D8, 0xD9580000, 0xD9980001, - 0xD9D40000, 0x99005950, 0xC000491C, 0xC1400000, 0xC9420050, 0xC2000000, 0xDF600040, 0x5E600080, - 0x8400FFD2, 0x00000000, 0xC000491C, 0xCA000000, 0xC000491E, 0xCA400000, 0x00000000, 0x00000000, - 0x99005B78, 0xDA180000, 0xDA580001, 0x00000000, 0x800010D0, 0x00000000, 0x990062F0, 0xC000482A, - 0xC9400000, 0xC1800002, 0x800010A0, 0xC0004938, 0xCBC00000, 0x00000000, 0x00000000, 0x6FF88000, - 0x6FD44000, 0x4395C000, 0x5BB84A00, 0x58380008, 0xCA000000, 0x00000000, 0x00000000, 0xA6000362, - 0x00000000, 0xC0004938, 0xCBC00000, 0xC3000000, 0x00000000, 0x6FF88000, 0x6FD44000, 0x4395C000, - 0x5BB84A00, 0x58380000, 0xCB002018, 0xC2000000, 0x58380008, 0xCA020080, 0x5838000C, 0xCAC00000, - 0x5838000E, 0xCA400000, 0xC000491A, 0xCF000000, 0xC0004930, 0xCEC00000, 0xC000493C, 0xCE000000, - 0xC0004932, 0xCE400000, 0x5E200000, 0x84000108, 0xC2800000, 0xA6FE009A, 0x6F206000, 0x47210000, - 0x5A204C80, 0x5820000C, 0xCA800028, 0x00000000, 0x00000000, 0x5EA80000, 0x840001DA, 0x00000000, - 0xC161FFFE, 0x5955FFFE, 0x15400000, 0x00000000, 0x990056E0, 0xC000491A, 0xC9400000, 0x00000000, - 0x00000000, 0xC121FFFE, 0x5911FE14, 0x15000000, 0xC0004930, 0xCAC00000, 0xC0004932, 0xCA400000, - 0xC7EC1120, 0xC0004930, 0xCEC00000, 0x5838000C, 0xCEC00000, 0x58000002, 0xCE400000, 0xC0004934, - 0xCA000000, 0xC2400002, 0x6E642000, 0x6E642000, 0x76252000, 0x84000012, 0xC2400002, 0x6E684000, - 0x58380008, 0xCE800208, 0xA6000000, 0x6E682000, 0x58380008, 0xCE800108, 0xC2400002, 0x6E642000, - 0x76252000, 0x840000D2, 0x58380008, 0xCA000000, 0xC2800000, 0xC2400000, 0xA60200A0, 0xDBA80000, - 0x6F386000, 0x4739C000, 0x5BB84C80, 0x58380004, 0xCA400080, 0x58380002, 0xCA800080, 0x00000000, - 0xDEB80000, 0x46694000, 0x88000048, 0x00000000, 0xC0004824, 0xCA000000, 0xC2400002, 0x6E640000, - 0x5A200002, 0xCE000000, 0x58380008, 0xCE400008, 0x80000000, 0x00000000, 0x80000030, 0xC0004934, - 0xCA000000, 0x00000000, 0x00000000, 0xA6020C4A, 0x00000000, 0x00000000, 0x80000C80, 0xC2800000, - 0xC2000200, 0xC240001A, 0xDF690050, 0x46A14000, 0x46694000, 0x8800FFBA, 0xC2000006, 0xC2600982, - 0x5A643B6E, 0x5838000A, 0xCA800000, 0xC0001006, 0xCE000000, 0xC0001008, 0xCE400000, 0xC000100A, - 0xCE800000, 0x990055B8, 0xC1A0FFFE, 0xC0000824, 0xC9840068, 0xC2000000, 0xC0004930, 0xCA02E010, - 0x58380026, 0xCA400000, 0x00000000, 0xC2800000, 0x990055F8, 0xDA980000, 0xC6140000, 0xC6580000, - 0xC0004934, 0xCA000000, 0x00000000, 0x00000000, 0xA6020002, 0x00000000, 0x00000000, 0x80000300, - 0xC0004938, 0xCBC00000, 0xC0004878, 0xC8040000, 0x6C908000, 0x44908000, 0x44908000, 0x40100000, - 0xCA000000, 0xC4240000, 0x00000000, 0x58240018, 0xCA000000, 0x6FF88000, 0x6FD44000, 0x4395C000, - 0x5BB84A00, 0xC3000000, 0xC3400002, 0xC2C00000, 0xC62C0080, 0xC6270040, 0xC0004940, 0xCE400040, - 0xC6260040, 0xC0004942, 0xCE400040, 0xC000493C, 0xCA000000, 0x5EEC0000, 0x84000172, 0x5A6C0010, - 0x46614000, 0x88000178, 0x5A600052, 0x466D4000, 0x88000160, 0x58380006, 0xCA800000, 0xC0004940, - 0xCA000000, 0xC2400000, 0xC6A70040, 0x7E412000, 0x76252000, 0xC2000000, 0xC6A10040, 0x46610000, - 0x84000120, 0xC0004942, 0xCA000000, 0xC2400000, 0xC6A60040, 0x7E412000, 0x76252000, 0xC2000000, - 0xC6A00040, 0x58380002, 0xCA800000, 0x46610000, 0x840000D0, 0xC2400000, 0xC6A60080, 0x46E50000, - 0x880000C2, 0xC2400000, 0xC6A40080, 0x58380008, 0xCA800000, 0x466D0000, 0x880000A2, 0x00000000, - 0xA682FFF8, 0x00000000, 0xC7700B08, 0xA6840078, 0x00000000, 0xC7700A08, 0x80000068, 0xC7700208, - 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0x00000000, 0x5EF40000, 0x8400F6F2, 0x5EF40002, 0x8400F982, 0x5EF40004, 0x8400FB82, 0xC1006CE8, - 0x8000B628, 0x00000000, 0xC0800000, 0xDF4B0040, 0xC0004900, 0xCB800000, 0xC2000000, 0xC000490A, - 0xA78000B0, 0xCBC00000, 0xC1000000, 0xD9000001, 0xC1000002, 0xD90C0000, 0x6FF46000, 0x47F5A000, - 0x5B744C80, 0xC2400000, 0x58340004, 0xCA400080, 0xC0004900, 0xCE000008, 0x5A640002, 0x58340004, - 0xC6500080, 0xCD000080, 0xC0004914, 0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000, 0xCE400000, - 0xC0000408, 0xCE000000, 0xA78200B8, 0xC0004908, 0xCBC00000, 0xC1000000, 0xD9000001, 0xC1000002, - 0xD90C0000, 0x6FF4A000, 0x6FD44000, 0x4575A000, 0x47F5A000, 0x5B744E20, 0xC2800000, 0x58340006, - 0xCA800080, 0xC2000000, 0xC0004900, 0xCE000108, 0x5EA80002, 0x58340006, 0xC6900080, 0xCD000080, - 0x5A7C0020, 0xC2000002, 0x6A250000, 0xC0000408, 0xCE000000, 0xDCA80001, 0x5EA80000, 0x8400B498, - 0x00000000, 0xA4800210, 0x00000000, 0xC3C00000, 0xC000140E, 0xCBC00020, 0xC3400000, 0xC2400000, - 0x6FF86000, 0x47F9C000, 0x5BB84C80, 0x58380008, 0xCB400080, 0x58380006, 0xCA400080, 0x5F740002, - 0x58380008, 0xC7500080, 0xCD000080, 0xC2000000, 0x58380004, 0xCA020080, 0xC3000000, 0x5838000C, - 0xCB000028, 0x5A640002, 0x46250000, 0x8400FFF8, 0xC2400000, 0x58380006, 0xC6500080, 0xCD000080, - 0xC2000000, 0x5838000A, 0xCA020080, 0x5B300002, 0x5838000C, 0xC7100028, 0xCD000028, 0xC2420020, - 0x5A200004, 0x46612000, 0x8400FFF8, 0xC2000000, 0x5838000A, 0xC6101080, 0xCD001080, 0xC0004966, - 0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000, 0xCE400000, 0x5F740000, 0x84000028, 0xC0004912, - 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x5F300020, 0x84000028, - 0xC0004924, 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0xA4820050, - 0xC2400000, 0xC000140E, 0xCA408020, 0xC2000002, 0xC0004900, 0xCE000008, 0xC000490A, 0xCE400000, - 0xC1000000, 0xD9000001, 0xD8400080, 0xC1000004, 0xD9000001, 0xA4840250, 0x00000000, 0xC3C00000, - 0xC000140E, 0xCBC10020, 0xC2800000, 0xC2000000, 0x6FF8A000, 0x6FD44000, 0x4579C000, 0x47F9C000, - 0x5BB84E20, 0x5838002E, 0xCA800080, 0x58380006, 0xCA020080, 0xC3400000, 0x5838002E, 0xCB420080, - 0x5AA80002, 0x46290000, 0x8400FFF8, 0xC2800000, 0x5838002E, 0xC6900080, 0xCD000080, 0x5F740002, - 0x5838002E, 0xC7501080, 0xCD001080, 0xC0004968, 0xCA400000, 0xC2000002, 0x6A3D0000, 0x72252000, - 0xCE400000, 0xC000492A, 0xCA800000, 0x5E740000, 0x84000028, 0xC0004910, 0xCA000000, 0xC2C00002, - 0x6AFD6000, 0x7EC16000, 0x76E10000, 0xCE000000, 0x6ABD4010, 0xA680009A, 0x00000000, 0x58380032, - 0xCA000000, 0x58000002, 0xCA400000, 0x5838000C, 0x00000000, 0xCE000001, 0xCE400000, 0xC000492A, - 0xCA000000, 0xC2C00002, 0x6AFD6000, 0x72E10000, 0xCE000000, 0xC000492C, 0xCA000000, 0xC2C00002, - 0x6AFD6000, 0x72E10000, 0xCE000000, 0x80000028, 0xC000492C, 0xCA000000, 0xC2C00002, 0x6AFD6000, - 0x7EC16000, 0x76E10000, 0xCE000000, 0xA4880128, 0xC2C00000, 0xC000140E, 0xCAC20020, 0xC000490E, - 0xCA400000, 0xC2000002, 0x6A2D0000, 0x7E010000, 0x76252000, 0xCE400000, 0xC000496A, 0xCA400000, - 0xC2000002, 0x6A2D0000, 0x72252000, 0xCE400000, 0x6EF0A000, 0x6ED44000, 0x45718000, 0x46F18000, - 0x5B304E20, 0x58300000, 0xCA000000, 0x00000000, 0xC2400002, 0x76252000, 0x8400005A, 0x58300000, - 0xCA400000, 0xC2800000, 0x00000000, 0xC6684020, 0xC24C0002, 0xC6A40020, 0xC624C408, 0x58300010, - 0xCA400508, 0x00000000, 0xC0001800, 0xCE400000, 0xA4860050, 0xC2400000, 0xC000140E, 0xCA418020, - 0xC2020002, 0xC0004900, 0xCE000108, 0xC0004908, 0xCE400000, 0xC1000000, 0xD9000001, 0xD8400080, - 0xC1000004, 0xD9000001, 0xC0001408, 0xCC800000, 0xC10E0002, 0xD90C0000, 0x8000ED98, 0xDFBC0001, - 0xC000496E, 0x99006298, 0xC9400000, 0xC7D80000, 0x00000000, 0xC5700000, 0x5EF00020, 0x88000130, - 0x6F346000, 0x4735A000, 0x5B744C80, 0x58340008, 0xC2400000, 0xCA400080, 0x00000000, 0xC2000000, - 0x5A640002, 0xCE400080, 0x58340004, 0xCA000080, 0x00000000, 0x00000000, 0x5E200002, 0xCE000080, - 0xC0004912, 0xCA800000, 0xC2400002, 0x6A712000, 0x72694000, 0xCE800000, 0x5E200000, 0x8400003A, - 0xC000480A, 0xCA000000, 0xC0000408, 0xCA800000, 0x76610000, 0x00000000, 0x72294000, 0xCE800000, - 0x80000020, 0xC0004914, 0xCA000000, 0x7E412000, 0x00000000, 0x76610000, 0xCE000000, 0x800000B8, - 0x6EF4A000, 0x6ED44000, 0x4575A000, 0x46F5A000, 0x5B744E20, 0x5834002E, 0xC2400000, 0xCA420080, - 0x00000000, 0xC2000000, 0x5A640002, 0xC6501080, 0xCD001080, 0x58340006, 0xCA000080, 0x00000000, - 0x00000000, 0x5A200002, 0xCE000080, 0xC0004910, 0xCA400000, 0xC2000002, 0x6A2D0000, 0x72252000, - 0xCE400000, 0xC2000002, 0x6A310000, 0xC000042A, 0xCE000000, 0xC1040002, 0xD90C0000, 0x00000000, - 0x8000EB08, 0x00000000, 0xC4980930, 0x9D000000, 0xC5580030, 0xC0000838, 0xCD840000, 0xC1440200, - 0xC1C03200, 0xC55C1078, 0xC000100E, 0x9D000000, 0xCD800000, 0xC000100C, 0xCDC00000, 0xC0004862, - 0xC9C00000, 0x00000000, 0x00000000, 0xD9D80001, 0xC0007200, 0x401C0000, 0x5DC07400, 0x8800FFFA, - 0x5C000200, 0xCD800000, 0xC1F0000A, 0x71D4A000, 0xDD980000, 0xDD9C0001, 0x41D8E000, 0xC5D40268, - 0xC0001010, 0xCD400000, 0x6C9C8000, 0x449CE000, 0x449CE000, 0x59DC0004, 0xC1601260, 0xC5D40268, - 0x9D000000, 0xC0001012, 0xCD400000, 0x00000000, 0x00000000, 0xD9580000, 0x6D586000, 0x4558C000, - 0x59984C80, 0xD9980001, 0x5818000A, 0xC1800000, 0xC9800080, 0xC0005400, 0x6D5CA000, 0x401C0000, - 0x40180000, 0xC9400000, 0x58000002, 0x00000000, 0xC9C00000, 0xC0004930, 0xCD400000, 0xC0004932, - 0xCDC00000, 0x59980004, 0xC1C20020, 0xB59CFFF8, 0x00000000, 0xC1800000, 0xDD9C0001, 0x581C000A, - 0xCD800080, 0x581C000C, 0xC1800000, 0xC9800028, 0xC1C00002, 0xDD940000, 0x69D4E000, 0x5D980002, - 0xCD800028, 0xC0004924, 0xC9800000, 0x00000000, 0x9D000000, 0x00000000, 0x71D8C000, 0xCD800000, - 0xC000492A, 0xC9400000, 0xC1C00002, 0x69D8E000, 0x7DC0C000, 0x7594A000, 0xCD400000, 0xC000492C, - 0xC9400000, 0xDD800001, 0x58000032, 0x75D4A000, 0x84000078, 0xC9400001, 0xC9800000, 0xDD800001, - 0x5800000C, 0x00000000, 0xCD400001, 0xCD800000, 0xC000492C, 0xC9400000, 0xC000492A, 0xC9800000, - 0x71D4A000, 0xC000492C, 0xCD400000, 0x71D8C000, 0xC000492A, 0xCD800000, 0x9D000000, 0x00000000, - 0x00000000, 0x00000000, 0xC0004862, 0xC9800000, 0x00000000, 0xC1C00200, 0x4194C000, 0x45D8E000, - 0x8800FFFA, 0xC5D80000, 0xC0004862, 0xCD800000, 0xC0001406, 0xC9800000, 0xC1C00002, 0x9D000000, - 0xC5D80A08, 0xC5581050, 0xCD800000, 0xC0004930, 0xC9800000, 0xC0004932, 0xC9C00000, 0xC140000E, - 0xC5581C20, 0xDD940000, 0xC0007200, 0x40140000, 0x5D407400, 0x8800FFFA, 0x5C000200, 0xCD800000, - 0x58000002, 0x5D407400, 0x8800FFFA, 0x5C000200, 0xCDC00000, 0xDD540000, 0xC1C00000, 0x58140006, - 0xC9C20080, 0xC1800000, 0x58140000, 0xC98000E0, 0x6DDC2000, 0xC000491E, 0x41D8E000, 0xCDC00000, - 0xDD980000, 0xC1C00022, 0xC5D80D78, 0xDD940001, 0xC5581C20, 0xC000491C, 0xCD800000, 0xDD540000, - 0xC1C00000, 0x58140006, 0xC9C20080, 0xC1800000, 0x58140004, 0xC9820080, 0x00000000, 0x59DC0002, - 0x459CC000, 0x8400FFF8, 0xC1C00000, 0x9D000000, 0x58140006, 0xC5D81080, 0xCD801080, 0xC0004860, - 0xC9400000, 0xC1820080, 0xC1D00002, 0x58146B00, 0xD5800000, 0x58000002, 0xD5800001, 0x59540004, - 0xB558FFF8, 0xC0004860, 0xC1400000, 0xCD400000, 0xDD980001, 0x9D000000, 0xDD940000, 0xC0001404, - 0xCDC00808, 0xC1C00000, 0xC1800200, 0x5D980004, 0xDF5D0050, 0x45D8A000, 0x8800FFDA, 0xDD800001, - 0x5800000C, 0x00000000, 0xC9400001, 0xC9800000, 0xC1C00002, 0xC5D43F08, 0xC5D81E08, 0xC0004862, - 0xC9C00000, 0x00000000, 0x00000000, 0x581C7200, 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD400000, - 0x58000002, 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD800000, 0xC0004862, 0xC9C00000, 0x00000000, - 0xC15004C0, 0xC5D40068, 0xDD9C0000, 0xC5D41C20, 0xC1C00000, 0xDD800001, 0x58000030, 0xC9C00080, - 0xDD800001, 0x58000002, 0xC9800000, 0x6DDC2000, 0xC000491C, 0x41D8E000, 0xCD400001, 0xCDC00000, - 0xDD940001, 0xC1C00000, 0x58140030, 0xC9C00080, 0xC1800000, 0x58140006, 0xC9820080, 0x00000000, - 0x59DC0002, 0x459CC000, 0x8400FFF8, 0xC1C00000, 0x9D000000, 0x58140030, 0xC5D80080, 0xCD800080, - 0xC1C00000, 0xDF5C0040, 0x5DDC0080, 0x8400FFD2, 0x00000000, 0x9D000000, 0x00000000, 0x00000000, - 0x00000000, 0xC160FFFE, 0xC0000A10, 0xC9440068, 0xC1A0FFFE, 0x59980E28, 0xC000100C, 0xCD400000, - 0xC000100E, 0xCD800000, 0xC0004964, 0xC9800000, 0x00000000, 0xC170000A, 0x7194A000, 0x6C988000, - 0x4498C000, 0x4498C000, 0x59980004, 0xC5940278, 0xC0001010, 0xCD400000, 0xC0004946, 0xC9400000, - 0x00000000, 0x00000000, 0x6D58A000, 0x6D5C4000, 0x45D8C000, 0x4558C000, 0xC000494A, 0xC9400000, - 0xC0004948, 0xC9C00000, 0x4194C000, 0xC1400012, 0xC55C1820, 0x9D000000, 0xC59C0270, 0xC0001012, - 0xCDC00000, 0xC1400000, 0x58000012, 0xC9410040, 0xC0004950, 0xC9C00000, 0xC5580000, 0xC5940840, - 0xC5581080, 0xD9940000, 0xC000493C, 0xC9400000, 0xC0004954, 0xC9800000, 0x59DC00A8, 0x455CE000, - 0x41D8E000, 0x5D5C0030, 0x8800FFF8, 0xC1C00030, 0xC1800000, 0xC5D84030, 0xC1400000, 0xC5D40010, - 0x5DD40002, 0x8400005A, 0x5DD40004, 0x84000082, 0x5DD40006, 0x840000AA, 0x5DD80026, 0x840000D2, - 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD400000, 0x59980002, 0x8000FFA8, 0xDD540000, - 0xDD800001, 0x58000008, 0x40180000, 0xCD4000C0, 0x59980002, 0x8000FF70, 0xDD540000, 0xDD800001, - 0x58000008, 0x40180000, 0xCD400080, 0x59980002, 0x8000FF38, 0xDD540000, 0xDD800001, 0x58000008, - 0x40180000, 0xCD400040, 0x59980002, 0x8000FF00, 0x00000000, 0x9D000000, 0x00000000, 0x00000000, - 0x00000000, 0x58000012, 0xC9400000, 0xC0004954, 0xC9C00000, 0xC0004950, 0xC9400080, 0xDD800001, - 0x58000028, 0x5D9C0000, 0x8400003A, 0x5D9C0002, 0x8400003A, 0x5D9C0004, 0x84000052, 0xC55B0040, - 0xC55C08C0, 0xCD800041, 0xCDC008C0, 0x80000048, 0xCD400000, 0x80000038, 0xC55900C0, 0xC55C1840, - 0xCD8000C1, 0xCDC01840, 0x80000010, 0xC55A0080, 0xC55C1080, 0xCD800081, 0xCDC01080, 0x9D000000, - 0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, - 0x8800FFFA, 0xC5940000, 0x9D000000, 0xCD400000, 0x00000000, 0x00000000, 0x9D000000, 0x4158A000, - 0xCD400000, 0x00000000, -}; - -static unsigned int firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_DANUBE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube_retx.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_danube_retx.h deleted file mode 100644 index 1c915dbba1..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_danube_retx.h +++ /dev/null @@ -1,612 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_DANUBE_H -#define IFXMIPS_ATM_FW_DANUBE_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_danube.h -** PROJECT : Danube -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -*******************************************************************************/ - - -#define VER_IN_FIRMWARE 1 - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 15 - - -static unsigned int firmware_binary_code[] = { - 0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000, - 0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0xC0001B50, 0x8C100000, 0x00000000, 0x00000000, - 0x00000000, 0xC2000000, 0xDA080001, 0x80006018, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80005FF0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC1001DA6, 0x8D3C0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80005EF0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC0400000, 0xC0004840, 0xC8840000, 0xC2001AEE, 0x8E100000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC0400002, 0xC0004840, 0xC8840000, 0xC2001AEE, 0x8E100000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC3C00004, 0xDBC80001, 0xC10C0002, 0xD90C0000, 0x8000FEC8, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 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0xCE000108, 0xC0004908, 0xCE400000, - 0xC1000000, 0xD9000001, 0xD8400080, 0xC1000004, 0xD9000001, 0xA48C0028, 0xC2800002, 0xC000484A, - 0xCE800000, 0xC2800000, 0xC000474A, 0xCE800000, 0xC0004846, 0xCE800000, 0xC0001408, 0xCC800000, - 0xC10E0002, 0xD90C0000, 0x8000EA60, 0xDFBC0001, 0xC000496E, 0x99008638, 0xC9400000, 0xC7D80000, - 0x00000000, 0xC5700000, 0x5EF00020, 0x88000130, 0x6F346000, 0x4735A000, 0x5B744C80, 0x58340008, - 0xC2400000, 0xCA400080, 0x00000000, 0xC2000000, 0x5A640002, 0xCE400080, 0x58340004, 0xCA000080, - 0x00000000, 0x00000000, 0x5E200002, 0xCE000080, 0xC0004912, 0xCA800000, 0xC2400002, 0x6A712000, - 0x72694000, 0xCE800000, 0x5E200000, 0x8400003A, 0xC000480A, 0xCA000000, 0xC0000408, 0xCA800000, - 0x76610000, 0x00000000, 0x72294000, 0xCE800000, 0x80000020, 0xC0004914, 0xCA000000, 0x7E412000, - 0x00000000, 0x76610000, 0xCE000000, 0x800000B8, 0x6EF4A000, 0x6ED44000, 0x4575A000, 0x46F5A000, - 0x5B744E20, 0x5834002E, 0xC2400000, 0xCA420080, 0x00000000, 0xC2000000, 0x5A640002, 0xC6501080, - 0xCD001080, 0x58340006, 0xCA000080, 0x00000000, 0x00000000, 0x5A200002, 0xCE000080, 0xC0004910, - 0xCA400000, 0xC2000002, 0x6A2D0000, 0x72252000, 0xCE400000, 0xC2000002, 0x6A310000, 0xC000042A, - 0xCE000000, 0xC1040002, 0xD90C0000, 0x00000000, 0x8000E7D0, 0x00000000, 0xC4980930, 0x9D000000, - 0xC5580030, 0xC0000838, 0xCD840000, 0xC1440200, 0xC1C03200, 0xC55C1078, 0xC000100E, 0x9D000000, - 0xCD800000, 0xC000100C, 0xCDC00000, 0xC0004862, 0xC9C00000, 0x00000000, 0x00000000, 0xD9D80001, - 0xC0007200, 0x401C0000, 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD800000, 0xC1F0000A, 0x71D4A000, - 0xDD980000, 0xDD9C0001, 0x41D8E000, 0xC5D40268, 0xC0001010, 0xCD400000, 0x6C9C8000, 0x449CE000, - 0x449CE000, 0x59DC0004, 0xC1601260, 0xC5D40268, 0x9D000000, 0xC0001012, 0xCD400000, 0x00000000, - 0x00000000, 0xD9580000, 0x6D586000, 0x4558C000, 0x59984C80, 0xD9980001, 0x5818000A, 0xC1800000, - 0xC9800080, 0xC0005400, 0x6D5CA000, 0x401C0000, 0x40180000, 0xC9400000, 0x58000002, 0x00000000, - 0xC9C00000, 0xC0004930, 0xCD400000, 0xC0004932, 0xCDC00000, 0x59980004, 0xC1C20020, 0xB59CFFF8, - 0x00000000, 0xC1800000, 0xDD9C0001, 0x581C000A, 0xCD800080, 0x581C000C, 0xC1800000, 0xC9800028, - 0xC1C00002, 0xDD940000, 0x69D4E000, 0x5D980002, 0xCD800028, 0xC0004924, 0xC9800000, 0x00000000, - 0x9D000000, 0x00000000, 0x71D8C000, 0xCD800000, 0xC000492A, 0xC9400000, 0xC1C00002, 0x69D8E000, - 0x7DC0C000, 0x7594A000, 0xCD400000, 0xC000492C, 0xC9400000, 0xDD800001, 0x58000032, 0x75D4A000, - 0x84000078, 0xC9400001, 0xC9800000, 0xDD800001, 0x5800000C, 0x00000000, 0xCD400001, 0xCD800000, - 0xC000492C, 0xC9400000, 0xC000492A, 0xC9800000, 0x71D4A000, 0xC000492C, 0xCD400000, 0x71D8C000, - 0xC000492A, 0xCD800000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC0004862, 0xC9800000, - 0x00000000, 0xC1C00200, 0x4194C000, 0x45D8E000, 0x8800FFFA, 0xC5D80000, 0xC0004862, 0xCD800000, - 0xC0001406, 0xC9800000, 0xC1C00002, 0x9D000000, 0xC5D80A08, 0xC5581050, 0xCD800000, 0xC0004930, - 0xC9800000, 0xC0004932, 0xC9C00000, 0xC140000E, 0xC5581C20, 0xDD940000, 0xC0007200, 0x40140000, - 0x5D407400, 0x8800FFFA, 0x5C000200, 0xCD800000, 0x58000002, 0x5D407400, 0x8800FFFA, 0x5C000200, - 0xCDC00000, 0xDD540000, 0xC1C00000, 0x58140006, 0xC9C20080, 0xC1800000, 0x58140000, 0xC98000E0, - 0x6DDC2000, 0xC000491E, 0x41D8E000, 0xCDC00000, 0xDD980000, 0xC1C00022, 0xC5D80D78, 0xDD940001, - 0xC5581C20, 0xC000491C, 0xCD800000, 0xDD540000, 0xC1C00000, 0x58140006, 0xC9C20080, 0xC1800000, - 0x58140004, 0xC9820080, 0x00000000, 0x59DC0002, 0x459CC000, 0x8400FFF8, 0xC1C00000, 0x9D000000, - 0x58140006, 0xC5D81080, 0xCD801080, 0xC0004860, 0xC9400000, 0xC1820080, 0xC1D00002, 0x58146B00, - 0xD5800000, 0x58000002, 0xD5800001, 0x59540004, 0xB558FFF8, 0xC0004860, 0xC1400000, 0xCD400000, - 0xDD980001, 0x9D000000, 0xDD940000, 0xC0001404, 0xCDC00808, 0xC1C00000, 0xC1800200, 0x5D980004, - 0xDF5D0050, 0x45D8A000, 0x8800FFDA, 0xDD800001, 0x5800000C, 0x00000000, 0xC9400001, 0xC9800000, - 0xC1C00002, 0xC5D43F08, 0xC5D81E08, 0xC0004862, 0xC9C00000, 0x00000000, 0x00000000, 0x581C7200, - 0x5DC07400, 0x8800FFFA, 0x5C000200, 0xCD400000, 0x58000002, 0x5DC07400, 0x8800FFFA, 0x5C000200, - 0xCD800000, 0xC0004862, 0xC9C00000, 0x00000000, 0xC15004C0, 0xC5D40068, 0xDD9C0000, 0xC5D41C20, - 0xC1C00000, 0xDD800001, 0x58000030, 0xC9C00080, 0xDD800001, 0x58000002, 0xC9800000, 0x6DDC2000, - 0xC000491C, 0x41D8E000, 0xCD400001, 0xCDC00000, 0xDD940001, 0xC1C00000, 0x58140030, 0xC9C00080, - 0xC1800000, 0x58140006, 0xC9820080, 0x00000000, 0x59DC0002, 0x459CC000, 0x8400FFF8, 0xC1C00000, - 0x9D000000, 0x58140030, 0xC5D80080, 0xCD800080, 0xC1C00000, 0xDF5C0040, 0x5DDC0080, 0x8400FFD2, - 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC160FFFE, 0xC0000A10, 0xC9440068, - 0xC1A0FFFE, 0x59980E28, 0xC000100C, 0xCD400000, 0xC000100E, 0xCD800000, 0xC0004964, 0xC9800000, - 0x00000000, 0xC170000A, 0x7194A000, 0x6C988000, 0x4498C000, 0x4498C000, 0x59980004, 0xC5940278, - 0xC0001010, 0xCD400000, 0xC0004946, 0xC9400000, 0x00000000, 0x00000000, 0x6D58A000, 0x6D5C4000, - 0x45D8C000, 0x4558C000, 0xC000494A, 0xC9400000, 0xC0004948, 0xC9C00000, 0x4194C000, 0xC1400012, - 0xC55C1820, 0x9D000000, 0xC59C0270, 0xC0001012, 0xCDC00000, 0xC1400000, 0x58000012, 0xC9410040, - 0xC0004950, 0xC9C00000, 0xC5580000, 0xC5940840, 0xC5581080, 0xD9940000, 0xC000493C, 0xC9400000, - 0xC0004954, 0xC9800000, 0x59DC00A8, 0x455CE000, 0x41D8E000, 0x5D5C0030, 0x8800FFF8, 0xC1C00030, - 0xC1800000, 0xC5D84030, 0xC1400000, 0xC5D40010, 0x5DD40002, 0x8400005A, 0x5DD40004, 0x84000082, - 0x5DD40006, 0x840000AA, 0x5DD80026, 0x840000D2, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, - 0xCD400000, 0x59980002, 0x8000FFA8, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD4000C0, - 0x59980002, 0x8000FF70, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD400080, 0x59980002, - 0x8000FF38, 0xDD540000, 0xDD800001, 0x58000008, 0x40180000, 0xCD400040, 0x59980002, 0x8000FF00, - 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, 0xC9400000, 0xC0004954, - 0xC9C00000, 0xC0004950, 0xC9400080, 0xDD800001, 0x58000028, 0x5D9C0000, 0x8400003A, 0x5D9C0002, - 0x8400003A, 0x5D9C0004, 0x84000052, 0xC55B0040, 0xC55C08C0, 0xCD800041, 0xCDC008C0, 0x80000048, - 0xCD400000, 0x80000038, 0xC55900C0, 0xC55C1840, 0xCD8000C1, 0xCDC01840, 0x80000010, 0xC55A0080, - 0xC55C1080, 0xCD800081, 0xCDC01080, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x59540002, - 0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, 0x8800FFFA, 0xC5940000, 0x9D000000, 0xCD400000, - 0x00000000, 0x00000000, 0x9D000000, 0x4158A000, 0xCD400000, 0x00000000, 0xCD800001, 0x44148000, - 0x8800FFD8, 0x00000000, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004810, 0xCA010040, - 0xC241FFFE, 0xC1400000, 0x45608000, 0x00000000, 0x9CC00006, 0xC0004200, 0x40180000, 0xC9C00000, - 0x00000000, 0x00000000, 0x61C08010, 0x84000042, 0xC2400002, 0x6A512000, 0x725CE000, 0xCDC00000, - 0xC0004748, 0xCD800000, 0x9CC00000, 0x6D98A000, 0x5998003E, 0x45192000, 0x59540002, 0x59980002, - 0x45A08000, 0xC1000000, 0xC5180006, 0x8000FF20, 0x00000000, 0x40180000, 0xC9C00000, 0xC2000000, - 0xC5600028, 0xC1210000, 0x69208010, 0x7D008000, 0x751CE000, 0xCDC00000, 0x6D542000, 0x58144300, - 0xC1000000, 0xCD000001, 0x9CC00000, 0xC121FFFE, 0x5911FFFE, 0xCD000001, 0x79948000, 0x6D10A010, - 0x5D100000, 0x840000A8, 0x45588000, 0x88000098, 0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700, - 0x40140000, 0xCA000000, 0x00000000, 0x00000000, 0x6A110000, 0x6A110010, 0x62008018, 0x8400001A, - 0x00000000, 0x9CC00000, 0x6D54A000, 0x5954003E, 0x45152000, 0x59540002, 0x6D57A000, 0x6D57A010, - 0x6D54A000, 0x6D936000, 0x6D136010, 0xC1E10000, 0x69D0E010, 0x5DDC0002, 0x7DC0E000, 0x6D98A010, - 0x6D536000, 0x6D136010, 0x6D54A010, 0xC0004700, 0x40140000, 0xCA000000, 0x00000000, 0x00000000, - 0x6A110000, 0x6A110010, 0x45948000, 0x00000000, 0x75E10002, 0x62008018, 0x8400001A, 0x00000000, - 0x9CC00000, 0x6D54A000, 0x5954003E, 0x45152000, 0x45948000, 0x00000000, 0x9CC00002, 0x59540002, - 0x6D57A000, 0x6D57A010, 0xC0004700, 0x40140000, 0xCA000000, 0x8000FF50, 0x00000000, 0x00000000, - 0x00000000, 0x58004700, 0xC9800000, 0x9CC00000, 0x00000000, 0x6994C000, 0x6DA7E010, 0x58004700, - 0xC9800000, 0xC1210000, 0x9CC00000, 0x69148010, 0x7118C000, 0xCD800000, 0xC1000000, 0xC0004810, - 0xC9020040, 0x00000000, 0x00000000, 0x451CC000, 0x8800004A, 0xC2400002, 0x45948000, 0xC1000000, - 0xC5240004, 0x455C8000, 0xC1000000, 0xC5240006, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, - 0x59980200, 0xC2400000, 0x45D48000, 0xC1000002, 0xC5240004, 0x45588000, 0xC1000002, 0xC5240006, - 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0xC0004740, 0xC9C00000, 0x59180002, 0x6D130000, - 0x6D130010, 0x45D08000, 0xC2400000, 0x9CC00002, 0x00000000, 0x00000000, 0x45D88000, 0x8800004A, - 0xC2400002, 0x45D48000, 0xC1000000, 0xC5240004, 0x45588000, 0xC1000000, 0xC5240004, 0x9CC00000, - 0x00000000, 0x00000000, 0x00000000, 0xC2400000, 0x45948000, 0xC1000002, 0xC5240006, 0x455C8000, - 0xC1000002, 0xC5240006, 0x9CC00000, 0x00000000, 0x00000000, 0x00000000, 0x59540002, 0x6D570000, - 0x6D570010, 0x45948000, 0x6D402000, 0x9CC00002, 0x58004300, 0x58000000, 0xC13C0002, 0xCD001E08, - 0x8000FF98, 0x00000000, 0x00000000, 0x00000000, 0xC1020002, 0xD90C0000, 0xC9800000, 0x59540002, - 0xC0004730, 0xCD400000, 0x5D980002, 0x00000000, 0x8000001E, 0x00000000, 0x9CC00000, 0xC0004732, - 0xCD800000, 0x00000000, 0xC0004734, 0xC9C00000, 0xC1800000, 0xC0004816, 0xC9820080, 0xC0004738, - 0xCDC00000, 0xC1C00000, 0xC0004734, 0x9CC00000, 0xCDC00000, 0xC0004732, 0xCD800000, -}; - -static unsigned int firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_DANUBE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_amazon_se.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_amazon_se.h deleted file mode 100644 index af2b550869..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_amazon_se.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_REGS_AMAZON_SE_H -#define IFXMIPS_ATM_FW_REGS_AMAZON_SE_H - - - -/* - * Host-PPE Communication Data Address Mapping - */ -#define FW_VER_ID SB_BUFFER(0x2001) /* Firmware Version ID */ -#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ -#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ -#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ -#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ -#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ -#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) -#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) -#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) -#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2F00 + (i) * 27)) -#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2F01 + (i) * 27)) -#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) -#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x3200 + (i))) -#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x3220 + (i))) -#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x3240 + (i))) - - - -#endif // IFXMIPS_ATM_FW_REGS_AMAZON_SE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_ar9.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_ar9.h deleted file mode 100644 index dd010f54f9..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_ar9.h +++ /dev/null @@ -1,172 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_regs_ar9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (Firmware Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_FW_REGS_AR9_H -#define IFXMIPS_ATM_FW_REGS_AR9_H - - - -/* - * Host-PPE Communication Data Address Mapping - */ -#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) -#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ -#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ -#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ -#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ -#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ -#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) -#define WRX_QUEUE_CONTEXT(i) ((struct wrx_queue_context*) SB_BUFFER(0x2504 + (i) * 20)) -#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) -#define WRX_DESC_CONTEXT(i) ((struct wrx_desc_context*) SB_BUFFER(0x2643 + (i) * 7)) -#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) -#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x3800 + (i) * 27)) -#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x3801 + (i) * 27)) -#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) -#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2010 + (i))) -#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2030 + (i))) -#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2050 + (i))) - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - - #define RETX_MODE_CFG ((volatile struct Retx_mode_cfg *) SB_BUFFER(0x2408)) - #define RETX_TSYNC_CFG ((volatile struct Retx_Tsync_cfg *) SB_BUFFER(0x2409)) - #define RETX_TD_CFG ((volatile struct Retx_Td_cfg *) SB_BUFFER(0x240A)) - #define RETX_MIB_TIMER_CFG ((volatile struct Retx_MIB_Timer_cfg *) SB_BUFFER(0x240B)) - #define RETX_PLAYOUT_BUFFER_BASE SB_BUFFER(0x240D) - #define RETX_SERVICE_HEADER_CFG SB_BUFFER(0x240E) - #define RETX_MASK_HEADER_CFG SB_BUFFER(0x240F) - - #define RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) PPE_REG_ADDR(0x0D78)) - #define BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AC)) - #define FIRST_BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AE)) - - #define PB_BUFFER_USAGE SB_BUFFER(0x2100) - #define DTU_STAT_INFO ((volatile struct DTU_stat_info *) SB_BUFFER(0x2180)) - #define DTU_VLD_STAT SB_BUFFER(0x2380) - - - //===================================================================== - // retx firmware mib, for debug purpose - // address : 0x2388 - 0x238F - // size : 8 - //===================================================================== - #define URETX_RX_TOTAL_DTU SB_BUFFER(0x2388) - #define URETX_RX_BAD_DTU SB_BUFFER(0x2389) - #define URETX_RX_GOOD_DTU SB_BUFFER(0x238A) - #define URETX_RX_CORRECTED_DTU SB_BUFFER(0x238B) - #define URETX_RX_OUTOFDATE_DTU SB_BUFFER(0x238C) - #define URETX_RX_DUPLICATE_DTU SB_BUFFER(0x238D) - #define URETX_RX_TIMEOUT_DTU SB_BUFFER(0x238E) - - #define URETX_ALPHA_SWITCH_TO_HUNT_TIMES SB_BUFFER(0x238F) - - // cell counter for debug purpose - #define WRX_BC0_CELL_NUM SB_BUFFER(0x23E0) - #define WRX_BC0_DROP_CELL_NUM SB_BUFFER(0x23E1) - #define WRX_BC0_NONRETX_CELL_NUM SB_BUFFER(0x23E2) - #define WRX_BC0_RETX_CELL_NUM SB_BUFFER(0x23E3) - #define WRX_BC0_OUTOFDATE_CELL_NUM SB_BUFFER(0x23E4) - #define WRX_BC0_DIRECTUP_NUM SB_BUFFER(0x23E5) - #define WRX_BC0_PBW_TOTAL_NUM SB_BUFFER(0x23E6) - #define WRX_BC0_PBW_SUCC_NUM SB_BUFFER(0x23E7) - #define WRX_BC0_PBW_FAIL_NUM SB_BUFFER(0x23E8) - #define WRX_BC1_CELL_NUM SB_BUFFER(0x23E9) - - // debug info (interface) - - #define DBG_DTU_INTF_WRPTR SB_BUFFER(0x2390) - #define DBG_INTF_FCW_DUP_CNT SB_BUFFER(0x2391) - #define DBG_INTF_SID_CHANGE_IN_DTU_CNT SB_BUFFER(0x2392) - #define DBG_INTF_LCW_DUP_CNT SB_BUFFER(0x2393) - - #define DBG_RFBI_DONE_INT_CNT SB_BUFFER(0x2394) - #define DBG_DREG_BEG_END SB_BUFFER(0x2395) - #define DBG_RFBI_BC0_INVALID_CNT SB_BUFFER(0x2396) - #define DBG_RFBI_LAST_T SB_BUFFER(0x2397) - - #define DBG_RFBI_INTV0 SB_BUFFER(0x23EE) - #define DBG_RFBI_INTV1 SB_BUFFER(0x23EF) - - #define DBG_INTF_INFO(i) ((volatile struct Retx_adsl_ppe_intf_rec *) SB_BUFFER(0x23F0 + i)) - - // Internal status - #define URetx_curr_time SB_BUFFER(0x2398) - #define URetx_sec_counter SB_BUFFER(0x2399) - #define RxCURR_EFB SB_BUFFER(0x239A) - #define RxDTURetransmittedCNT SB_BUFFER(0x239B) - - //===================================================================== - // standardized MIB counter - // address : 0x239C - 0x239F - // size : 4 - //===================================================================== - #define RxLastEFBCNT SB_BUFFER(0x239C) - #define RxDTUCorrectedCNT SB_BUFFER(0x239D) - #define RxDTUCorruptedCNT SB_BUFFER(0x239E) - #define RxRetxDTUUncorrectedCNT SB_BUFFER(0x239F) - - - //===================================================================== - // General URetx Context - // address : 0x23A0 - 0x23AF - // size : 16 - //===================================================================== - #define NEXT_DTU_SID_OUT SB_BUFFER(0x23A0) - #define LAST_DTU_SID_IN SB_BUFFER(0x23A1) - #define NEXT_CELL_SID_OUT SB_BUFFER(0x23A2) - #define ISR_CELL_ID SB_BUFFER(0x23A3) - #define PB_CELL_SEARCH_IDX SB_BUFFER(0x23A4) - #define PB_READ_PEND_FLAG SB_BUFFER(0x23A5) - #define RFBI_FIRST_CW SB_BUFFER(0x23A6) - #define RFBI_BAD_CW SB_BUFFER(0x23A7) - #define RFBI_INVALID_CW SB_BUFFER(0x23A8) - #define RFBI_RETX_CW SB_BUFFER(0x23A9) - #define RFBI_CHK_DTU_STATUS SB_BUFFER(0x23AA) - - //===================================================================== - // per PVC counter for RX error_pdu and correct_pdu - // address : 0x23B0 - 0x23CF - // size : 32 - //===================================================================== - #define WRX_PER_PVC_CORRECT_PDU_BASE SB_BUFFER(0x23B0) - #define WRX_PER_PVC_ERROR_PDU_BASE SB_BUFFER(0x23C0) - - #define __WRXCTXT_L2_RdPtr(i) SB_BUFFER(0x2422 + (i)) - #define __WRXCTXT_L2Pages(i) SB_BUFFER(0x2424 + (i)) - - #define __WTXCTXT_TC_WRPTR(i) SB_BUFFER(0x2450 + (i)) - #define __WRXCTXT_PortState(i) SB_BUFFER(0x242A + (i)) - -#endif - - - -#endif // IFXMIPS_ATM_FW_REGS_AR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_common.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_common.h deleted file mode 100644 index 432969b933..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_common.h +++ /dev/null @@ -1,546 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_regs_common.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (Firmware Register Structures) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_FW_REGS_COMMON_H -#define IFXMIPS_ATM_FW_REGS_COMMON_H - - - -#if defined(CONFIG_DANUBE) - #include "ifxmips_atm_fw_regs_danube.h" -#elif defined(CONFIG_AMAZON_SE) - #include "ifxmips_atm_fw_regs_amazon_se.h" -#elif defined(CONFIG_AR9) - #include "ifxmips_atm_fw_regs_ar9.h" -#elif defined(CONFIG_VR9) - #include "ifxmips_atm_fw_regs_vr9.h" -#else - #error Platform is not specified! -#endif - - - -/* - * PPE ATM Cell Header - */ -#if defined(__BIG_ENDIAN) - struct uni_cell_header { - unsigned int gfc :4; - unsigned int vpi :8; - unsigned int vci :16; - unsigned int pti :3; - unsigned int clp :1; - }; -#else - struct uni_cell_header { - unsigned int clp :1; - unsigned int pti :3; - unsigned int vci :16; - unsigned int vpi :8; - unsigned int gfc :4; - }; -#endif // defined(__BIG_ENDIAN) - -/* - * Inband Header and Trailer - */ -#if defined(__BIG_ENDIAN) - struct rx_inband_trailer { - /* 0 - 3h */ - unsigned int uu :8; - unsigned int cpi :8; - unsigned int stw_res1:4; - unsigned int stw_clp :1; - unsigned int stw_ec :1; - unsigned int stw_uu :1; - unsigned int stw_cpi :1; - unsigned int stw_ovz :1; - unsigned int stw_mfl :1; - unsigned int stw_usz :1; - unsigned int stw_crc :1; - unsigned int stw_il :1; - unsigned int stw_ra :1; - unsigned int stw_res2:2; - /* 4 - 7h */ - unsigned int gfc :4; - unsigned int vpi :8; - unsigned int vci :16; - unsigned int pti :3; - unsigned int clp :1; - }; - - struct tx_inband_header { - /* 0 - 3h */ - unsigned int gfc :4; - unsigned int vpi :8; - unsigned int vci :16; - unsigned int pti :3; - unsigned int clp :1; - /* 4 - 7h */ - unsigned int uu :8; - unsigned int cpi :8; - unsigned int pad :8; - unsigned int res1 :8; - }; -#else - struct rx_inband_trailer { - /* 0 - 3h */ - unsigned int stw_res2:2; - unsigned int stw_ra :1; - unsigned int stw_il :1; - unsigned int stw_crc :1; - unsigned int stw_usz :1; - unsigned int stw_mfl :1; - unsigned int stw_ovz :1; - unsigned int stw_cpi :1; - unsigned int stw_uu :1; - unsigned int stw_ec :1; - unsigned int stw_clp :1; - unsigned int stw_res1:4; - unsigned int cpi :8; - unsigned int uu :8; - /* 4 - 7h */ - unsigned int clp :1; - unsigned int pti :3; - unsigned int vci :16; - unsigned int vpi :8; - unsigned int gfc :4; - }; - - struct tx_inband_header { - /* 0 - 3h */ - unsigned int clp :1; - unsigned int pti :3; - unsigned int vci :16; - unsigned int vpi :8; - unsigned int gfc :4; - /* 4 - 7h */ - unsigned int res1 :8; - unsigned int pad :8; - unsigned int cpi :8; - unsigned int uu :8; - }; -#endif // defined(__BIG_ENDIAN) - -/* - * MIB Table Maintained by Firmware - */ -struct wan_mib_table { - u32 res1; - u32 wrx_drophtu_cell; - u32 wrx_dropdes_pdu; - u32 wrx_correct_pdu; - u32 wrx_err_pdu; - u32 wrx_dropdes_cell; - u32 wrx_correct_cell; - u32 wrx_err_cell; - u32 wrx_total_byte; - u32 res2; - u32 wtx_total_pdu; - u32 wtx_total_cell; - u32 wtx_total_byte; -}; - -/* - * Host-PPE Communication Data Structure - */ - -#if defined(__BIG_ENDIAN) - struct fw_ver_id { - unsigned int family :4; - unsigned int fwtype :4; - unsigned int interface :4; - unsigned int fwmode :4; - unsigned int major :8; - unsigned int minor :8; - }; - - struct wrx_queue_config { - /* 0h */ - unsigned int res2 :27; - unsigned int dmach :4; - unsigned int errdp :1; - /* 1h */ - unsigned int oversize :16; - unsigned int undersize :16; - /* 2h */ - unsigned int res1 :16; - unsigned int mfs :16; - /* 3h */ - unsigned int uumask :8; - unsigned int cpimask :8; - unsigned int uuexp :8; - unsigned int cpiexp :8; - }; - - struct wrx_queue_context { - /* 0h */ - unsigned int curr_len :16; - unsigned int res0 :12; - unsigned int mfs :1; - unsigned int ec :1; - unsigned int clp1 :1; - unsigned int aal5dp :1; - - /* 1h */ - unsigned int intcrc; - - /* 2h, 3h */ - unsigned int curr_des0; - unsigned int curr_des1; - - /* 4h - 0xE */ - unsigned int res1[11]; - - unsigned int last_dword; - }; - - struct wtx_port_config { - unsigned int res1 :27; - unsigned int qid :4; - unsigned int qsben :1; - }; - - struct wtx_queue_config { - unsigned int res1 :25; - unsigned int sbid :1; - unsigned int qsb_vcid :4; // Which QSB queue (VCID) does this TX queue map to. - unsigned int res2 :1; - unsigned int qsben :1; - }; - - struct wrx_desc_context { - unsigned int dmach_wrptr : 16; - unsigned int dmach_rdptr : 16; - - unsigned int res0 : 16; - unsigned int dmach_fcnt : 16; - - unsigned int res1 : 11; - unsigned int desbuf_wrptr : 5; - unsigned int res2 : 11; - unsigned int desbuf_rdptr : 5; - - unsigned int res3 : 27; - unsigned int desbuf_vcnt : 5; - }; - - struct wrx_dma_channel_config { - /* 0h */ - unsigned int res1 :1; - unsigned int mode :2; - unsigned int rlcfg :1; - unsigned int desba :28; - /* 1h */ - unsigned int chrl :16; - unsigned int clp1th :16; - /* 2h */ - unsigned int deslen :16; - unsigned int vlddes :16; - }; - - struct wtx_dma_channel_config { - /* 0h */ - unsigned int res2 :1; - unsigned int mode :2; - unsigned int res3 :1; - unsigned int desba :28; - /* 1h */ - unsigned int res1 :32; - /* 2h */ - unsigned int deslen :16; - unsigned int vlddes :16; - }; - - struct htu_entry { - unsigned int res1 :1; - unsigned int clp :1; - unsigned int pid :2; - unsigned int vpi :8; - unsigned int vci :16; - unsigned int pti :3; - unsigned int vld :1; - }; - - struct htu_mask { - unsigned int set :1; - unsigned int clp :1; - unsigned int pid_mask :2; - unsigned int vpi_mask :8; - unsigned int vci_mask :16; - unsigned int pti_mask :3; - unsigned int clear :1; - }; - - struct htu_result { - unsigned int res1 :12; - unsigned int cellid :4; - unsigned int res2 :5; - unsigned int type :1; - unsigned int ven :1; - unsigned int res3 :5; - unsigned int qid :4; - }; - - struct rx_descriptor { - /* 0 - 3h */ - unsigned int own :1; - unsigned int c :1; - unsigned int sop :1; - unsigned int eop :1; - unsigned int res1 :3; - unsigned int byteoff :2; - unsigned int res2 :2; - unsigned int id :4; - unsigned int err :1; - unsigned int datalen :16; - /* 4 - 7h */ - unsigned int res3 :4; - unsigned int dataptr :28; - }; - - struct tx_descriptor { - /* 0 - 3h */ - unsigned int own :1; - unsigned int c :1; - unsigned int sop :1; - unsigned int eop :1; - unsigned int byteoff :5; - unsigned int res1 :5; - unsigned int iscell :1; - unsigned int clp :1; - unsigned int datalen :16; - /* 4 - 7h */ - unsigned int res2 :4; - unsigned int dataptr :28; - }; -#else - struct wrx_queue_config { - /* 0h */ - unsigned int errdp :1; - unsigned int dmach :4; - unsigned int res2 :27; - /* 1h */ - unsigned int undersize :16; - unsigned int oversize :16; - /* 2h */ - unsigned int mfs :16; - unsigned int res1 :16; - /* 3h */ - unsigned int cpiexp :8; - unsigned int uuexp :8; - unsigned int cpimask :8; - unsigned int uumask :8; - }; - - struct wtx_port_config { - unsigned int qsben :1; - unsigned int qid :4; - unsigned int res1 :27; - }; - - struct wtx_queue_config { - unsigned int qsben :1; - unsigned int res2 :1; - unsigned int qsb_vcid :4; // Which QSB queue (VCID) does this TX queue map to. - unsigned int sbid :1; - unsigned int res1 :25; - }; - - struct wrx_dma_channel_config - { - /* 0h */ - unsigned int desba :28; - unsigned int rlcfg :1; - unsigned int mode :2; - unsigned int res1 :1; - /* 1h */ - unsigned int clp1th :16; - unsigned int chrl :16; - /* 2h */ - unsigned int vlddes :16; - unsigned int deslen :16; - }; - - struct wtx_dma_channel_config { - /* 0h */ - unsigned int desba :28; - unsigned int res3 :1; - unsigned int mode :2; - unsigned int res2 :1; - /* 1h */ - unsigned int res1 :32; - /* 2h */ - unsigned int vlddes :16; - unsigned int deslen :16; - }; - - struct rx_descriptor { - /* 4 - 7h */ - unsigned int dataptr :28; - unsigned int res3 :4; - /* 0 - 3h */ - unsigned int datalen :16; - unsigned int err :1; - unsigned int id :4; - unsigned int res2 :2; - unsigned int byteoff :2; - unsigned int res1 :3; - unsigned int eop :1; - unsigned int sop :1; - unsigned int c :1; - unsigned int own :1; - }; - - struct tx_descriptor { - /* 4 - 7h */ - unsigned int dataptr :28; - unsigned int res2 :4; - /* 0 - 3h */ - unsigned int datalen :16; - unsigned int clp :1; - unsigned int iscell :1; - unsigned int res1 :5; - unsigned int byteoff :5; - unsigned int eop :1; - unsigned int sop :1; - unsigned int c :1; - unsigned int own :1; - }; -#endif // defined(__BIG_ENDIAN) - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - #if defined(__BIG_ENDIAN) - - struct Retx_adsl_ppe_intf { - unsigned int res0_0 : 16; - unsigned int dtu_sid : 8; - unsigned int dtu_timestamp : 8; - - unsigned int res1_0 : 16; - unsigned int local_time : 8; - unsigned int res1_1 : 5; - unsigned int is_last_cw : 1; - unsigned int reinit_flag : 1; - unsigned int is_bad_cw : 1; - }; - - struct Retx_adsl_ppe_intf_rec { - - unsigned int local_time : 8; - unsigned int res1_1 : 5; - unsigned int is_last_cw : 1; - unsigned int reinit_flag : 1; - unsigned int is_bad_cw : 1; - - unsigned int dtu_sid : 8; - unsigned int dtu_timestamp : 8; - - }; - - struct Retx_mode_cfg { - unsigned int res0 :8; - unsigned int invld_range :8; // used for rejecting the too late arrival of the retransmitted DTU - unsigned int buff_size :8; // the total number of cells in playout buffer is 32 * buff_size - unsigned int res1 :7; - unsigned int retx_en :1; - }; - - struct Retx_Tsync_cfg { - unsigned int fw_alpha :16; // number of consecutive HEC error cell causes that the cell delineation state machine transit from SYNC to HUNT (0 means never) - unsigned int sync_inp :16; // reserved - }; - - struct Retx_Td_cfg { - unsigned int res0 :8; - unsigned int td_max :8; // maximum delay between the time a DTU is first created at transmitter and the time the DTU is sent out of ReTX layer at receiver - unsigned int res1 :8; - unsigned int td_min :8; // minimum delay between the time a DTU is first created at transmitter and the time the DTU is sent out of ReTX layer at receiver - }; - - struct Retx_MIB_Timer_cfg { - unsigned int ticks_per_sec : 16; - unsigned int tick_cycle : 16; - }; - - struct DTU_stat_info { - unsigned int complete : 1; - unsigned int bad : 1; - unsigned int res0_0 : 14; - unsigned int time_stamp : 8; - unsigned int cell_cnt : 8; - - unsigned int dtu_rd_ptr : 16; - unsigned int dtu_wr_ptr : 16; - }; - - struct Retx_ctrl_field { - unsigned int res0 : 1; - - unsigned int l2_drop : 1; - unsigned int res1 : 13; - unsigned int retx : 1; - - unsigned int dtu_sid : 8; - unsigned int cell_sid : 8; - }; - - #else - #error Little Endian is not supported yet. - #endif - - struct dsl_param { - unsigned int update_flag; // 00 - unsigned int res0; // 04 - unsigned int MinDelayrt; // 08 - unsigned int MaxDelayrt; // 0C - unsigned int res1; // 10 - unsigned int res2; // 14 - unsigned int RetxEnable; // 18 - unsigned int ServiceSpecificReTx; // 1C - unsigned int res3; // 20 - unsigned int ReTxPVC; // 24 - unsigned int res4; // 28 - unsigned int res5; // 2C - unsigned int res6; // 30 - unsigned int res7; // 34 - unsigned int res8; // 38 - unsigned int res9; // 3C - unsigned int res10; // 40 - unsigned int res11; // 44 - unsigned int res12; // 48 - unsigned int res13; // 4C - unsigned int RxDtuCorruptedCNT; // 50 - unsigned int RxRetxDtuUnCorrectedCNT;// 54 - unsigned int RxLastEFB; // 58 - unsigned int RxDtuCorrectedCNT; // 5C - }; -#endif - - - -#endif // IFXMIPS_ATM_FW_REGS_COMMON_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_danube.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_danube.h deleted file mode 100644 index 5239fce8c9..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_danube.h +++ /dev/null @@ -1,178 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_regs_danube.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (Firmware Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H -#define IFXMIPS_ATM_FW_REGS_DANUBE_H - - - -/* - * Host-PPE Communication Data Address Mapping - */ -#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) -#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ -#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ -#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ -#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ -#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ -#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) -#define WRX_QUEUE_CONTEXT(i) ((struct wrx_queue_context*) SB_BUFFER(0x2504 + (i) * 20)) -#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) -#define WRX_DESC_CONTEXT(i) ((struct wrx_desc_context*) SB_BUFFER(0x2643 + (i) * 7)) -#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) -#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27)) -#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27)) -#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) -#if !defined(ENABLE_ATM_RETX) || !ENABLE_ATM_RETX - #define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i))) - #define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i))) - #define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i))) -#else - #define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2020 + (i))) - #define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2040 + (i))) - #define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2060 + (i))) -#endif - -#if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX - - #define RETX_MODE_CFG ((volatile struct Retx_mode_cfg *) SB_BUFFER(0x2408)) - #define RETX_TSYNC_CFG ((volatile struct Retx_Tsync_cfg *) SB_BUFFER(0x2409)) - #define RETX_TD_CFG ((volatile struct Retx_Td_cfg *) SB_BUFFER(0x240A)) - #define RETX_MIB_TIMER_CFG ((volatile struct Retx_MIB_Timer_cfg *) SB_BUFFER(0x240B)) - #define RETX_PLAYOUT_BUFFER_BASE SB_BUFFER(0x240D) - #define RETX_SERVICE_HEADER_CFG SB_BUFFER(0x240E) - #define RETX_MASK_HEADER_CFG SB_BUFFER(0x240F) - - #define RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) PPE_REG_ADDR(0x0D78)) - #define BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AC)) - #define FIRST_BAD_REC_RETX_ADSL_PPE_INTF ((volatile struct Retx_adsl_ppe_intf *) SB_BUFFER(0x23AE)) - - #define PB_BUFFER_USAGE SB_BUFFER(0x2100) - #define DTU_STAT_INFO ((volatile struct DTU_stat_info *) SB_BUFFER(0x2180)) - #define DTU_VLD_STAT SB_BUFFER(0x2380) - - - //===================================================================== - // retx firmware mib, for debug purpose - // address : 0x2388 - 0x238F - // size : 8 - //===================================================================== - #define URETX_RX_TOTAL_DTU SB_BUFFER(0x2388) - #define URETX_RX_BAD_DTU SB_BUFFER(0x2389) - #define URETX_RX_GOOD_DTU SB_BUFFER(0x238A) - #define URETX_RX_CORRECTED_DTU SB_BUFFER(0x238B) - #define URETX_RX_OUTOFDATE_DTU SB_BUFFER(0x238C) - #define URETX_RX_DUPLICATE_DTU SB_BUFFER(0x238D) - #define URETX_RX_TIMEOUT_DTU SB_BUFFER(0x238E) - - #define URETX_ALPHA_SWITCH_TO_HUNT_TIMES SB_BUFFER(0x238F) - - // cell counter for debug purpose - #define WRX_BC0_CELL_NUM SB_BUFFER(0x23E0) - #define WRX_BC0_DROP_CELL_NUM SB_BUFFER(0x23E1) - #define WRX_BC0_NONRETX_CELL_NUM SB_BUFFER(0x23E2) - #define WRX_BC0_RETX_CELL_NUM SB_BUFFER(0x23E3) - #define WRX_BC0_OUTOFDATE_CELL_NUM SB_BUFFER(0x23E4) - #define WRX_BC0_DIRECTUP_NUM SB_BUFFER(0x23E5) - #define WRX_BC0_PBW_TOTAL_NUM SB_BUFFER(0x23E6) - #define WRX_BC0_PBW_SUCC_NUM SB_BUFFER(0x23E7) - #define WRX_BC0_PBW_FAIL_NUM SB_BUFFER(0x23E8) - #define WRX_BC1_CELL_NUM SB_BUFFER(0x23E9) - - // debug info (interface) - - #define DBG_DTU_INTF_WRPTR SB_BUFFER(0x2390) - #define DBG_INTF_FCW_DUP_CNT SB_BUFFER(0x2391) - #define DBG_INTF_SID_CHANGE_IN_DTU_CNT SB_BUFFER(0x2392) - #define DBG_INTF_LCW_DUP_CNT SB_BUFFER(0x2393) - - #define DBG_RFBI_DONE_INT_CNT SB_BUFFER(0x2394) - #define DBG_DREG_BEG_END SB_BUFFER(0x2395) - #define DBG_RFBI_BC0_INVALID_CNT SB_BUFFER(0x2396) - #define DBG_RFBI_LAST_T SB_BUFFER(0x2397) - - #define DBG_RFBI_INTV0 SB_BUFFER(0x23EE) - #define DBG_RFBI_INTV1 SB_BUFFER(0x23EF) - - #define DBG_INTF_INFO(i) ((volatile struct Retx_adsl_ppe_intf_rec *) SB_BUFFER(0x23F0 + i)) - - // Internal status - #define URetx_curr_time SB_BUFFER(0x2398) - #define URetx_sec_counter SB_BUFFER(0x2399) - #define RxCURR_EFB SB_BUFFER(0x239A) - #define RxDTURetransmittedCNT SB_BUFFER(0x239B) - - //===================================================================== - // standardized MIB counter - // address : 0x239C - 0x239F - // size : 4 - //===================================================================== - #define RxLastEFBCNT SB_BUFFER(0x239C) - #define RxDTUCorrectedCNT SB_BUFFER(0x239D) - #define RxDTUCorruptedCNT SB_BUFFER(0x239E) - #define RxRetxDTUUncorrectedCNT SB_BUFFER(0x239F) - - - //===================================================================== - // General URetx Context - // address : 0x23A0 - 0x23AF - // size : 16 - //===================================================================== - #define NEXT_DTU_SID_OUT SB_BUFFER(0x23A0) - #define LAST_DTU_SID_IN SB_BUFFER(0x23A1) - #define NEXT_CELL_SID_OUT SB_BUFFER(0x23A2) - #define ISR_CELL_ID SB_BUFFER(0x23A3) - #define PB_CELL_SEARCH_IDX SB_BUFFER(0x23A4) - #define PB_READ_PEND_FLAG SB_BUFFER(0x23A5) - #define RFBI_FIRST_CW SB_BUFFER(0x23A6) - #define RFBI_BAD_CW SB_BUFFER(0x23A7) - #define RFBI_INVALID_CW SB_BUFFER(0x23A8) - #define RFBI_RETX_CW SB_BUFFER(0x23A9) - #define RFBI_CHK_DTU_STATUS SB_BUFFER(0x23AA) - - //===================================================================== - // per PVC counter for RX error_pdu and correct_pdu - // address : 0x23B0 - 0x23CF - // size : 32 - //===================================================================== - #define WRX_PER_PVC_CORRECT_PDU_BASE SB_BUFFER(0x23B0) - #define WRX_PER_PVC_ERROR_PDU_BASE SB_BUFFER(0x23C0) - - #define __WRXCTXT_L2_RdPtr(i) SB_BUFFER(0x2422 + (i)) - #define __WRXCTXT_L2Pages(i) SB_BUFFER(0x2424 + (i)) - - #define __WTXCTXT_TC_WRPTR(i) SB_BUFFER(0x2450 + (i)) - #define __WRXCTXT_PortState(i) SB_BUFFER(0x242A + (i)) - -#endif - - - -#endif // IFXMIPS_ATM_FW_REGS_DANUBE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_vr9.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_vr9.h deleted file mode 100644 index edefe92d25..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_regs_vr9.h +++ /dev/null @@ -1,59 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_regs_vr9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (Firmware Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_FW_REGS_VR9_H -#define IFXMIPS_ATM_FW_REGS_VR9_H - - - -/* - * Host-PPE Communication Data Address Mapping - */ -#define FW_VER_ID ((volatile struct fw_ver_id *) SB_BUFFER(0x2001)) -#define CFG_WRX_HTUTS SB_BUFFER(0x2010) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ -#define CFG_WRX_QNUM SB_BUFFER(0x2011) /* WAN RX Queue Number */ -#define CFG_WRX_DCHNUM SB_BUFFER(0x2012) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ -#define CFG_WTX_DCHNUM SB_BUFFER(0x2013) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ -#define CFG_WRDES_DELAY SB_BUFFER(0x2014) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ -#define WRX_DMACH_ON SB_BUFFER(0x2015) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WTX_DMACH_ON SB_BUFFER(0x2016) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ -#define WRX_HUNT_BITTH SB_BUFFER(0x2017) /* WAN RX HUNT Threshold, must be between 2 to 8. */ -#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x4C00 + (i) * 20)) /* i < 16 */ -#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x4F80 + (i) * 7)) /* i < 8 */ -#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x4FB8 + (i))) /* i < 2 */ -#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x3A00 + (i) * 27)) /* i < 16 */ -#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x3A01 + (i) * 27)) /* i < 16 */ -#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x4EF0)) -#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x26A0 + (i))) /* i < 32 */ -#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x26C0 + (i))) /* i < 32 */ -#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x26E0 + (i))) /* i < 32 */ - -#define UTP_CFG SB_BUFFER(0x2018) // bit 0~3 - 0x0F: in showtime, 0x00: not in showtime - - - -#endif // IFXMIPS_ATM_FW_REGS_VR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_fw_vr9.h b/package/system/ltq-dsl/src/ifxmips_atm_fw_vr9.h deleted file mode 100644 index 96b1725949..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_fw_vr9.h +++ /dev/null @@ -1,427 +0,0 @@ -#ifndef IFXMIPS_ATM_FW_VR9_H -#define IFXMIPS_ATM_FW_VR9_H - - -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_fw_vr9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 22 OCT 2007 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PP32 Firmware) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 22 OCT 2007 Xu Liang Initial Version, v00.01 -*******************************************************************************/ - - -#define VER_IN_FIRMWARE 1 - -#define ATM_FW_VER_MAJOR 0 -#define ATM_FW_VER_MINOR 24 - - -static u32 firmware_binary_code[] = { - 0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000, - 0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0x80004390, 0xC2000000, 0xDA0800F9, 0x80003A10, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x800039C8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x80004B60, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x800038C8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC0400000, 0xC000ABC0, 0xC88400F8, 0x80004050, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC0400002, 0xC000ABC0, 0xC88400F8, 0x80003FD0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC3C00004, 0xDBC800F9, 0xC10C0002, 0xD90C00F8, 0x8000FEE0, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC10E0002, 0xD90C00F8, 0xC0004028, 0xC84000F8, 0x80004000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xC3E1FFFE, 0x597DFFFE, 0x593DFE14, 0x900004D9, 0x00000000, 0x00000000, 0x00000000, 0x90CC0481, - 0x00000000, 0x00000000, 0x00000000, 0xC3C00000, 0xDBC800F9, 0xC1400008, 0xC1900000, 0x71588000, - 0x14100100, 0xC140000A, 0xC1900002, 0x71588000, 0x14100100, 0xC140000C, 0xC1900004, 0x71588000, - 0x14100100, 0xC1400004, 0xC1900006, 0x71588000, 0x14100100, 0xC1400006, 0xC1900008, 0x71588000, - 0x14100100, 0xC140000E, 0xC190000A, 0x71588000, 0x14100100, 0xC1400000, 0xC190000C, 0x71588000, - 0x14100100, 0xC1400002, 0xC190000E, 0x71588000, 0x14100100, 0xC0400000, 0xC11C0000, 0xC000E82C, - 0xCD05CE00, 0xC11C0002, 0xC000E82C, 0xCD05CE00, 0xC0400002, 0xC11C0000, 0xC000E82C, 0xCD05CE00, - 0xC11C0002, 0xC000E82C, 0xCD05CE00, 0xC000E824, 0x00000000, 0xCBC000F9, 0xCB8000F9, 0xCB4000F9, - 0xCB0000F8, 0xC000ABE4, 0x5BFC4000, 0xCFC000F9, 0x5BB84000, 0xCF8000F9, 0x5B744000, 0xCF4000F9, - 0x5B304000, 0xCF0000F8, 0xC000EA10, 0x00000000, 0xCBC000F9, 0xCB8000F8, 0xC000ABE0, 0x5BFC4000, - 0xCFC000F9, 0x5BB84000, 0xCF8000F8, 0xC30001FE, 0xC000F416, 0xCF0000F8, 0xC3000000, 0x7F018000, - 0xC000E42E, 0xCF0000F8, 0xC000E40E, 0xCF0000F8, 0xC3C1FFFE, 0xC000690E, 0xCFC00078, 0xC000692C, - 0xCFC00078, 0xC0006924, 0xCFC00038, 0xC0006912, 0xCFC00038, 0xC0006966, 0xCFC00038, 0xC0006968, - 0xCFC00078, 0xC000696A, 0xCFC00078, 0xC3C00000, 0xC2800020, 0xC3000000, 0x7F018000, 0x6FF88000, - 0x6FD44000, 0x4395C000, 0x5BB89800, 0x5838000A, 0xCF0000F8, 0x5BFC0002, 0xB7E8FFC8, 0x00000000, - 0xC3C00000, 0xC2800010, 0x6FF86000, 0x47BDC000, 0x5BB89F00, 0xC3400000, 0x58380004, 0xCB420078, - 0x00000000, 0x58380008, 0xCF400078, 0x5BFC0002, 0xB7E8FFB0, 0x00000000, 0xC3C00000, 0xC2800020, - 0xC348001E, 0xC3000000, 0x7F018000, 0x6FF8A000, 0x6FD44000, 0x4795C000, 0x47BDC000, 0x5BB87400, - 0x58380008, 0xCF408418, 0x5838000A, 0xCF0000F8, 0x5BFC0002, 0xB7E8FFB0, 0x00000000, 0x00000000, - 0xC3E0E282, 0x5BFC0030, 0xC0004002, 0xCFC000F8, 0xC000E82C, 0xC11E0002, 0xCD01EF00, 0xC000E82E, - 0xCD01EF00, 0x00000000, 0xC121FFFE, 0x5911FE94, 0x14100000, 0x80000028, 0x00000000, 0x80001CB8, - 0x00000000, 0x8000FFE0, 0xC0006918, 0xD28000F8, 0xC2000000, 0xDF600038, 0x5E600020, 0x84000272, - 0x00000000, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC000402A, 0xCA0000F8, 0xC0006912, - 0xCA4000F8, 0xC0006924, 0xCA8000F8, 0xC0006966, 0xCAC000F8, 0x00000000, 0xC121FFFE, 0x5911FE94, - 0x14100000, 0x76250000, 0x76290000, 0x762D0000, 0x840001CA, 0xC0006918, 0xCA4000F8, 0xC28001FE, - 0x76290000, 0x5A640002, 0x6A254010, 0x5EE80000, 0x8400001A, 0x6AA54000, 0x80000010, 0xC62800F8, - 0x62818008, 0xC0006918, 0xCF0000F8, 0xC161FFFE, 0x5955FFFE, 0x14140000, 0x00000000, 0xC0006966, - 0xCA4000F8, 0xC2000002, 0x6A310000, 0x7E010000, 0x76612000, 0xCE4000F8, 0x00000000, 0xC121FFFE, - 0x5911FE94, 0x14100000, 0x6F346000, 0x4771A000, 0x5B749F00, 0xC2800000, 0x58340006, 0xCA800078, - 0xC2C00000, 0x58340000, 0xCAC000D8, 0xC2400000, 0x5834000A, 0xCA420078, 0x6EA82000, 0x42E9E000, - 0x6F2CA000, 0x42E56000, 0x5AEC3200, 0xC3990040, 0xC7381C18, 0xC6F80060, 0x99005560, 0xDB9800F8, - 0xDBD800F9, 0x00000000, 0xDEA000F8, 0x46310000, 0x8400FD80, 0xC0006958, 0xC84000F8, 0x00000000, - 0xC3C00002, 0x787C2000, 0xCC4000F8, 0xC000ABC8, 0xCB8400F8, 0xC000ABC4, 0xC88400F8, 0x5FB80000, - 0x8400FCFA, 0xC000FAC0, 0xCA0400F8, 0x00000000, 0x00000000, 0xA6040070, 0xC000ABE4, 0xC80400F8, - 0x6C908000, 0x45088000, 0x45088000, 0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0x98C05CD8, - 0xC000697C, 0xCA0000F8, 0x59640004, 0xC0004030, 0xCA0000F8, 0xC2400002, 0x6A452000, 0x76250000, - 0x8400FC3A, 0xC000ABE8, 0xC80400F8, 0x00000000, 0x00000000, 0x40080000, 0xCA0000F8, 0xC42400F8, - 0x00000000, 0xA63C17DA, 0x00000000, 0xC000ABE4, 0xC80400F8, 0x6C908000, 0x45088000, 0x45088000, - 0x40100000, 0xCA0000F8, 0xC42400F8, 0x00000000, 0xC0006934, 0xCE0000F8, 0xC2800002, 0xC4681C08, - 0xC62821D0, 0xC2600010, 0x5A650D80, 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0xC1C00000, - 0x9D000000, 0x58140006, 0xC5D81078, 0xCD821078, 0xC000ABDC, 0xC94000F8, 0xC1820020, 0xC1D00002, - 0x5814AB00, 0xD58000F8, 0x58000002, 0xD58000F9, 0x59540004, 0xB5580018, 0xC000ABDC, 0xC1400000, - 0xCD4000F8, 0xDD9800F9, 0x9D000000, 0xDD9400F8, 0xC000F402, 0xCDC10800, 0xC1C00000, 0xC1800080, - 0x5D980004, 0xDF5D0048, 0x459CA000, 0x8800FFF2, 0xDD8000F9, 0x5800000C, 0x00000000, 0xC94000F9, - 0xC98000F8, 0xC1C00002, 0xC5D43F00, 0xC5D81E00, 0xC000ABDE, 0xC9C000F8, 0x00000000, 0x00000000, - 0x581CAB40, 0x5DC0ABC0, 0x88000012, 0x5C000080, 0xCD4000F8, 0x58000002, 0x5DC0ABC0, 0x88000012, - 0x5C000080, 0xCD8000F8, 0xC000ABDE, 0xC9C000F8, 0x00000000, 0xC15004C0, 0xC5D40060, 0xDD9C00F8, - 0xC5D41C18, 0xC1C00000, 0xDD8000F9, 0x58000030, 0xC9C00078, 0xDD8000F9, 0x58000002, 0xC98000F8, - 0x6DDC2000, 0xC000691C, 0x41D8E000, 0xCD4000F9, 0xCDC000F8, 0xDD9400F9, 0xC1C00000, 0x58140030, - 0xC9C00078, 0xC1800000, 0x58140006, 0xC9820078, 0x00000000, 0x59DC0002, 0x45D8C000, 0x84000010, - 0xC1C00000, 0x9D000000, 0x58140030, 0xC5D80078, 0xCD800078, 0xC1C00000, 0xDF5C0038, 0x5DDC0020, - 0x8400FFEA, 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0xC160FFFE, 0xC000EA10, - 0xC9440070, 0xC1A0FFFE, 0x59983408, 0xC000F00C, 0xCD4000F8, 0xC000F00E, 0xCD8000F8, 0xC0006964, - 0xC98000F8, 0x00000000, 0xC170000A, 0x7158A000, 0x6C988000, 0x4588C000, 0x4588C000, 0x59980004, - 0xC5940270, 0xC000F010, 0xCD4000F8, 0xC0006946, 0xC94000F8, 0x00000000, 0x00000000, 0x6D58A000, - 0x6D5C4000, 0x459CC000, 0x4594C000, 0xC000694A, 0xC94000F8, 0xC0006948, 0xC9C000F8, 0x4194C000, - 0xC1400012, 0xC55C1818, 0x9D000000, 0xC59C0268, 0xC000F012, 0xCDC000F8, 0xC1400000, 0x58000012, - 0xC9410038, 0xC0006950, 0xC9C000F8, 0xC55800F8, 0xC5940838, 0xC5581078, 0xD99400F8, 0xC000693C, - 0xC94000F8, 0xC0006954, 0xC98000F8, 0x59DC00A8, 0x45D4E000, 0x41D8E000, 0x5D5C0030, 0x88000010, - 0xC1C00030, 0xC1800000, 0xC5D84028, 0xC1400000, 0xC5D40008, 0x5DD40002, 0x84000072, 0x5DD40004, - 0x8400009A, 0x5DD40006, 0x840000C2, 0x5DD80026, 0x840000EA, 0xDD5400F8, 0xDD8000F9, 0x58000008, - 0x40180000, 0xCD4000F8, 0x59980002, 0x8000FFC0, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, - 0xCD4000B8, 0x59980002, 0x8000FF88, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400078, - 0x59980002, 0x8000FF50, 0xDD5400F8, 0xDD8000F9, 0x58000008, 0x40180000, 0xCD400038, 0x59980002, - 0x8000FF18, 0x00000000, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, 0x58000012, 0xC94000F8, - 0xC0006954, 0xC9C000F8, 0xC0006950, 0xC9400078, 0xDD8000F9, 0x58000028, 0x5D9C0000, 0x84000052, - 0x5D9C0002, 0x84000052, 0x5D9C0004, 0x8400006A, 0xC55B0038, 0xC55C08B8, 0xCD800039, 0xCDC108B8, - 0x80000060, 0xCD4000F8, 0x80000050, 0xC55900B8, 0xC55C1838, 0xCD8000B9, 0xCDC31838, 0x80000028, - 0xC55A0078, 0xC55C1078, 0xCD800079, 0xCDC21078, 0x9D000000, 0x00000000, 0x00000000, 0x00000000, - 0x59540002, 0x6994E018, 0x61C0C008, 0x4194A000, 0x5D940040, 0x88000012, 0xC59400F8, 0x9D000000, - 0xCD4000F8, 0x00000000, 0x00000000, 0xC000697E, 0xCA4000F8, 0xC0000000, 0xC55800F8, 0xC9D400F9, - 0x00000000, 0x00000000, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, - 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, - 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, - 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, - 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, - 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, - 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, - 0xC52160A0, 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, - 0xC5241550, 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, - 0x79E08000, 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0x79E08000, - 0xCD1800F9, 0xC5D000F8, 0xC9D400F9, 0xC66000F8, 0xC52160A0, 0xC5241550, 0xC000697C, 0x9CC00000, - 0xCE0000F8, 0xC000697E, 0xCE4000F8, 0x9D000000, 0x4158A000, 0xCD4000F8, 0x00000000, -}; - -static u32 firmware_binary_data[] = { -}; - - -#endif // IFXMIPS_ATM_FW_VR9_H - diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_amazon_se.h b/package/system/ltq-dsl/src/ifxmips_atm_ppe_amazon_se.h deleted file mode 100644 index b9ba2c7ebd..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_amazon_se.h +++ /dev/null @@ -1,94 +0,0 @@ -#ifndef IFXMIPS_ATM_PPE_AMAZON_SE_H -#define IFXMIPS_ATM_PPE_AMAZON_SE_H - - - -/* - * FPI Configuration Bus Register and Memory Address Mapping - */ -#define IFX_PPE (KSEG1 | 0x1E180000) -#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2))) -#define PPM_INT_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2))) -#define PP32_INTERNAL_RES_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2))) -#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2))) -#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2))) -#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2))) -#define PPM_INT_UNIT_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2))) -#define PPM_TIMER0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2))) -#define PPM_TASK_IND_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2))) -#define PPS_BRK_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2))) -#define PPM_TIMER1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2))) -#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8200) << 2))) -#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2))) -#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) - -/* - * DWORD-Length of Memory Blocks - */ -#define PP32_DEBUG_REG_DWLEN 0x0030 -#define PPM_INT_REG_DWLEN 0x0010 -#define PP32_INTERNAL_RES_DWLEN 0x00C0 -#define CDM_CODE_MEMORYn_DWLEN(n) ((n) == 0 ? 0x1000 : 0x0800) -#define PPE_REG_DWLEN 0x1000 -#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1) -#define PPM_INT_UNIT_DWLEN 0x0100 -#define PPM_TIMER0_DWLEN 0x0100 -#define PPM_TASK_IND_REG_DWLEN 0x0100 -#define PPS_BRK_DWLEN 0x0100 -#define PPM_TIMER1_DWLEN 0x0100 -#define SB_RAM0_DWLEN 0x0A00 -#define SB_RAM1_DWLEN 0x0A00 -#define QSB_CONF_REG_DWLEN 0x0100 - -/* - * PP32 to FPI Address Mapping - */ -#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x2200) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2200) : \ - (((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2C00) : \ - 0)) - -/* - * PP32 Debug Control Register - */ -#define PP32_DBG_CTRL PP32_DEBUG_REG_ADDR(0, 0x0000) - -#define DBG_CTRL_RESTART 0 -#define DBG_CTRL_STOP 1 - -#define PP32_HALT_STAT PP32_DEBUG_REG_ADDR(0, 0x0D00) -#define PP32_BREAKPOINT_REASONS PP32_DEBUG_REG_ADDR(0, 0x0A00) - -#define PP32_BRK_SRC PP32_DEBUG_REG_ADDR(0, 0x0F00) - -#define PP32_DBG_CUR_PC PP32_DEBUG_REG_ADDR(0, 0x0F80) - -#define PP32_DBG_TASK_NO PP32_DEBUG_REG_ADDR(0, 0x0F81) - -/* - * Share Buffer - */ -#define SB_MST_PRI0 PPE_REG_ADDR(0x0300) -#define SB_MST_PRI1 PPE_REG_ADDR(0x0301) - -/* - * EMA Registers - */ -#define EMA_CMDCFG PPE_REG_ADDR(0x0A00) -#define EMA_DATACFG PPE_REG_ADDR(0x0A01) -#define EMA_CMDCNT PPE_REG_ADDR(0x0A02) -#define EMA_DATACNT PPE_REG_ADDR(0x0A03) -#define EMA_ISR PPE_REG_ADDR(0x0A04) -#define EMA_IER PPE_REG_ADDR(0x0A05) -#define EMA_CFG PPE_REG_ADDR(0x0A06) -#define EMA_SUBID PPE_REG_ADDR(0x0A07) - -#define EMA_ALIGNMENT 4 - -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT (INT_NUM_IM2_IRL0 + 13) - - - -#endif // IFXMIPS_ATM_PPE_AMAZON_SE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_ar9.h b/package/system/ltq-dsl/src/ifxmips_atm_ppe_ar9.h deleted file mode 100644 index 5c5bfa8260..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_ar9.h +++ /dev/null @@ -1,188 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_ppe_ar9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PPE Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_PPE_AR9_H -#define IFXMIPS_ATM_PPE_AR9_H - - - -/* - * FPI Configuration Bus Register and Memory Address Mapping - */ -#define IFX_PPE (KSEG1 | 0x1E180000) -#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2))) -#define PPM_INT_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2))) -#define PP32_INTERNAL_RES_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2))) -#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2))) -#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2))) -#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2))) -#define PPM_INT_UNIT_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2))) -#define PPM_TIMER0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2))) -#define PPM_TASK_IND_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2))) -#define PPS_BRK_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2))) -#define PPM_TIMER1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2))) -#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2))) -#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8800) << 2))) -#define SB_RAM2_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9000) << 2))) -#define SB_RAM3_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9800) << 2))) -#define SB_RAM4_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xA000) << 2))) -#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) - -/* - * DWORD-Length of Memory Blocks - */ -#define PP32_DEBUG_REG_DWLEN 0x0030 -#define PPM_INT_REG_DWLEN 0x0010 -#define PP32_INTERNAL_RES_DWLEN 0x00C0 -#define CDM_CODE_MEMORYn_DWLEN(n) 0x1000 -#define PPE_REG_DWLEN 0x1000 -#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1) -#define PPM_INT_UNIT_DWLEN 0x0100 -#define PPM_TIMER0_DWLEN 0x0100 -#define PPM_TASK_IND_REG_DWLEN 0x0100 -#define PPS_BRK_DWLEN 0x0100 -#define PPM_TIMER1_DWLEN 0x0100 -#define SB_RAM0_DWLEN 0x0800 -#define SB_RAM1_DWLEN 0x0800 -#define SB_RAM2_DWLEN 0x0800 -#define SB_RAM3_DWLEN 0x0800 -#define SB_RAM4_DWLEN 0x0C00 -#define QSB_CONF_REG_DWLEN 0x0100 - -/* - * PP32 to FPI Address Mapping - */ -#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x0FFF)) ? PPE_REG_ADDR((__sb_addr)): \ - (((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x27FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) : \ - (((__sb_addr) >= 0x2800) && ((__sb_addr) <= 0x2FFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2800) : \ - (((__sb_addr) >= 0x3000) && ((__sb_addr) <= 0x37FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x3000) : \ - (((__sb_addr) >= 0x3800) && ((__sb_addr) <= 0x3FFF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3800) : \ - (((__sb_addr) >= 0x4000) && ((__sb_addr) <= 0x4BFF)) ? SB_RAM4_ADDR((__sb_addr) - 0x4000) : \ - 0)) - -/* - * PP32 Debug Control Register - */ -#define NUM_OF_PP32 1 - -#define PP32_DBG_CTRL(n) PP32_DEBUG_REG_ADDR(n, 0x0000) - -#define DBG_CTRL_RESTART 0 -#define DBG_CTRL_STOP 1 - -#define PP32_CTRL_CMD(n) PP32_DEBUG_REG_ADDR(n, 0x0B00) - #define PP32_CTRL_CMD_RESTART (1 << 0) - #define PP32_CTRL_CMD_STOP (1 << 1) - #define PP32_CTRL_CMD_STEP (1 << 2) - #define PP32_CTRL_CMD_BREAKOUT (1 << 3) - -#define PP32_CTRL_OPT(n) PP32_DEBUG_REG_ADDR(n, 0x0C00) - #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON (3 << 0) - #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF (2 << 0) - #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON (3 << 2) - #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2) - #define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON (3 << 4) - #define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF (2 << 4) - #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON (3 << 6) - #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF (2 << 6) - #define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n) (*PP32_CTRL_OPT(n) & (1 << 0)) - #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 2)) - #define PP32_CTRL_OPT_STOP_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 4)) - #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n) (*PP32_CTRL_OPT(n) & (1 << 6)) - -#define PP32_BRK_PC(n, i) PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2) -#define PP32_BRK_PC_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2) -#define PP32_BRK_DATA_ADDR(n, i) PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2) -#define PP32_BRK_DATA_ADDR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2) -#define PP32_BRK_DATA_VALUE_RD(n, i) PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2) -#define PP32_BRK_DATA_VALUE_RD_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2) -#define PP32_BRK_DATA_VALUE_WR(n, i) PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2) -#define PP32_BRK_DATA_VALUE_WR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2) - #define PP32_BRK_CONTEXT_MASK(i) (1 << (i)) - #define PP32_BRK_CONTEXT_MASK_EN (1 << 4) - #define PP32_BRK_COMPARE_GREATER_EQUAL (1 << 5) // valid for break data value rd/wr only - #define PP32_BRK_COMPARE_LOWER_EQUAL (1 << 6) - #define PP32_BRK_COMPARE_EN (1 << 7) - -#define PP32_BRK_TRIG(n) PP32_DEBUG_REG_ADDR(n, 0x0F00) - #define PP32_BRK_GRPi_PCn_ON(i, n) ((3 << ((n) * 2)) << ((i) * 16)) - #define PP32_BRK_GRPi_PCn_OFF(i, n) ((2 << ((n) * 2)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n) ((3 << ((n) * 2 + 4)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n) ((2 << ((n) * 2 + 4)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16)) - #define PP32_BRK_GRPi_PCn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8))) - #define PP32_BRK_GRPi_DATA_ADDRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8))) - #define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8))) - #define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8))) - -#define PP32_CPU_STATUS(n) PP32_DEBUG_REG_ADDR(n, 0x0D00) -#define PP32_HALT_STAT(n) PP32_CPU_STATUS(n) -#define PP32_DBG_CUR_PC(n) PP32_CPU_STATUS(n) - #define PP32_CPU_USER_STOPPED(n) (*PP32_CPU_STATUS(n) & (1 << 0)) - #define PP32_CPU_USER_BREAKIN_RCV(n) (*PP32_CPU_STATUS(n) & (1 << 1)) - #define PP32_CPU_USER_BREAKPOINT_MET(n) (*PP32_CPU_STATUS(n) & (1 << 2)) - #define PP32_CPU_CUR_PC(n) (*PP32_CPU_STATUS(n) >> 16) - -#define PP32_BREAKPOINT_REASONS(n) PP32_DEBUG_REG_ADDR(n, 0x0A00) - #define PP32_BRK_PC_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << (i))) - #define PP32_BRK_DATA_ADDR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2))) - #define PP32_BRK_DATA_VALUE_RD_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4))) - #define PP32_BRK_DATA_VALUE_WR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6))) - #define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8))) - #define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9))) - #define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12))) - #define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13))) - #define PP32_BRK_CUR_CONTEXT(n) ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03) - -#define PP32_GP_REG_BASE(n) PP32_DEBUG_REG_ADDR(n, 0x0E00) -#define PP32_GP_CONTEXTi_REGn(n, i, j) PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j)) - -/* - * EMA Registers - */ -#define EMA_CMDCFG PPE_REG_ADDR(0x0A00) -#define EMA_DATACFG PPE_REG_ADDR(0x0A01) -#define EMA_CMDCNT PPE_REG_ADDR(0x0A02) -#define EMA_DATACNT PPE_REG_ADDR(0x0A03) -#define EMA_ISR PPE_REG_ADDR(0x0A04) -#define EMA_IER PPE_REG_ADDR(0x0A05) -#define EMA_CFG PPE_REG_ADDR(0x0A06) -#define EMA_SUBID PPE_REG_ADDR(0x0A07) - -#define EMA_ALIGNMENT 4 - -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL0 + 24 - - - -#endif // IFXMIPS_ATM_PPE_AR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_common.h b/package/system/ltq-dsl/src/ifxmips_atm_ppe_common.h deleted file mode 100644 index 30b12c80d6..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_common.h +++ /dev/null @@ -1,365 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_ppe_common.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PPE Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_PPE_COMMON_H -#define IFXMIPS_ATM_PPE_COMMON_H -#if defined(CONFIG_DANUBE) - #include "ifxmips_atm_ppe_danube.h" -#elif defined(CONFIG_AMAZON_SE) - #include "ifxmips_atm_ppe_amazon_se.h" -#elif defined(CONFIG_AR9) - #include "ifxmips_atm_ppe_ar9.h" -#elif defined(CONFIG_VR9) - #include "ifxmips_atm_ppe_vr9.h" -#else - #error Platform is not specified! -#endif - - - -/* - * Code/Data Memory (CDM) Interface Configuration Register - */ -#define CDM_CFG PPE_REG_ADDR(0x0100) - -#define CDM_CFG_RAM1 GET_BITS(*CDM_CFG, 3, 2) -#define CDM_CFG_RAM0 (*CDM_CFG & (1 << 1)) - -#define CDM_CFG_RAM1_SET(value) SET_BITS(0, 3, 2, value) -#define CDM_CFG_RAM0_SET(value) ((value) ? (1 << 1) : 0) - -/* - * QSB Internal Cell Delay Variation Register - */ -#define QSB_ICDV QSB_CONF_REG_ADDR(0x0007) - -#define QSB_ICDV_TAU GET_BITS(*QSB_ICDV, 5, 0) - -#define QSB_ICDV_TAU_SET(value) SET_BITS(0, 5, 0, value) - -/* - * QSB Scheduler Burst Limit Register - */ -#define QSB_SBL QSB_CONF_REG_ADDR(0x0009) - -#define QSB_SBL_SBL GET_BITS(*QSB_SBL, 3, 0) - -#define QSB_SBL_SBL_SET(value) SET_BITS(0, 3, 0, value) - -/* - * QSB Configuration Register - */ -#define QSB_CFG QSB_CONF_REG_ADDR(0x000A) - -#define QSB_CFG_TSTEPC GET_BITS(*QSB_CFG, 1, 0) - -#define QSB_CFG_TSTEPC_SET(value) SET_BITS(0, 1, 0, value) - -/* - * QSB RAM Transfer Table Register - */ -#define QSB_RTM QSB_CONF_REG_ADDR(0x000B) - -#define QSB_RTM_DM (*QSB_RTM) - -#define QSB_RTM_DM_SET(value) ((value) & 0xFFFFFFFF) - -/* - * QSB RAM Transfer Data Register - */ -#define QSB_RTD QSB_CONF_REG_ADDR(0x000C) - -#define QSB_RTD_TTV (*QSB_RTD) - -#define QSB_RTD_TTV_SET(value) ((value) & 0xFFFFFFFF) - -/* - * QSB RAM Access Register - */ -#define QSB_RAMAC QSB_CONF_REG_ADDR(0x000D) - -#define QSB_RAMAC_RW (*QSB_RAMAC & (1 << 31)) -#define QSB_RAMAC_TSEL GET_BITS(*QSB_RAMAC, 27, 24) -#define QSB_RAMAC_LH (*QSB_RAMAC & (1 << 16)) -#define QSB_RAMAC_TESEL GET_BITS(*QSB_RAMAC, 9, 0) - -#define QSB_RAMAC_RW_SET(value) ((value) ? (1 << 31) : 0) -#define QSB_RAMAC_TSEL_SET(value) SET_BITS(0, 27, 24, value) -#define QSB_RAMAC_LH_SET(value) ((value) ? (1 << 16) : 0) -#define QSB_RAMAC_TESEL_SET(value) SET_BITS(0, 9, 0, value) - -/* - * QSB Queue Scheduling and Shaping Definitions - */ -#define QSB_WFQ_NONUBR_MAX 0x3f00 -#define QSB_WFQ_UBR_BYPASS 0x3fff -#define QSB_TP_TS_MAX 65472 -#define QSB_TAUS_MAX 64512 -#define QSB_GCR_MIN 18 - -/* - * QSB Constant - */ -#define QSB_RAMAC_RW_READ 0 -#define QSB_RAMAC_RW_WRITE 1 - -#define QSB_RAMAC_TSEL_QPT 0x01 -#define QSB_RAMAC_TSEL_SCT 0x02 -#define QSB_RAMAC_TSEL_SPT 0x03 -#define QSB_RAMAC_TSEL_VBR 0x08 - -#define QSB_RAMAC_LH_LOW 0 -#define QSB_RAMAC_LH_HIGH 1 - -#define QSB_QPT_SET_MASK 0x0 -#define QSB_QVPT_SET_MASK 0x0 -#define QSB_SET_SCT_MASK 0x0 -#define QSB_SET_SPT_MASK 0x0 -#define QSB_SET_SPT_SBVALID_MASK 0x7FFFFFFF - -#define QSB_SPT_SBV_VALID (1 << 31) -#define QSB_SPT_PN_SET(value) (((value) & 0x01) ? (1 << 16) : 0) -#define QSB_SPT_INTRATE_SET(value) SET_BITS(0, 13, 0, value) - -/* - * QSB Queue Parameter Table Entry and Queue VBR Parameter Table Entry - */ -#if defined(__BIG_ENDIAN) - union qsb_queue_parameter_table { - struct { - unsigned int res1 :1; - unsigned int vbr :1; - unsigned int wfqf :14; - unsigned int tp :16; - } bit; - u32 dword; - }; - - union qsb_queue_vbr_parameter_table { - struct { - unsigned int taus :16; - unsigned int ts :16; - } bit; - u32 dword; - }; -#else - union qsb_queue_parameter_table { - struct { - unsigned int tp :16; - unsigned int wfqf :14; - unsigned int vbr :1; - unsigned int res1 :1; - } bit; - u32 dword; - }; - - union qsb_queue_vbr_parameter_table { - struct { - unsigned int ts :16; - unsigned int taus :16; - } bit; - u32 dword; - }; -#endif // defined(__BIG_ENDIAN) - -/* - * Mailbox IGU0 Registers - */ -#define MBOX_IGU0_ISRS PPE_REG_ADDR(0x0200) -#define MBOX_IGU0_ISRC PPE_REG_ADDR(0x0201) -#define MBOX_IGU0_ISR PPE_REG_ADDR(0x0202) -#define MBOX_IGU0_IER PPE_REG_ADDR(0x0203) - -#define MBOX_IGU0_ISRS_SET(n) (1 << (n)) -#define MBOX_IGU0_ISRC_CLEAR(n) (1 << (n)) -#define MBOX_IGU0_ISR_ISR(n) (*MBOX_IGU0_ISR & (1 << (n))) -#define MBOX_IGU0_IER_EN(n) (*MBOX_IGU0_IER & (1 << (n))) -#define MBOX_IGU0_IER_EN_SET(n) (1 << (n)) - -/* - * Mailbox IGU1 Registers - */ -#define MBOX_IGU1_ISRS PPE_REG_ADDR(0x0204) -#define MBOX_IGU1_ISRC PPE_REG_ADDR(0x0205) -#define MBOX_IGU1_ISR PPE_REG_ADDR(0x0206) -#define MBOX_IGU1_IER PPE_REG_ADDR(0x0207) - -#define MBOX_IGU1_ISRS_SET(n) (1 << (n)) -#define MBOX_IGU1_ISRC_CLEAR(n) (1 << (n)) -#define MBOX_IGU1_ISR_ISR(n) (*MBOX_IGU1_ISR & (1 << (n))) -#define MBOX_IGU1_IER_EN(n) (*MBOX_IGU1_IER & (1 << (n))) -#define MBOX_IGU1_IER_EN_SET(n) (1 << (n)) - -/* - * Mailbox IGU3 Registers - */ -#define MBOX_IGU3_ISRS PPE_REG_ADDR(0x0214) -#define MBOX_IGU3_ISRC PPE_REG_ADDR(0x0215) -#define MBOX_IGU3_ISR PPE_REG_ADDR(0x0216) -#define MBOX_IGU3_IER PPE_REG_ADDR(0x0217) - -#define MBOX_IGU3_ISRS_SET(n) (1 << (n)) -#define MBOX_IGU3_ISRC_CLEAR(n) (1 << (n)) -#define MBOX_IGU3_ISR_ISR(n) (*MBOX_IGU3_ISR & (1 << (n))) -#define MBOX_IGU3_IER_EN(n) (*MBOX_IGU3_IER & (1 << (n))) -#define MBOX_IGU3_IER_EN_SET(n) (1 << (n)) - -/* - * RTHA/TTHA Registers - */ -#define RFBI_CFG PPE_REG_ADDR(0x0400) -#define RBA_CFG0 PPE_REG_ADDR(0x0404) -#define RBA_CFG1 PPE_REG_ADDR(0x0405) -#define RCA_CFG0 PPE_REG_ADDR(0x0408) -#define RCA_CFG1 PPE_REG_ADDR(0x0409) -#define RDES_CFG0 PPE_REG_ADDR(0x040C) -#define RDES_CFG1 PPE_REG_ADDR(0x040D) -#define SFSM_STATE0 PPE_REG_ADDR(0x0410) -#define SFSM_STATE1 PPE_REG_ADDR(0x0411) -#define SFSM_DBA0 PPE_REG_ADDR(0x0412) -#define SFSM_DBA1 PPE_REG_ADDR(0x0413) -#define SFSM_CBA0 PPE_REG_ADDR(0x0414) -#define SFSM_CBA1 PPE_REG_ADDR(0x0415) -#define SFSM_CFG0 PPE_REG_ADDR(0x0416) -#define SFSM_CFG1 PPE_REG_ADDR(0x0417) -#define SFSM_PGCNT0 PPE_REG_ADDR(0x041C) -#define SFSM_PGCNT1 PPE_REG_ADDR(0x041D) -#define FFSM_DBA0 PPE_REG_ADDR(0x0508) -#define FFSM_DBA1 PPE_REG_ADDR(0x0509) -#define FFSM_CFG0 PPE_REG_ADDR(0x050A) -#define FFSM_CFG1 PPE_REG_ADDR(0x050B) -#define FFSM_IDLE_HEAD_BC0 PPE_REG_ADDR(0x050E) -#define FFSM_IDLE_HEAD_BC1 PPE_REG_ADDR(0x050F) -#define FFSM_PGCNT0 PPE_REG_ADDR(0x0514) -#define FFSM_PGCNT1 PPE_REG_ADDR(0x0515) - -/* - * PPE TC Logic Registers (partial) - */ -#define DREG_A_VERSION PPE_REG_ADDR(0x0D00) -#define DREG_A_CFG PPE_REG_ADDR(0x0D01) -#define DREG_AT_CTRL PPE_REG_ADDR(0x0D02) -#define DREG_AT_CB_CFG0 PPE_REG_ADDR(0x0D03) -#define DREG_AT_CB_CFG1 PPE_REG_ADDR(0x0D04) -#define DREG_AR_CTRL PPE_REG_ADDR(0x0D08) -#define DREG_AR_CB_CFG0 PPE_REG_ADDR(0x0D09) -#define DREG_AR_CB_CFG1 PPE_REG_ADDR(0x0D0A) -#define DREG_A_UTPCFG PPE_REG_ADDR(0x0D0E) -#define DREG_A_STATUS PPE_REG_ADDR(0x0D0F) -#define DREG_AT_CFG0 PPE_REG_ADDR(0x0D20) -#define DREG_AT_CFG1 PPE_REG_ADDR(0x0D21) -#define DREG_AT_FB_SIZE0 PPE_REG_ADDR(0x0D22) -#define DREG_AT_FB_SIZE1 PPE_REG_ADDR(0x0D23) -#define DREG_AT_CELL0 PPE_REG_ADDR(0x0D24) -#define DREG_AT_CELL1 PPE_REG_ADDR(0x0D25) -#define DREG_AT_IDLE_CNT0 PPE_REG_ADDR(0x0D26) -#define DREG_AT_IDLE_CNT1 PPE_REG_ADDR(0x0D27) -#define DREG_AT_IDLE0 PPE_REG_ADDR(0x0D28) -#define DREG_AT_IDLE1 PPE_REG_ADDR(0x0D29) -#define DREG_AR_CFG0 PPE_REG_ADDR(0x0D60) -#define DREG_AR_CFG1 PPE_REG_ADDR(0x0D61) -#define DREG_AR_CELL0 PPE_REG_ADDR(0x0D68) -#define DREG_AR_CELL1 PPE_REG_ADDR(0x0D69) -#define DREG_AR_IDLE_CNT0 PPE_REG_ADDR(0x0D6A) -#define DREG_AR_IDLE_CNT1 PPE_REG_ADDR(0x0D6B) -#define DREG_AR_AIIDLE_CNT0 PPE_REG_ADDR(0x0D6C) -#define DREG_AR_AIIDLE_CNT1 PPE_REG_ADDR(0x0D6D) -#define DREG_AR_BE_CNT0 PPE_REG_ADDR(0x0D6E) -#define DREG_AR_BE_CNT1 PPE_REG_ADDR(0x0D6F) -#define DREG_AR_HEC_CNT0 PPE_REG_ADDR(0x0D70) -#define DREG_AR_HEC_CNT1 PPE_REG_ADDR(0x0D71) -#define DREG_AR_IDLE0 PPE_REG_ADDR(0x0D74) -#define DREG_AR_IDLE1 PPE_REG_ADDR(0x0D75) -#define DREG_AR_CVN_CNT0 PPE_REG_ADDR(0x0DA4) -#define DREG_AR_CVN_CNT1 PPE_REG_ADDR(0x0DA5) -#define DREG_AR_CVNP_CNT0 PPE_REG_ADDR(0x0DA6) -#define DREG_AR_CVNP_CNT1 PPE_REG_ADDR(0x0DA7) -#define DREG_B0_LADR PPE_REG_ADDR(0x0DA8) -#define DREG_B1_LADR PPE_REG_ADDR(0x0DA9) - -#define SFSM_DBA(i) ( (SFSM_dba * ) PPE_REG_ADDR(0x0412 + (i))) -#define SFSM_CBA(i) ( (SFSM_cba * ) PPE_REG_ADDR(0x0414 + (i))) -#define SFSM_CFG(i) ( (SFSM_cfg * ) PPE_REG_ADDR(0x0416 + (i))) -#define SFSM_PGCNT(i) ( (SFSM_pgcnt * ) PPE_REG_ADDR(0x041C + (i))) - -#define FFSM_DBA(i) ( (FFSM_dba * ) PPE_REG_ADDR(0x0508 + (i))) -#define FFSM_CFG(i) ( (FFSM_cfg * ) PPE_REG_ADDR(0x050A + (i))) -#define FFSM_PGCNT(i) ( (FFSM_pgcnt * ) PPE_REG_ADDR(0x0514 + (i))) - -typedef struct { - unsigned int res : 19; - unsigned int dbase : 13; -} SFSM_dba; - -typedef struct { - unsigned int res : 19; - unsigned int cbase : 13; -} SFSM_cba; - -typedef struct { - unsigned int res : 15; - unsigned int endian : 1; - unsigned int idlekeep: 1; - unsigned int sen : 1; - unsigned int res1 : 8; - unsigned int pnum : 6; -} SFSM_cfg; - -typedef struct { - unsigned int res : 17; - unsigned int pptr : 6; - unsigned int dcmd : 1; - unsigned int res1 : 2; - unsigned int upage : 6; -} SFSM_pgcnt; - -typedef struct { - unsigned int res : 19; - unsigned int dbase : 13; -} FFSM_dba; - -typedef struct { - unsigned int res : 12; - unsigned int rstptr : 1; - unsigned int clvpage : 1; - unsigned int fidle : 1; - unsigned int endian : 1; - unsigned int res1 : 10; - unsigned int pnum : 6; -} FFSM_cfg; - -typedef struct { - unsigned int res : 17; - unsigned int ival : 6; - unsigned int icmd : 1; - unsigned int res1 : 2; - unsigned int vpage : 6; -} FFSM_pgcnt; - - - -#endif // IFXMIPS_ATM_PPE_COMMON_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_danube.h b/package/system/ltq-dsl/src/ifxmips_atm_ppe_danube.h deleted file mode 100644 index 58db3a7460..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_danube.h +++ /dev/null @@ -1,130 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_ppe_danube.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PPE Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_PPE_DANUBE_H -#define IFXMIPS_ATM_PPE_DANUBE_H - -#include <lantiq.h> - -/* - * FPI Configuration Bus Register and Memory Address Mapping - */ -#define IFX_PPE (KSEG1 | 0x1E180000) -#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0000) << 2))) -#define PPM_INT_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0030) << 2))) -#define PP32_INTERNAL_RES_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x0040) << 2))) -#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x1000) << 2))) -#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x4000) << 2))) -#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x5000) << 2))) -#define PPM_INT_UNIT_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6000) << 2))) -#define PPM_TIMER0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6100) << 2))) -#define PPM_TASK_IND_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6200) << 2))) -#define PPS_BRK_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6300) << 2))) -#define PPM_TIMER1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x6400) << 2))) -#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8000) << 2))) -#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8400) << 2))) -#define SB_RAM2_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x8C00) << 2))) -#define SB_RAM3_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x9600) << 2))) -#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) - -/* - * DWORD-Length of Memory Blocks - */ -#define PP32_DEBUG_REG_DWLEN 0x0030 -#define PPM_INT_REG_DWLEN 0x0010 -#define PP32_INTERNAL_RES_DWLEN 0x00C0 -#define CDM_CODE_MEMORYn_DWLEN(n) ((n) == 0 ? 0x1000 : 0x0800) -#define PPE_REG_DWLEN 0x1000 -#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1) -#define PPM_INT_UNIT_DWLEN 0x0100 -#define PPM_TIMER0_DWLEN 0x0100 -#define PPM_TASK_IND_REG_DWLEN 0x0100 -#define PPS_BRK_DWLEN 0x0100 -#define PPM_TIMER1_DWLEN 0x0100 -#define SB_RAM0_DWLEN 0x0400 -#define SB_RAM1_DWLEN 0x0800 -#define SB_RAM2_DWLEN 0x0A00 -#define SB_RAM3_DWLEN 0x0400 -#define QSB_CONF_REG_DWLEN 0x0100 - -/* - * PP32 to FPI Address Mapping - */ -#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x23FF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) : \ - (((__sb_addr) >= 0x2400) && ((__sb_addr) <= 0x2BFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x2400) : \ - (((__sb_addr) >= 0x2C00) && ((__sb_addr) <= 0x35FF)) ? SB_RAM2_ADDR((__sb_addr) - 0x2C00) : \ - (((__sb_addr) >= 0x3600) && ((__sb_addr) <= 0x39FF)) ? SB_RAM3_ADDR((__sb_addr) - 0x3600) : \ - 0)) - -/* - * PP32 Debug Control Register - */ -#define PP32_DBG_CTRL PP32_DEBUG_REG_ADDR(0, 0x0000) - -#define DBG_CTRL_START_SET(value) ((value) ? (1 << 0) : 0) -#define DBG_CTRL_STOP_SET(value) ((value) ? (1 << 1) : 0) -#define DBG_CTRL_STEP_SET(value) ((value) ? (1 << 2) : 0) - -#define PP32_HALT_STAT PP32_DEBUG_REG_ADDR(0, 0x0001) - -#define PP32_BRK_SRC PP32_DEBUG_REG_ADDR(0, 0x0002) - -#define PP32_DBG_PC_MIN(i) PP32_DEBUG_REG_ADDR(0, 0x0010 + (i)) -#define PP32_DBG_PC_MAX(i) PP32_DEBUG_REG_ADDR(0, 0x0014 + (i)) -#define PP32_DBG_DATA_MIN(i) PP32_DEBUG_REG_ADDR(0, 0x0018 + (i)) -#define PP32_DBG_DATA_MAX(i) PP32_DEBUG_REG_ADDR(0, 0x001A + (i)) -#define PP32_DBG_DATA_VAL(i) PP32_DEBUG_REG_ADDR(0, 0x001C + (i)) - -#define PP32_DBG_CUR_PC PP32_DEBUG_REG_ADDR(0, 0x0080) - -#define PP32_DBG_TASK_NO PP32_DEBUG_REG_ADDR(0, 0x0081) - -#define PP32_DBG_REG_BASE(tsk, i) PP32_DEBUG_REG_ADDR(0, 0x0100 + (tsk) * 16 + (i)) - -/* - * EMA Registers - */ -#define EMA_CMDCFG PPE_REG_ADDR(0x0A00) -#define EMA_DATACFG PPE_REG_ADDR(0x0A01) -#define EMA_CMDCNT PPE_REG_ADDR(0x0A02) -#define EMA_DATACNT PPE_REG_ADDR(0x0A03) -#define EMA_ISR PPE_REG_ADDR(0x0A04) -#define EMA_IER PPE_REG_ADDR(0x0A05) -#define EMA_CFG PPE_REG_ADDR(0x0A06) -#define EMA_SUBID PPE_REG_ADDR(0x0A07) - -#define EMA_ALIGNMENT 4 - -/* - * Mailbox IGU1 Interrupt - */ -#define LTQ_PPE_MBOX_INT (INT_NUM_IM2_IRL0 + 24) -#define PPE_MAILBOX_IGU1_INT LTQ_PPE_MBOX_INT - - - -#endif // IFXMIPS_ATM_PPE_DANUBE_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_ppe_vr9.h b/package/system/ltq-dsl/src/ifxmips_atm_ppe_vr9.h deleted file mode 100644 index 316a772858..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_ppe_vr9.h +++ /dev/null @@ -1,192 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_ppe_vr9.h -** PROJECT : UEIP -** MODULES : ATM (ADSL) -** -** DATE : 1 AUG 2005 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM Driver (PPE Registers) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 4 AUG 2005 Xu Liang Initiate Version -** 23 OCT 2006 Xu Liang Add GPL header. -** 9 JAN 2007 Xu Liang First version got from Anand (IC designer) -*******************************************************************************/ - - - -#ifndef IFXMIPS_ATM_PPE_VR9_H -#define IFXMIPS_ATM_PPE_VR9_H - - - -/* - * FPI Configuration Bus Register and Memory Address Mapping - */ -#define IFX_PPE (KSEG1 | 0x1E200000) -#define PP32_DEBUG_REG_ADDR(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x000000 + (i) * 0x00010000) << 2))) -#define CDM_CODE_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x001000 + (i) * 0x00010000) << 2))) -#define CDM_DATA_MEMORY(i, x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x004000 + (i) * 0x00010000) << 2))) -#define SB_RAM0_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x008000) << 2))) -#define SB_RAM1_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x009000) << 2))) -#define SB_RAM2_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00A000) << 2))) -#define SB_RAM3_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00B000) << 2))) -#define PPE_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00D000) << 2))) -#define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00E000) << 2))) -#define SB_RAM6_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x018000) << 2))) - -/* - * DWORD-Length of Memory Blocks - */ -#define PP32_DEBUG_REG_DWLEN 0x0030 -#define CDM_CODE_MEMORYn_DWLEN(n) ((n) == 0 ? 0x1000 : 0x0800) -#define CDM_DATA_MEMORY_DWLEN CDM_CODE_MEMORYn_DWLEN(1) -#define SB_RAM0_DWLEN 0x1000 -#define SB_RAM1_DWLEN 0x1000 -#define SB_RAM2_DWLEN 0x1000 -#define SB_RAM3_DWLEN 0x1000 -#define SB_RAM6_DWLEN 0x8000 -#define QSB_CONF_REG_DWLEN 0x0100 - -/* - * PP32 to FPI Address Mapping - */ -#define SB_BUFFER(__sb_addr) ((volatile unsigned int *)((((__sb_addr) >= 0x0000) && ((__sb_addr) <= 0x1FFF)) ? PPE_REG_ADDR((__sb_addr)) : \ - (((__sb_addr) >= 0x2000) && ((__sb_addr) <= 0x2FFF)) ? SB_RAM0_ADDR((__sb_addr) - 0x2000) : \ - (((__sb_addr) >= 0x3000) && ((__sb_addr) <= 0x3FFF)) ? SB_RAM1_ADDR((__sb_addr) - 0x3000) : \ - (((__sb_addr) >= 0x4000) && ((__sb_addr) <= 0x4FFF)) ? SB_RAM2_ADDR((__sb_addr) - 0x4000) : \ - (((__sb_addr) >= 0x5000) && ((__sb_addr) <= 0x5FFF)) ? SB_RAM3_ADDR((__sb_addr) - 0x5000) : \ - (((__sb_addr) >= 0x7000) && ((__sb_addr) <= 0x7FFF)) ? PPE_REG_ADDR((__sb_addr) - 0x7000) : \ - (((__sb_addr) >= 0x8000) && ((__sb_addr) <= 0xFFFF)) ? SB_RAM6_ADDR((__sb_addr) - 0x8000) : \ - 0)) - -/* - * PP32 Debug Control Register - */ -#define NUM_OF_PP32 2 - -#define PP32_FREEZE PPE_REG_ADDR(0x0000) -#define PP32_SRST PPE_REG_ADDR(0x0020) - -#define PP32_DBG_CTRL(n) PP32_DEBUG_REG_ADDR(n, 0x0000) - -#define DBG_CTRL_RESTART 0 -#define DBG_CTRL_STOP 1 - -#define PP32_CTRL_CMD(n) PP32_DEBUG_REG_ADDR(n, 0x0B00) - #define PP32_CTRL_CMD_RESTART (1 << 0) - #define PP32_CTRL_CMD_STOP (1 << 1) - #define PP32_CTRL_CMD_STEP (1 << 2) - #define PP32_CTRL_CMD_BREAKOUT (1 << 3) - -#define PP32_CTRL_OPT(n) PP32_DEBUG_REG_ADDR(n, 0x0C00) - #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_ON (3 << 0) - #define PP32_CTRL_OPT_BREAKOUT_ON_STOP_OFF (2 << 0) - #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_ON (3 << 2) - #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN_OFF (2 << 2) - #define PP32_CTRL_OPT_STOP_ON_BREAKIN_ON (3 << 4) - #define PP32_CTRL_OPT_STOP_ON_BREAKIN_OFF (2 << 4) - #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_ON (3 << 6) - #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT_OFF (2 << 6) - #define PP32_CTRL_OPT_BREAKOUT_ON_STOP(n) (*PP32_CTRL_OPT(n) & (1 << 0)) - #define PP32_CTRL_OPT_BREAKOUT_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 2)) - #define PP32_CTRL_OPT_STOP_ON_BREAKIN(n) (*PP32_CTRL_OPT(n) & (1 << 4)) - #define PP32_CTRL_OPT_STOP_ON_BREAKPOINT(n) (*PP32_CTRL_OPT(n) & (1 << 6)) - -#define PP32_BRK_PC(n, i) PP32_DEBUG_REG_ADDR(n, 0x0900 + (i) * 2) -#define PP32_BRK_PC_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0901 + (i) * 2) -#define PP32_BRK_DATA_ADDR(n, i) PP32_DEBUG_REG_ADDR(n, 0x0904 + (i) * 2) -#define PP32_BRK_DATA_ADDR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0905 + (i) * 2) -#define PP32_BRK_DATA_VALUE_RD(n, i) PP32_DEBUG_REG_ADDR(n, 0x0908 + (i) * 2) -#define PP32_BRK_DATA_VALUE_RD_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x0909 + (i) * 2) -#define PP32_BRK_DATA_VALUE_WR(n, i) PP32_DEBUG_REG_ADDR(n, 0x090C + (i) * 2) -#define PP32_BRK_DATA_VALUE_WR_MASK(n, i) PP32_DEBUG_REG_ADDR(n, 0x090D + (i) * 2) - #define PP32_BRK_CONTEXT_MASK(i) (1 << (i)) - #define PP32_BRK_CONTEXT_MASK_EN (1 << 4) - #define PP32_BRK_COMPARE_GREATER_EQUAL (1 << 5) // valid for break data value rd/wr only - #define PP32_BRK_COMPARE_LOWER_EQUAL (1 << 6) - #define PP32_BRK_COMPARE_EN (1 << 7) - -#define PP32_BRK_TRIG(n) PP32_DEBUG_REG_ADDR(n, 0x0F00) - #define PP32_BRK_GRPi_PCn_ON(i, n) ((3 << ((n) * 2)) << ((i) * 16)) - #define PP32_BRK_GRPi_PCn_OFF(i, n) ((2 << ((n) * 2)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_ADDRn_ON(i, n) ((3 << ((n) * 2 + 4)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_ADDRn_OFF(i, n) ((2 << ((n) * 2 + 4)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_RDn_ON(i, n) ((3 << ((n) * 2 + 8)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_RDn_OFF(i, n)((2 << ((n) * 2 + 8)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_WRn_ON(i, n) ((3 << ((n) * 2 + 12)) << ((i) * 16)) - #define PP32_BRK_GRPi_DATA_VALUE_WRn_OFF(i, n)((2 << ((n) * 2 + 12)) << ((i) * 16)) - #define PP32_BRK_GRPi_PCn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n))) << ((i) * 8))) - #define PP32_BRK_GRPi_DATA_ADDRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 2)) << ((i) * 8))) - #define PP32_BRK_GRPi_DATA_VALUE_RDn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 4)) << ((i) * 8))) - #define PP32_BRK_GRPi_DATA_VALUE_WRn(k, i, n) (*PP32_BRK_TRIG(k) & ((1 << ((n) + 6)) << ((i) * 8))) - -#define PP32_CPU_STATUS(n) PP32_DEBUG_REG_ADDR(n, 0x0D00) -#define PP32_HALT_STAT(n) PP32_CPU_STATUS(n) -#define PP32_DBG_CUR_PC(n) PP32_CPU_STATUS(n) - #define PP32_CPU_USER_STOPPED(n) (*PP32_CPU_STATUS(n) & (1 << 0)) - #define PP32_CPU_USER_BREAKIN_RCV(n) (*PP32_CPU_STATUS(n) & (1 << 1)) - #define PP32_CPU_USER_BREAKPOINT_MET(n) (*PP32_CPU_STATUS(n) & (1 << 2)) - #define PP32_CPU_CUR_PC(n) (*PP32_CPU_STATUS(n) >> 16) - -#define PP32_BREAKPOINT_REASONS(n) PP32_DEBUG_REG_ADDR(n, 0x0A00) - #define PP32_BRK_PC_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << (i))) - #define PP32_BRK_DATA_ADDR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 2))) - #define PP32_BRK_DATA_VALUE_RD_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 4))) - #define PP32_BRK_DATA_VALUE_WR_MET(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) + 6))) - #define PP32_BRK_DATA_VALUE_RD_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 8))) - #define PP32_BRK_DATA_VALUE_RD_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 9))) - #define PP32_BRK_DATA_VALUE_WR_LO_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 12))) - #define PP32_BRK_DATA_VALUE_WR_GT_EQ(n, i) (*PP32_BREAKPOINT_REASONS(n) & (1 << ((i) * 2 + 13))) - #define PP32_BRK_CUR_CONTEXT(n) ((*PP32_BREAKPOINT_REASONS(n) >> 16) & 0x03) - -#define PP32_GP_REG_BASE(n) PP32_DEBUG_REG_ADDR(n, 0x0E00) -#define PP32_GP_CONTEXTi_REGn(n, i, j) PP32_DEBUG_REG_ADDR(n, 0x0E00 + (i) * 16 + (j)) - -/* - * PDMA/EMA Registers - */ -#define PDMA_CFG PPE_REG_ADDR(0x0A00) -#define PDMA_RX_CMDCNT PPE_REG_ADDR(0x0A01) -#define PDMA_TX_CMDCNT PPE_REG_ADDR(0x0A02) -#define PDMA_RX_FWDATACNT PPE_REG_ADDR(0x0A03) -#define PDMA_TX_FWDATACNT PPE_REG_ADDR(0x0A04) -#define PDMA_RX_CTX_CFG PPE_REG_ADDR(0x0A05) -#define PDMA_TX_CTX_CFG PPE_REG_ADDR(0x0A06) -#define PDMA_RX_MAX_LEN_REG PPE_REG_ADDR(0x0A07) -#define PDMA_RX_DELAY_CFG PPE_REG_ADDR(0x0A08) -#define PDMA_INT_FIFO_RD PPE_REG_ADDR(0x0A09) -#define PDMA_ISR PPE_REG_ADDR(0x0A0A) -#define PDMA_IER PPE_REG_ADDR(0x0A0B) -#define PDMA_SUBID PPE_REG_ADDR(0x0A0C) -#define PDMA_BAR0 PPE_REG_ADDR(0x0A0D) -#define PDMA_BAR1 PPE_REG_ADDR(0x0A0E) - -#define SAR_PDMA_RX_CMDBUF_CFG PPE_REG_ADDR(0x0F00) -#define SAR_PDMA_TX_CMDBUF_CFG PPE_REG_ADDR(0x0F01) -#define SAR_PDMA_RX_FW_CMDBUF_CFG PPE_REG_ADDR(0x0F02) -#define SAR_PDMA_TX_FW_CMDBUF_CFG PPE_REG_ADDR(0x0F03) -#define SAR_PDMA_RX_CMDBUF_STATUS PPE_REG_ADDR(0x0F04) -#define SAR_PDMA_TX_CMDBUF_STATUS PPE_REG_ADDR(0x0F05) - -#define PDMA_ALIGNMENT 4 -#define EMA_ALIGNMENT PDMA_ALIGNMENT - -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL0 + 24 - - - -#endif // IFXMIPS_ATM_PPE_VR9_H diff --git a/package/system/ltq-dsl/src/ifxmips_atm_vr9.c b/package/system/ltq-dsl/src/ifxmips_atm_vr9.c deleted file mode 100644 index ea84c4c83f..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_atm_vr9.c +++ /dev/null @@ -1,303 +0,0 @@ -/****************************************************************************** -** -** FILE NAME : ifxmips_atm_vr9.c -** PROJECT : UEIP -** MODULES : ATM -** -** DATE : 7 Jul 2009 -** AUTHOR : Xu Liang -** DESCRIPTION : ATM driver common source file (core functions) -** COPYRIGHT : Copyright (c) 2006 -** Infineon Technologies AG -** Am Campeon 1-12, 85579 Neubiberg, Germany -** -** This program is free software; you can redistribute it and/or modify -** it under the terms of the GNU General Public License as published by -** the Free Software Foundation; either version 2 of the License, or -** (at your option) any later version. -** -** HISTORY -** $Date $Author $Comment -** 07 JUL 2009 Xu Liang Init Version -*******************************************************************************/ - - - -/* - * #################################### - * Head File - * #################################### - */ - -/* - * Common Head File - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioctl.h> -#include <asm/delay.h> - -/* - * Chip Specific Head File - */ -#include <ifx_types.h> -#include <ifx_regs.h> -#include <common_routines.h> -#include <ifx_pmu.h> -#include <ifx_rcu.h> -#include "ifxmips_atm_core.h" -#include "ifxmips_atm_fw_vr9.h" - - - -/* - * #################################### - * Definition - * #################################### - */ - - - -/* - * #################################### - * Declaration - * #################################### - */ - -/* - * Hardware Init/Uninit Functions - */ -static inline void init_pmu(void); -static inline void uninit_pmu(void); -static inline void reset_ppe(void); -static inline void init_pdma(void); -static inline void init_mailbox(void); -static inline void init_atm_tc(void); -static inline void clear_share_buffer(void); - - - -/* - * #################################### - * Local Variable - * #################################### - */ - - - -/* - * #################################### - * Local Function - * #################################### - */ - -static inline void init_pmu(void) -{ - //*PMU_PWDCR &= ~((1 << 29) | (1 << 22) | (1 << 21) | (1 << 19) | (1 << 18)); - //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE); - PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TC_PMU_SETUP(IFX_PMU_ENABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE); -} - -static inline void uninit_pmu(void) -{ - PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TC_PMU_SETUP(IFX_PMU_DISABLE); - PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE); - PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE); - PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE); - DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE); - //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE); -} - -static inline void reset_ppe(void) -{ -#ifdef MODULE - // reset PPE - ifx_rcu_rst(IFX_RCU_DOMAIN_DSLDFE, IFX_RCU_MODULE_ATM); - udelay(1000); - ifx_rcu_rst(IFX_RCU_DOMAIN_DSLTC, IFX_RCU_MODULE_ATM); - udelay(1000); - ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); - udelay(1000); - *PP32_SRST &= ~0x000303CF; - udelay(1000); - *PP32_SRST |= 0x000303CF; - udelay(1000); -#endif -} - -static inline void init_pdma(void) -{ - IFX_REG_W32(0x08, PDMA_CFG); - IFX_REG_W32(0x00203580, SAR_PDMA_RX_CMDBUF_CFG); - IFX_REG_W32(0x004035A0, SAR_PDMA_RX_FW_CMDBUF_CFG); -} - -static inline void init_mailbox(void) -{ - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU1_IER); - IFX_REG_W32(0xFFFFFFFF, MBOX_IGU3_ISRC); - IFX_REG_W32(0x00000000, MBOX_IGU3_IER); -} - -static inline void init_atm_tc(void) -{ - /* clear sync state */ - *SFSM_STATE0 = 0; - *SFSM_STATE1 = 0; - - /* enable keep IDLE */ -// *SFSM_CFG0 |= 1 << 15; -// *SFSM_CFG1 |= 1 << 15; -} - -static inline void clear_share_buffer(void) -{ - volatile u32 *p; - unsigned int i; - - p = SB_RAM0_ADDR(0); - for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ ) - IFX_REG_W32(0, p++); - - p = SB_RAM6_ADDR(0); - for ( i = 0; i < SB_RAM6_DWLEN; i++ ) - IFX_REG_W32(0, p++); -} - -/* - * Description: - * Download PPE firmware binary code. - * Input: - * pp32 --- int, which pp32 core - * src --- u32 *, binary code buffer - * dword_len --- unsigned int, binary code length in DWORD (32-bit) - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -static inline int pp32_download_code(int pp32, u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len) -{ - unsigned int clr, set; - volatile u32 *dest; - - if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0 - || data_src == 0 || ((unsigned long)data_src & 0x03) != 0 ) - return IFX_ERROR; - - clr = pp32 ? 0xF0 : 0x0F; - if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) ) - set = pp32 ? (3 << 6): (2 << 2); - else - set = 0x00; - IFX_REG_W32_MASK(clr, set, CDM_CFG); - - /* copy code */ - dest = CDM_CODE_MEMORY(pp32, 0); - while ( code_dword_len-- > 0 ) - IFX_REG_W32(*code_src++, dest++); - - /* copy data */ - dest = CDM_DATA_MEMORY(pp32, 0); - while ( data_dword_len-- > 0 ) - IFX_REG_W32(*data_src++, dest++); - - return IFX_SUCCESS; -} - - - -/* - * #################################### - * Global Function - * #################################### - */ - -extern void ifx_atm_get_fw_ver(unsigned int *major, unsigned int *minor) -{ - ASSERT(major != NULL, "pointer is NULL"); - ASSERT(minor != NULL, "pointer is NULL"); - -#ifdef VER_IN_FIRMWARE - *major = FW_VER_ID->major; - *minor = FW_VER_ID->minor; -#else - *major = ATM_FW_VER_MAJOR; - *minor = ATM_FW_VER_MINOR; -#endif -} - -void ifx_atm_init_chip(void) -{ - init_pmu(); - - reset_ppe(); - - init_pdma(); - - init_mailbox(); - - init_atm_tc(); - - clear_share_buffer(); -} - -void ifx_atm_uninit_chip(void) -{ - uninit_pmu(); -} - -/* - * Description: - * Initialize and start up PP32. - * Input: - * none - * Output: - * int --- IFX_SUCCESS: Success - * else: Error Code - */ -int ifx_pp32_start(int pp32) -{ - unsigned int mask = 1 << (pp32 << 4); - int ret; - - /* download firmware */ - ret = pp32_download_code(pp32, firmware_binary_code, sizeof(firmware_binary_code) / sizeof(*firmware_binary_code), firmware_binary_data, sizeof(firmware_binary_data) / sizeof(*firmware_binary_data)); - if ( ret != IFX_SUCCESS ) - return ret; - - /* run PP32 */ - IFX_REG_W32_MASK(mask, 0, PP32_FREEZE); - - /* idle for a while to let PP32 init itself */ - udelay(10); - - return IFX_SUCCESS; -} - -/* - * Description: - * Halt PP32. - * Input: - * none - * Output: - * none - */ -void ifx_pp32_stop(int pp32) -{ - unsigned int mask = 1 << (pp32 << 4); - - /* halt PP32 */ - IFX_REG_W32_MASK(0, mask, PP32_FREEZE); -} diff --git a/package/system/ltq-dsl/src/ifxmips_compat.h b/package/system/ltq-dsl/src/ifxmips_compat.h deleted file mode 100644 index b0c9f25f48..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_compat.h +++ /dev/null @@ -1,56 +0,0 @@ -#ifndef _IFXMIPS_COMPAT_H__ -#define _IFXMIPS_COMPAT_H__ - -#define IFX_SUCCESS 0 -#define IFX_ERROR (-1) - -#define ATM_VBR_NRT ATM_VBR -#define ATM_VBR_RT 6 -#define ATM_UBR_PLUS 7 -#define ATM_GFR 8 - -#define NUM_ENTITY(x) (sizeof(x) / sizeof(*(x))) - -#define SET_BITS(x, msb, lsb, value) \ - (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb))) - - -#define IFX_PP32_ETOP_CFG 0x16020 -#define IFX_PP32_ETOP_MDIO_CFG 0x11804 -#define IFX_PP32_ETOP_IG_PLEN_CTRL 0x16080 -#define IFX_PP32_ENET_MAC_CFG 0x1840 - -#define IFX_RCU_DOMAIN_PPE (1 << 8) -#define IFX_RCU_MODULE_ATM - -#define IFX_PMU_ENABLE 1 -#define IFX_PMU_DISABLE 0 - -#define IFX_PMU_MODULE_DSL_DFE (1 << 9) -#define IFX_PMU_MODULE_AHBS (1 << 13) -#define IFX_PMU_MODULE_PPE_QSB (1 << 18) -#define IFX_PMU_MODULE_PPE_SLL01 (1 << 19) -#define IFX_PMU_MODULE_PPE_TC (1 << 21) -#define IFX_PMU_MODULE_PPE_EMA (1 << 22) -#define IFX_PMU_MODULE_PPE_TOP (1 << 29) - -extern void ltq_pmu_enable(unsigned int module); -extern void ltq_pmu_disable(unsigned int module); - -#define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);} - -#define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x)) -#define PPE_SLL01_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x)) -#define PPE_TC_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x)) -#define PPE_EMA_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x)) -#define PPE_QSB_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x)) -#define PPE_TPE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x)) -#define DSL_DFE_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x)) - -#define IFX_REG_W32(_v, _r) __raw_writel((_v), (_r)) - -#define CONFIG_IFXMIPS_DSL_CPE_MEI y - -#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24) - -#endif diff --git a/package/system/ltq-dsl/src/ifxmips_mei_interface.h b/package/system/ltq-dsl/src/ifxmips_mei_interface.h deleted file mode 100644 index 4ddc4c6aed..0000000000 --- a/package/system/ltq-dsl/src/ifxmips_mei_interface.h +++ /dev/null @@ -1,702 +0,0 @@ -/****************************************************************************** - - Copyright (c) 2009 - Infineon Technologies AG - Am Campeon 1-12; 81726 Munich, Germany - - For licensing information, see the file 'LICENSE' in the root folder of - this software module. - -******************************************************************************/ - -#ifndef IFXMIPS_MEI_H -#define IFXMIPS_MEI_H - -//#define CONFIG_AMAZON_SE 1 -//#define CONFIG_DANUBE 1 -//#define CONFIG_AR9 1 - -#if !defined(CONFIG_DANUBE) && !defined(CONFIG_AMAZON_SE) && !defined(CONFIG_AR9) && !defined(CONFIG_VR9) -#error Platform undefined!!! -#endif - -#ifdef IFX_MEI_BSP -/** This is the character datatype. */ -typedef char DSL_char_t; -/** This is the unsigned 8-bit datatype. */ -typedef unsigned char DSL_uint8_t; -/** This is the signed 8-bit datatype. */ -typedef signed char DSL_int8_t; -/** This is the unsigned 16-bit datatype. */ -typedef unsigned short DSL_uint16_t; -/** This is the signed 16-bit datatype. */ -typedef signed short DSL_int16_t; -/** This is the unsigned 32-bit datatype. */ -typedef unsigned long DSL_uint32_t; -/** This is the signed 32-bit datatype. */ -typedef signed long DSL_int32_t; -/** This is the float datatype. */ -typedef float DSL_float_t; -/** This is the void datatype. */ -typedef void DSL_void_t; -/** integer type, width is depending on processor arch */ -typedef int DSL_int_t; -/** unsigned integer type, width is depending on processor arch */ -typedef unsigned int DSL_uint_t; -typedef struct file DSL_DRV_file_t; -typedef struct inode DSL_DRV_inode_t; - -/** - * Defines all possible CMV groups - * */ -typedef enum { - DSL_CMV_GROUP_CNTL = 1, - DSL_CMV_GROUP_STAT = 2, - DSL_CMV_GROUP_INFO = 3, - DSL_CMV_GROUP_TEST = 4, - DSL_CMV_GROUP_OPTN = 5, - DSL_CMV_GROUP_RATE = 6, - DSL_CMV_GROUP_PLAM = 7, - DSL_CMV_GROUP_CNFG = 8 -} DSL_CmvGroup_t; -/** - * Defines all opcode types - * */ -typedef enum { - H2D_CMV_READ = 0x00, - H2D_CMV_WRITE = 0x04, - H2D_CMV_INDICATE_REPLY = 0x10, - H2D_ERROR_OPCODE_UNKNOWN =0x20, - H2D_ERROR_CMV_UNKNOWN =0x30, - - D2H_CMV_READ_REPLY =0x01, - D2H_CMV_WRITE_REPLY = 0x05, - D2H_CMV_INDICATE = 0x11, - D2H_ERROR_OPCODE_UNKNOWN = 0x21, - D2H_ERROR_CMV_UNKNOWN = 0x31, - D2H_ERROR_CMV_READ_NOT_AVAILABLE = 0x41, - D2H_ERROR_CMV_WRITE_ONLY = 0x51, - D2H_ERROR_CMV_READ_ONLY = 0x61, - - H2D_DEBUG_READ_DM = 0x02, - H2D_DEBUG_READ_PM = 0x06, - H2D_DEBUG_WRITE_DM = 0x0a, - H2D_DEBUG_WRITE_PM = 0x0e, - - D2H_DEBUG_READ_DM_REPLY = 0x03, - D2H_DEBUG_READ_FM_REPLY = 0x07, - D2H_DEBUG_WRITE_DM_REPLY = 0x0b, - D2H_DEBUG_WRITE_FM_REPLY = 0x0f, - D2H_ERROR_ADDR_UNKNOWN = 0x33, - - D2H_AUTONOMOUS_MODEM_READY_MSG = 0xf1 -} DSL_CmvOpcode_t; - -/* mutex macros */ -#define MEI_MUTEX_INIT(id,flag) \ - sema_init(&id,flag) -#define MEI_MUTEX_LOCK(id) \ - down_interruptible(&id) -#define MEI_MUTEX_UNLOCK(id) \ - up(&id) -#define MEI_WAIT(ms) \ - {\ - set_current_state(TASK_INTERRUPTIBLE);\ - schedule_timeout(ms);\ - } -#define MEI_INIT_WAKELIST(name,queue) \ - init_waitqueue_head(&queue) - -/* wait for an event, timeout is measured in ms */ -#define MEI_WAIT_EVENT_TIMEOUT(ev,timeout)\ - interruptible_sleep_on_timeout(&ev,timeout * HZ / 1000) -#define MEI_WAKEUP_EVENT(ev)\ - wake_up_interruptible(&ev) -#endif /* IFX_MEI_BSP */ - -/*** Register address offsets, relative to MEI_SPACE_ADDRESS ***/ -#define ME_DX_DATA (0x0000) -#define ME_VERSION (0x0004) -#define ME_ARC_GP_STAT (0x0008) -#define ME_DX_STAT (0x000C) -#define ME_DX_AD (0x0010) -#define ME_DX_MWS (0x0014) -#define ME_ME2ARC_INT (0x0018) -#define ME_ARC2ME_STAT (0x001C) -#define ME_ARC2ME_MASK (0x0020) -#define ME_DBG_WR_AD (0x0024) -#define ME_DBG_RD_AD (0x0028) -#define ME_DBG_DATA (0x002C) -#define ME_DBG_DECODE (0x0030) -#define ME_CONFIG (0x0034) -#define ME_RST_CTRL (0x0038) -#define ME_DBG_MASTER (0x003C) -#define ME_CLK_CTRL (0x0040) -#define ME_BIST_CTRL (0x0044) -#define ME_BIST_STAT (0x0048) -#define ME_XDATA_BASE_SH (0x004c) -#define ME_XDATA_BASE (0x0050) -#define ME_XMEM_BAR_BASE (0x0054) -#define ME_XMEM_BAR0 (0x0054) -#define ME_XMEM_BAR1 (0x0058) -#define ME_XMEM_BAR2 (0x005C) -#define ME_XMEM_BAR3 (0x0060) -#define ME_XMEM_BAR4 (0x0064) -#define ME_XMEM_BAR5 (0x0068) -#define ME_XMEM_BAR6 (0x006C) -#define ME_XMEM_BAR7 (0x0070) -#define ME_XMEM_BAR8 (0x0074) -#define ME_XMEM_BAR9 (0x0078) -#define ME_XMEM_BAR10 (0x007C) -#define ME_XMEM_BAR11 (0x0080) -#define ME_XMEM_BAR12 (0x0084) -#define ME_XMEM_BAR13 (0x0088) -#define ME_XMEM_BAR14 (0x008C) -#define ME_XMEM_BAR15 (0x0090) -#define ME_XMEM_BAR16 (0x0094) - -#define WHILE_DELAY 20000 -/* -** Define where in ME Processor's memory map the Stratify chip lives -*/ - -#define MAXSWAPSIZE (8 * 1024) //8k *(32bits) - -// Mailboxes -#define MSG_LENGTH 16 // x16 bits -#define YES_REPLY 1 -#define NO_REPLY 0 - -#define CMV_TIMEOUT 1000 //jiffies - -// Block size per BAR -#define SDRAM_SEGMENT_SIZE (64*1024) -// Number of Bar registers -#define MAX_BAR_REGISTERS (17) - -#define XDATA_REGISTER (15) - -// ARC register addresss -#define ARC_STATUS 0x0 -#define ARC_LP_START 0x2 -#define ARC_LP_END 0x3 -#define ARC_DEBUG 0x5 -#define ARC_INT_MASK 0x10A - -#define IRAM0_BASE (0x00000) -#define IRAM1_BASE (0x04000) -#if defined(CONFIG_DANUBE) -#define BRAM_BASE (0x0A000) -#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9) -#define BRAM_BASE (0x08000) -#endif -#define XRAM_BASE (0x18000) -#define YRAM_BASE (0x1A000) -#define EXT_MEM_BASE (0x80000) -#define ARC_GPIO_CTRL (0xC030) -#define ARC_GPIO_DATA (0xC034) - -#define IRAM0_SIZE (16*1024) -#define IRAM1_SIZE (16*1024) -#define BRAM_SIZE (12*1024) -#define XRAM_SIZE (8*1024) -#define YRAM_SIZE (8*1024) -#define EXT_MEM_SIZE (1536*1024) - -#define ADSL_BASE (0x20000) -#define CRI_BASE (ADSL_BASE + 0x11F00) -#define CRI_CCR0 (CRI_BASE + 0x00) -#define CRI_RST (CRI_BASE + 0x04*4) -#define ADSL_DILV_BASE (ADSL_BASE+0x20000) - -// -#define IRAM0_ADDR_BIT_MASK 0xFFF -#define IRAM1_ADDR_BIT_MASK 0xFFF -#define BRAM_ADDR_BIT_MASK 0xFFF -#define RX_DILV_ADDR_BIT_MASK 0x1FFF - -/*** Bit definitions ***/ -#define ARC_AUX_HALT (1 << 25) -#define ARC_DEBUG_HALT (1 << 1) -#define FALSE 0 -#define TRUE 1 -#define BIT0 (1<<0) -#define BIT1 (1<<1) -#define BIT2 (1<<2) -#define BIT3 (1<<3) -#define BIT4 (1<<4) -#define BIT5 (1<<5) -#define BIT6 (1<<6) -#define BIT7 (1<<7) -#define BIT8 (1<<8) -#define BIT9 (1<<9) -#define BIT10 (1<<10) -#define BIT11 (1<<11) -#define BIT12 (1<<12) -#define BIT13 (1<<13) -#define BIT14 (1<<14) -#define BIT15 (1<<15) -#define BIT16 (1<<16) -#define BIT17 (1<<17) -#define BIT18 (1<<18) -#define BIT19 (1<<19) -#define BIT20 (1<<20) -#define BIT21 (1<<21) -#define BIT22 (1<<22) -#define BIT23 (1<<23) -#define BIT24 (1<<24) -#define BIT25 (1<<25) -#define BIT26 (1<<26) -#define BIT27 (1<<27) -#define BIT28 (1<<28) -#define BIT29 (1<<29) -#define BIT30 (1<<30) -#define BIT31 (1<<31) - -// CRI_CCR0 Register definitions -#define CLK_2M_MODE_ENABLE BIT6 -#define ACL_CLK_MODE_ENABLE BIT4 -#define FDF_CLK_MODE_ENABLE BIT2 -#define STM_CLK_MODE_ENABLE BIT0 - -// CRI_RST Register definitions -#define FDF_SRST BIT3 -#define MTE_SRST BIT2 -#define FCI_SRST BIT1 -#define AAI_SRST BIT0 - -// MEI_TO_ARC_INTERRUPT Register definitions -#define MEI_TO_ARC_INT1 BIT3 -#define MEI_TO_ARC_INT0 BIT2 -#define MEI_TO_ARC_CS_DONE BIT1 //need to check -#define MEI_TO_ARC_MSGAV BIT0 - -// ARC_TO_MEI_INTERRUPT Register definitions -#define ARC_TO_MEI_INT1 BIT8 -#define ARC_TO_MEI_INT0 BIT7 -#define ARC_TO_MEI_CS_REQ BIT6 -#define ARC_TO_MEI_DBG_DONE BIT5 -#define ARC_TO_MEI_MSGACK BIT4 -#define ARC_TO_MEI_NO_ACCESS BIT3 -#define ARC_TO_MEI_CHECK_AAITX BIT2 -#define ARC_TO_MEI_CHECK_AAIRX BIT1 -#define ARC_TO_MEI_MSGAV BIT0 - -// ARC_TO_MEI_INTERRUPT_MASK Register definitions -#define GP_INT1_EN BIT8 -#define GP_INT0_EN BIT7 -#define CS_REQ_EN BIT6 -#define DBG_DONE_EN BIT5 -#define MSGACK_EN BIT4 -#define NO_ACC_EN BIT3 -#define AAITX_EN BIT2 -#define AAIRX_EN BIT1 -#define MSGAV_EN BIT0 - -#define MEI_SOFT_RESET BIT0 - -#define HOST_MSTR BIT0 - -#define JTAG_MASTER_MODE 0x0 -#define MEI_MASTER_MODE HOST_MSTR - -// MEI_DEBUG_DECODE Register definitions -#define MEI_DEBUG_DEC_MASK (0x3) -#define MEI_DEBUG_DEC_AUX_MASK (0x0) -#define ME_DBG_DECODE_DMP1_MASK (0x1) -#define MEI_DEBUG_DEC_DMP2_MASK (0x2) -#define MEI_DEBUG_DEC_CORE_MASK (0x3) - -#define AUX_STATUS (0x0) -#define AUX_ARC_GPIO_CTRL (0x10C) -#define AUX_ARC_GPIO_DATA (0x10D) -// ARC_TO_MEI_MAILBOX[11] is a special location used to indicate -// page swap requests. -#if defined(CONFIG_DANUBE) -#define OMBOX_BASE 0xDF80 -#define ARC_TO_MEI_MAILBOX 0xDFA0 -#define IMBOX_BASE 0xDFC0 -#define MEI_TO_ARC_MAILBOX 0xDFD0 -#elif defined(CONFIG_AMAZON_SE) || defined(CONFIG_AR9) || defined(CONFIG_VR9) -#define OMBOX_BASE 0xAF80 -#define ARC_TO_MEI_MAILBOX 0xAFA0 -#define IMBOX_BASE 0xAFC0 -#define MEI_TO_ARC_MAILBOX 0xAFD0 -#endif - -#define MEI_TO_ARC_MAILBOXR (MEI_TO_ARC_MAILBOX + 0x2C) -#define ARC_MEI_MAILBOXR (ARC_TO_MEI_MAILBOX + 0x2C) -#define OMBOX1 (OMBOX_BASE+0x4) - -// Codeswap request messages are indicated by setting BIT31 -#define OMB_CODESWAP_MESSAGE_MSG_TYPE_MASK (0x80000000) - -// Clear Eoc messages received are indicated by setting BIT17 -#define OMB_CLEAREOC_INTERRUPT_CODE (0x00020000) -#define OMB_REBOOT_INTERRUPT_CODE (1 << 18) - -/* -** Swap page header -*/ -// Page must be loaded at boot time if size field has BIT31 set -#define BOOT_FLAG (BIT31) -#define BOOT_FLAG_MASK ~BOOT_FLAG - -#define FREE_RELOAD 1 -#define FREE_SHOWTIME 2 -#define FREE_ALL 3 - -// marcos -#define IFX_MEI_WRITE_REGISTER_L(data,addr) *((volatile u32*)(addr)) = (u32)(data) -#define IFX_MEI_READ_REGISTER_L(addr) (*((volatile u32*)(addr))) -#define SET_BIT(reg, mask) reg |= (mask) -#define CLEAR_BIT(reg, mask) reg &= (~mask) -#define CLEAR_BITS(reg, mask) CLEAR_BIT(reg, mask) -//#define SET_BITS(reg, mask) SET_BIT(reg, mask) -#define SET_BITFIELD(reg, mask, off, val) {reg &= (~mask); reg |= (val << off);} - -#define ALIGN_SIZE ( 1L<<10 ) //1K size align -#define MEM_ALIGN(addr) (((addr) + ALIGN_SIZE - 1) & ~ (ALIGN_SIZE -1) ) - -// swap marco -#define MEI_HALF_WORD_SWAP(data) {data = ((data & 0xffff)<<16) + ((data & 0xffff0000)>>16);} -#define MEI_BYTE_SWAP(data) {data = ((data & 0xff)<<24) + ((data & 0xff00)<<8)+ ((data & 0xff0000)>>8)+ ((data & 0xff000000)>>24);} - - -#ifdef CONFIG_PROC_FS -typedef struct reg_entry -{ - int *flag; - char name[30]; /* big enough to hold names */ - char description[100]; /* big enough to hold description */ - unsigned short low_ino; -} reg_entry_t; -#endif -// Swap page header describes size in 32-bit words, load location, and image offset -// for program and/or data segments -typedef struct _arc_swp_page_hdr { - u32 p_offset; //Offset bytes of progseg from beginning of image - u32 p_dest; //Destination addr of progseg on processor - u32 p_size; //Size in 32-bitwords of program segment - u32 d_offset; //Offset bytes of dataseg from beginning of image - u32 d_dest; //Destination addr of dataseg on processor - u32 d_size; //Size in 32-bitwords of data segment -} ARC_SWP_PAGE_HDR; - -/* -** Swap image header -*/ -#define GET_PROG 0 // Flag used for program mem segment -#define GET_DATA 1 // Flag used for data mem segment - -// Image header contains size of image, checksum for image, and count of -// page headers. Following that are 'count' page headers followed by -// the code and/or data segments to be loaded -typedef struct _arc_img_hdr { - u32 size; // Size of binary image in bytes - u32 checksum; // Checksum for image - u32 count; // Count of swp pages in image - ARC_SWP_PAGE_HDR page[1]; // Should be "count" pages - '1' to make compiler happy -} ARC_IMG_HDR; - -typedef struct smmu_mem_info { - int type; - int boot; - unsigned long nCopy; - unsigned long size; - unsigned char *address; - unsigned char *org_address; -} smmu_mem_info_t; - -#ifdef __KERNEL__ -typedef struct ifx_mei_device_private { - int modem_ready; - int arcmsgav; - int cmv_reply; - int cmv_waiting; - // Mei to ARC CMV count, reply count, ARC Indicator count - int modem_ready_cnt; - int cmv_count; - int reply_count; - unsigned long image_size; - int nBar; - u16 Recent_indicator[MSG_LENGTH]; - - u16 CMV_RxMsg[MSG_LENGTH] __attribute__ ((aligned (4))); - - smmu_mem_info_t adsl_mem_info[MAX_BAR_REGISTERS]; - ARC_IMG_HDR *img_hdr; - // to wait for arc cmv reply, sleep on wait_queue_arcmsgav; - wait_queue_head_t wait_queue_arcmsgav; - wait_queue_head_t wait_queue_modemready; - struct semaphore mei_cmv_sema; -} ifx_mei_device_private_t; -#endif -typedef struct winhost_message { - union { - u16 RxMessage[MSG_LENGTH] __attribute__ ((aligned (4))); - u16 TxMessage[MSG_LENGTH] __attribute__ ((aligned (4))); - } msg; -} DSL_DEV_WinHost_Message_t; -/******************************************************************************************************** - * DSL CPE API Driver Stack Interface Definitions - * *****************************************************************************************************/ -/** IOCTL codes for bsp driver */ -#define DSL_IOC_MEI_BSP_MAGIC 's' - -#define DSL_FIO_BSP_DSL_START _IO (DSL_IOC_MEI_BSP_MAGIC, 0) -#define DSL_FIO_BSP_RUN _IO (DSL_IOC_MEI_BSP_MAGIC, 1) -#define DSL_FIO_BSP_FREE_RESOURCE _IO (DSL_IOC_MEI_BSP_MAGIC, 2) -#define DSL_FIO_BSP_RESET _IO (DSL_IOC_MEI_BSP_MAGIC, 3) -#define DSL_FIO_BSP_REBOOT _IO (DSL_IOC_MEI_BSP_MAGIC, 4) -#define DSL_FIO_BSP_HALT _IO (DSL_IOC_MEI_BSP_MAGIC, 5) -#define DSL_FIO_BSP_BOOTDOWNLOAD _IO (DSL_IOC_MEI_BSP_MAGIC, 6) -#define DSL_FIO_BSP_JTAG_ENABLE _IO (DSL_IOC_MEI_BSP_MAGIC, 7) -#define DSL_FIO_FREE_RESOURCE _IO (DSL_IOC_MEI_BSP_MAGIC, 8) -#define DSL_FIO_ARC_MUX_TEST _IO (DSL_IOC_MEI_BSP_MAGIC, 9) -#define DSL_FIO_BSP_REMOTE _IOW (DSL_IOC_MEI_BSP_MAGIC, 10, u32) -#define DSL_FIO_BSP_GET_BASE_ADDRESS _IOR (DSL_IOC_MEI_BSP_MAGIC, 11, u32) -#define DSL_FIO_BSP_IS_MODEM_READY _IOR (DSL_IOC_MEI_BSP_MAGIC, 12, u32) -#define DSL_FIO_BSP_GET_VERSION _IOR (DSL_IOC_MEI_BSP_MAGIC, 13, DSL_DEV_Version_t) -#define DSL_FIO_BSP_CMV_WINHOST _IOWR(DSL_IOC_MEI_BSP_MAGIC, 14, DSL_DEV_WinHost_Message_t) -#define DSL_FIO_BSP_CMV_READ _IOWR(DSL_IOC_MEI_BSP_MAGIC, 15, DSL_DEV_MeiReg_t) -#define DSL_FIO_BSP_CMV_WRITE _IOW (DSL_IOC_MEI_BSP_MAGIC, 16, DSL_DEV_MeiReg_t) -#define DSL_FIO_BSP_DEBUG_READ _IOWR(DSL_IOC_MEI_BSP_MAGIC, 17, DSL_DEV_MeiDebug_t) -#define DSL_FIO_BSP_DEBUG_WRITE _IOWR(DSL_IOC_MEI_BSP_MAGIC, 18, DSL_DEV_MeiDebug_t) -#define DSL_FIO_BSP_GET_CHIP_INFO _IOR (DSL_IOC_MEI_BSP_MAGIC, 19, DSL_DEV_HwVersion_t) - -#define DSL_DEV_MEIDEBUG_BUFFER_SIZES 512 - -typedef struct DSL_DEV_MeiDebug -{ - DSL_uint32_t iAddress; - DSL_uint32_t iCount; - DSL_uint32_t buffer[DSL_DEV_MEIDEBUG_BUFFER_SIZES]; -} DSL_DEV_MeiDebug_t; /* meidebug */ - -/** - * Structure is used for debug access only. - * Refer to configure option INCLUDE_ADSL_WINHOST_DEBUG */ -typedef struct struct_meireg -{ - /* - * Specifies that address for debug access */ - unsigned long iAddress; - /* - * Specifies the pointer to the data that has to be written or returns a - * pointer to the data that has been read out*/ - unsigned long iData; -} DSL_DEV_MeiReg_t; /* meireg */ - -typedef struct DSL_DEV_Device -{ - DSL_int_t nInUse; /* modem state, update by bsp driver, */ - DSL_void_t *pPriv; - DSL_uint32_t base_address; /* mei base address */ - DSL_int_t nIrq[2]; /* irq number */ -#define IFX_DFEIR 0 -#define IFX_DYING_GASP 1 - DSL_DEV_MeiDebug_t lop_debugwr; /* dying gasp */ -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)) - struct module *owner; -#endif -} DSL_DEV_Device_t; /* ifx_adsl_device_t */ - -#define DSL_DEV_PRIVATE(dev) ((ifx_mei_device_private_t*)(dev->pPriv)) - -typedef struct DSL_DEV_Version /* ifx_adsl_bsp_version */ -{ - unsigned long major; - unsigned long minor; - unsigned long revision; -} DSL_DEV_Version_t; /* ifx_adsl_bsp_version_t */ - -typedef struct DSL_DEV_ChipInfo -{ - unsigned long major; - unsigned long minor; -} DSL_DEV_HwVersion_t; - -typedef struct -{ - DSL_uint8_t dummy; -} DSL_DEV_DeviceConfig_t; - -/** error code definitions */ -typedef enum DSL_DEV_MeiError -{ - DSL_DEV_MEI_ERR_SUCCESS = 0, - DSL_DEV_MEI_ERR_FAILURE = -1, - DSL_DEV_MEI_ERR_MAILBOX_FULL = -2, - DSL_DEV_MEI_ERR_MAILBOX_EMPTY = -3, - DSL_DEV_MEI_ERR_MAILBOX_TIMEOUT = -4 -} DSL_DEV_MeiError_t; /* MEI_ERROR */ - -typedef enum { - DSL_BSP_MEMORY_READ=0, - DSL_BSP_MEMORY_WRITE, -} DSL_BSP_MemoryAccessType_t; /* ifx_adsl_memory_access_type_t */ - -typedef enum -{ - DSL_LED_LINK_ID=0, - DSL_LED_DATA_ID -} DSL_DEV_LedId_t; /* ifx_adsl_led_id_t */ - -typedef enum -{ - DSL_LED_LINK_TYPE=0, - DSL_LED_DATA_TYPE -} DSL_DEV_LedType_t; /* ifx_adsl_led_type_t */ - -typedef enum -{ - DSL_LED_HD_CPU=0, - DSL_LED_HD_FW -} DSL_DEV_LedHandler_t; /* ifx_adsl_led_handler_t */ - -typedef enum { - DSL_LED_ON=0, - DSL_LED_OFF, - DSL_LED_FLASH, -} DSL_DEV_LedMode_t; /* ifx_adsl_led_mode_t */ - -typedef enum { - DSL_CPU_HALT=0, - DSL_CPU_RUN, - DSL_CPU_RESET, -} DSL_DEV_CpuMode_t; /* ifx_adsl_cpu_mode_t */ - -#if 0 -typedef enum { - DSL_BSP_EVENT_DYING_GASP = 0, - DSL_BSP_EVENT_CEOC_IRQ, -} DSL_BSP_Event_id_t; /* ifx_adsl_event_id_t */ - -typedef union DSL_BSP_CB_Param -{ - DSL_uint32_t nIrqMessage; -} DSL_BSP_CB_Param_t; /* ifx_adsl_cbparam_t */ - -typedef struct DSL_BSP_CB_Event -{ - DSL_BSP_Event_id_t nID; - DSL_DEV_Device_t *pDev; - DSL_BSP_CB_Param_t *pParam; -} DSL_BSP_CB_Event_t; /* ifx_adsl_cb_event_t */ -#endif - -/* external functions (from the BSP Driver) */ -extern DSL_DEV_Device_t* DSL_BSP_DriverHandleGet(int, int); -extern DSL_int_t DSL_BSP_DriverHandleDelete(DSL_DEV_Device_t *); -extern DSL_DEV_MeiError_t DSL_BSP_FWDownload(DSL_DEV_Device_t *, const DSL_char_t *, DSL_uint32_t, DSL_int32_t *, DSL_int32_t *); -extern int DSL_BSP_KernelIoctls(DSL_DEV_Device_t *, unsigned int, unsigned long); -extern DSL_DEV_MeiError_t DSL_BSP_SendCMV(DSL_DEV_Device_t *, DSL_uint16_t *, DSL_int_t, DSL_uint16_t *); -extern DSL_DEV_MeiError_t DSL_BSP_AdslLedInit(DSL_DEV_Device_t *, DSL_DEV_LedId_t, DSL_DEV_LedType_t, DSL_DEV_LedHandler_t); -extern DSL_DEV_MeiError_t DSL_BSP_Showtime(DSL_DEV_Device_t *, DSL_uint32_t, DSL_uint32_t); -extern int DSL_BSP_ATMLedCBRegister( int (*ifx_adsl_ledcallback)(void)); -extern DSL_DEV_MeiError_t DSL_BSP_MemoryDebugAccess(DSL_DEV_Device_t *, DSL_BSP_MemoryAccessType_t, DSL_uint32_t, DSL_uint32_t *, DSL_uint32_t); -extern volatile DSL_DEV_Device_t *adsl_dev; - -/** - * Dummy structure by now to show mechanism of extended data that will be - * provided within event callback itself. - * */ -typedef struct -{ - /** - * Dummy value */ - DSL_uint32_t nDummy1; -} DSL_BSP_CB_Event1DataDummy_t; - -/** - * Dummy structure by now to show mechanism of extended data that will be - * provided within event callback itself. - * */ -typedef struct -{ - /** - * Dummy value */ - DSL_uint32_t nDummy2; -} DSL_BSP_CB_Event2DataDummy_t; - -/** - * encapsulate all data structures that are necessary for status event - * callbacks. - * */ -typedef union -{ - DSL_BSP_CB_Event1DataDummy_t dataEvent1; - DSL_BSP_CB_Event2DataDummy_t dataEvent2; -} DSL_BSP_CB_DATA_Union_t; - - -typedef enum -{ - /** - * Informs the upper layer driver (DSL CPE API) about a reboot request from the - * firmware. - * \note This event does NOT include any additional data. - * More detailed information upon reboot reason has to be requested from - * upper layer software via CMV (INFO 109) if necessary. */ - DSL_BSP_CB_FIRST = 0, - DSL_BSP_CB_DYING_GASP, - DSL_BSP_CB_CEOC_IRQ, - DSL_BSP_CB_FIRMWARE_REBOOT, - /** - * Delimiter only */ - DSL_BSP_CB_LAST -} DSL_BSP_CB_Type_t; - -/** - * Specifies the common event type that has to be used for registering and - * signalling of interrupts/autonomous status events from MEI BSP Driver. - * - * \param pDev - * Context pointer from MEI BSP Driver. - * - * \param IFX_ADSL_BSP_CallbackType_t - * Specifies the event callback type (reason of callback). Regrading to the - * setting of this value the data which is included in the following union - * might have different meanings. - * Please refer to the description of the union to get information about the - * meaning of the included data. - * - * \param pData - * Data according to \ref DSL_BSP_CB_DATA_Union_t. - * If this pointer is NULL there is no additional data available. - * - * \return depending on event - */ -typedef int (*DSL_BSP_EventCallback_t) -( - DSL_DEV_Device_t *pDev, - DSL_BSP_CB_Type_t nCallbackType, - DSL_BSP_CB_DATA_Union_t *pData -); - -typedef struct { - DSL_BSP_EventCallback_t function; - DSL_BSP_CB_Type_t event; - DSL_BSP_CB_DATA_Union_t *pData; -} DSL_BSP_EventCallBack_t; - -extern int DSL_BSP_EventCBRegister(DSL_BSP_EventCallBack_t *); -extern int DSL_BSP_EventCBUnregister(DSL_BSP_EventCallBack_t *); - -/** Modem states */ -#define DSL_DEV_STAT_InitState 0x0000 -#define DSL_DEV_STAT_ReadyState 0x0001 -#define DSL_DEV_STAT_FailState 0x0002 -#define DSL_DEV_STAT_IdleState 0x0003 -#define DSL_DEV_STAT_QuietState 0x0004 -#define DSL_DEV_STAT_GhsState 0x0005 -#define DSL_DEV_STAT_FullInitState 0x0006 -#define DSL_DEV_STAT_ShowTimeState 0x0007 -#define DSL_DEV_STAT_FastRetrainState 0x0008 -#define DSL_DEV_STAT_LoopDiagMode 0x0009 -#define DSL_DEV_STAT_ShortInit 0x000A /* Bis short initialization */ - -#define DSL_DEV_STAT_CODESWAP_COMPLETE 0x0002 - -#endif //IFXMIPS_MEI_H diff --git a/package/system/ltq-dsl/src/lantiq_mei.c b/package/system/ltq-dsl/src/lantiq_mei.c deleted file mode 100644 index 00ac90289b..0000000000 --- a/package/system/ltq-dsl/src/lantiq_mei.c +++ /dev/null @@ -1,3046 +0,0 @@ -/****************************************************************************** - - Copyright (c) 2009 - Infineon Technologies AG - Am Campeon 1-12; 81726 Munich, Germany - - For licensing information, see the file 'LICENSE' in the root folder of - this software module. - -******************************************************************************/ - -/*! - \defgroup AMAZON_S_MEI Amazon-S MEI Driver Module - \brief Amazon-S MEI driver module - */ - -/*! - \defgroup Internal Compile Parametere - \ingroup AMAZON_S_MEI - \brief exported functions for other driver use - */ - -/*! - \file amazon_s_mei_bsp.c - \ingroup AMAZON_S_MEI - \brief Amazon-S MEI driver file - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/version.h> -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) -#include <linux/utsrelease.h> -#else -#include <generated/utsrelease.h> -#endif -#include <linux/types.h> -#include <linux/fs.h> -#include <linux/mm.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/ioport.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/sched.h> -#include <asm/uaccess.h> -#include <asm/hardirq.h> - -#include <lantiq_soc.h> -#include "ifxmips_atm.h" -#define IFX_MEI_BSP -#include "ifxmips_mei_interface.h" - -/*#define LTQ_RCU_RST IFX_RCU_RST_REQ -#define LTQ_RCU_RST_REQ_ARC_JTAG IFX_RCU_RST_REQ_ARC_JTAG -#define LTQ_RCU_RST_REQ_DFE IFX_RCU_RST_REQ_DFE -#define LTQ_RCU_RST_REQ_AFE IFX_RCU_RST_REQ_AFE -#define IFXMIPS_FUSE_BASE_ADDR IFX_FUSE_BASE_ADDR -#define IFXMIPS_ICU_IM0_IER IFX_ICU_IM0_IER -#define IFXMIPS_ICU_IM2_IER IFX_ICU_IM2_IER -#define LTQ_MEI_INT IFX_MEI_INT -#define LTQ_MEI_DYING_GASP_INT IFX_MEI_DYING_GASP_INT -#define LTQ_MEI_BASE_ADDR IFX_MEI_SPACE_ACCESS -#define IFXMIPS_PMU_PWDCR IFX_PMU_PWDCR -#define IFXMIPS_MPS_CHIPID IFX_MPS_CHIPID - -#define ifxmips_port_reserve_pin ifx_gpio_pin_reserve -#define ifxmips_port_set_dir_in ifx_gpio_dir_in_set -#define ifxmips_port_clear_altsel0 ifx_gpio_altsel0_set -#define ifxmips_port_clear_altsel1 ifx_gpio_altsel1_clear -#define ifxmips_port_set_open_drain ifx_gpio_open_drain_clear -#define ifxmips_port_free_pin ifx_gpio_pin_free -#define ifxmips_mask_and_ack_irq bsp_mask_and_ack_irq -#define IFXMIPS_MPS_CHIPID_VERSION_GET IFX_MCD_CHIPID_VERSION_GET -#define ltq_r32(reg) __raw_readl(reg) -#define ltq_w32(val, reg) __raw_writel(val, reg) -#define ltq_w32_mask(clear, set, reg) ltq_w32((ltq_r32(reg) & ~clear) | set, reg) -*/ - -#define LTQ_RCU_BASE_ADDR 0x1F203000 -#define LTQ_ICU_BASE_ADDR 0x1F880200 -#define LTQ_MEI_BASE_ADDR 0x1E116000 -#define LTQ_PMU_BASE_ADDR 0x1F102000 -#define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21) -#define LTQ_USB_OC_INT (INT_NUM_IM4_IRL0 + 23) -#define LTQ_MEI_INT (INT_NUM_IM1_IRL0 + 23) - -#define LTQ_RCU_RST_REQ_DFE (1 << 7) -#define LTQ_RCU_RST_REQ_AFE (1 << 11) - -#define LTQ_PMU_BASE (KSEG1 + LTQ_PMU_BASE_ADDR) -#define LTQ_RCU_BASE (KSEG1 + LTQ_RCU_BASE_ADDR) -#define LTQ_ICU_BASE (KSEG1 + LTQ_ICU_BASE_ADDR) - -#define LTQ_PMU_PWDCR ((u32 *)(LTQ_PMU_BASE + 0x001C)) -#define LTQ_PMU_PWDSR ((u32 *)(LTQ_PMU_BASE + 0x0020)) -#define LTQ_RCU_RST ((u32 *)(LTQ_RCU_BASE + 0x0010)) -#define LTQ_RCU_RST_ALL 0x40000000 - -#define LTQ_ICU_IM0_ISR ((u32 *)(LTQ_ICU_BASE + 0x0000)) -#define LTQ_ICU_IM0_IER ((u32 *)(LTQ_ICU_BASE + 0x0008)) -#define LTQ_ICU_IM0_IOSR ((u32 *)(LTQ_ICU_BASE + 0x0010)) -#define LTQ_ICU_IM0_IRSR ((u32 *)(LTQ_ICU_BASE + 0x0018)) -#define LTQ_ICU_IM0_IMR ((u32 *)(LTQ_ICU_BASE + 0x0020)) - - -#define LTQ_ICU_IM1_ISR ((u32 *)(LTQ_ICU_BASE + 0x0028)) -#define LTQ_ICU_IM2_ISR ((u32 *)(LTQ_ICU_BASE + 0x0050)) -#define LTQ_ICU_IM3_ISR ((u32 *)(LTQ_ICU_BASE + 0x0078)) -#define LTQ_ICU_IM4_ISR ((u32 *)(LTQ_ICU_BASE + 0x00A0)) - -#define LTQ_ICU_OFFSET (LTQ_ICU_IM1_ISR - LTQ_ICU_IM0_ISR) -#define LTQ_ICU_IM2_IER (LTQ_ICU_IM0_IER + LTQ_ICU_OFFSET) - -#define IFX_MEI_EMSG(fmt, args...) pr_err("[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args) -#define IFX_MEI_DMSG(fmt, args...) pr_debug("[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args) - -#define LTQ_FUSE_BASE (KSEG1 + 0x1F107354) - -#ifdef CONFIG_LTQ_MEI_FW_LOOPBACK -//#define DFE_MEM_TEST -//#define DFE_PING_TEST -#define DFE_ATM_LOOPBACK - - -#ifdef DFE_ATM_LOOPBACK -#include <asm/ifxmips/ifxmips_mei_fw_loopback.h> -#endif - -void dfe_loopback_irq_handler (DSL_DEV_Device_t *pDev); - -#endif //CONFIG_AMAZON_S_MEI_FW_LOOPBACK - -DSL_DEV_Version_t bsp_mei_version = { - major: 5, - minor: 0, - revision:0 -}; -DSL_DEV_HwVersion_t bsp_chip_info; - -#define IFX_MEI_DEVNAME "ifx_mei" -#define BSP_MAX_DEVICES 1 - -DSL_DEV_MeiError_t DSL_BSP_FWDownload (DSL_DEV_Device_t *, const char *, unsigned long, long *, long *); -DSL_DEV_MeiError_t DSL_BSP_Showtime (DSL_DEV_Device_t *, DSL_uint32_t, DSL_uint32_t); -DSL_DEV_MeiError_t DSL_BSP_AdslLedInit (DSL_DEV_Device_t *, DSL_DEV_LedId_t, DSL_DEV_LedType_t, DSL_DEV_LedHandler_t); -//DSL_DEV_MeiError_t DSL_BSP_AdslLedSet (DSL_DEV_Device_t *, DSL_DEV_LedId_t, DSL_DEV_LedMode_t); -DSL_DEV_MeiError_t DSL_BSP_MemoryDebugAccess (DSL_DEV_Device_t *, DSL_BSP_MemoryAccessType_t, DSL_uint32_t, DSL_uint32_t*, DSL_uint32_t); -DSL_DEV_MeiError_t DSL_BSP_SendCMV (DSL_DEV_Device_t *, u16 *, int, u16 *); - -int DSL_BSP_KernelIoctls (DSL_DEV_Device_t *, unsigned int, unsigned long); - -static DSL_DEV_MeiError_t IFX_MEI_RunAdslModem (DSL_DEV_Device_t *); -static DSL_DEV_MeiError_t IFX_MEI_CpuModeSet (DSL_DEV_Device_t *, DSL_DEV_CpuMode_t); -static DSL_DEV_MeiError_t IFX_MEI_DownloadBootCode (DSL_DEV_Device_t *); -static DSL_DEV_MeiError_t IFX_MEI_ArcJtagEnable (DSL_DEV_Device_t *, int); -static DSL_DEV_MeiError_t IFX_MEI_AdslMailboxIRQEnable (DSL_DEV_Device_t *, int); - -static int IFX_MEI_GetPage (DSL_DEV_Device_t *, u32, u32, u32, u32 *, u32 *); -static int IFX_MEI_BarUpdate (DSL_DEV_Device_t *, int); - -static ssize_t IFX_MEI_Write (DSL_DRV_file_t *, const char *, size_t, loff_t *); -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) -static int IFX_MEI_UserIoctls (DSL_DRV_inode_t *, DSL_DRV_file_t *, unsigned int, unsigned long); -#else -static int IFX_MEI_UserIoctls (DSL_DRV_file_t *, unsigned int, unsigned long); -#endif -static int IFX_MEI_Open (DSL_DRV_inode_t *, DSL_DRV_file_t *); -static int IFX_MEI_Release (DSL_DRV_inode_t *, DSL_DRV_file_t *); - -void AMAZON_SE_MEI_ARC_MUX_Test(void); - -#ifdef CONFIG_PROC_FS -static int IFX_MEI_ProcRead (struct file *, char *, size_t, loff_t *); -static ssize_t IFX_MEI_ProcWrite (struct file *, const char *, size_t, loff_t *); - -#define PROC_ITEMS 11 -#define MEI_DIRNAME "ifxmips_mei" - -static struct proc_dir_entry *meidir; -static struct file_operations IFX_MEI_ProcOperations = { - read:IFX_MEI_ProcRead, - write:IFX_MEI_ProcWrite, -}; -static reg_entry_t regs[BSP_MAX_DEVICES][PROC_ITEMS]; //total items to be monitored by /proc/mei -#define NUM_OF_REG_ENTRY (sizeof(regs[0])/sizeof(reg_entry_t)) -#endif //CONFIG_PROC_FS - -void IFX_MEI_ARC_MUX_Test(void); - -static int adsl_dummy_ledcallback(void); - -int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL; -EXPORT_SYMBOL(ifx_mei_atm_showtime_enter); - -int (*ifx_mei_atm_showtime_exit)(void) = NULL; -EXPORT_SYMBOL(ifx_mei_atm_showtime_exit); - -static int (*g_adsl_ledcallback)(void) = adsl_dummy_ledcallback; - -static unsigned int g_tx_link_rate[2] = {0}; - -static void *g_xdata_addr = NULL; - -static u32 *mei_arc_swap_buff = NULL; // holding swap pages - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)) -extern void ltq_mask_and_ack_irq(unsigned int irq_nr); -#define MEI_MASK_AND_ACK_IRQ ltq_mask_and_ack_irq -#else -extern void ltq_mask_and_ack_irq(struct irq_data *d); -static void inline MEI_MASK_AND_ACK_IRQ(int x) -{ - struct irq_data d; - d.irq = x; - ltq_mask_and_ack_irq(&d); -} -#endif -#define MEI_MAJOR 105 -static int dev_major = MEI_MAJOR; - -static struct file_operations bsp_mei_operations = { - owner:THIS_MODULE, - open:IFX_MEI_Open, - release:IFX_MEI_Release, - write:IFX_MEI_Write, -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - ioctl:IFX_MEI_UserIoctls, -#else - unlocked_ioctl:IFX_MEI_UserIoctls, -#endif -}; - -static DSL_DEV_Device_t dsl_devices[BSP_MAX_DEVICES]; - -static ifx_mei_device_private_t - sDanube_Mei_Private[BSP_MAX_DEVICES]; - -static DSL_BSP_EventCallBack_t dsl_bsp_event_callback[DSL_BSP_CB_LAST + 1]; - -/** - * Write a value to register - * This function writes a value to danube register - * - * \param ul_address The address to write - * \param ul_data The value to write - * \ingroup Internal - */ -static void -IFX_MEI_LongWordWrite (u32 ul_address, u32 ul_data) -{ - IFX_MEI_WRITE_REGISTER_L (ul_data, ul_address); - wmb(); - return; -} - -/** - * Write a value to register - * This function writes a value to danube register - * - * \param pDev the device pointer - * \param ul_address The address to write - * \param ul_data The value to write - * \ingroup Internal - */ -static void -IFX_MEI_LongWordWriteOffset (DSL_DEV_Device_t * pDev, u32 ul_address, - u32 ul_data) -{ - IFX_MEI_WRITE_REGISTER_L (ul_data, pDev->base_address + ul_address); - wmb(); - return; -} - -/** - * Read the danube register - * This function read the value from danube register - * - * \param ul_address The address to write - * \param pul_data Pointer to the data - * \ingroup Internal - */ -static void -IFX_MEI_LongWordRead (u32 ul_address, u32 * pul_data) -{ - *pul_data = IFX_MEI_READ_REGISTER_L (ul_address); - rmb(); - return; -} - -/** - * Read the danube register - * This function read the value from danube register - * - * \param pDev the device pointer - * \param ul_address The address to write - * \param pul_data Pointer to the data - * \ingroup Internal - */ -static void -IFX_MEI_LongWordReadOffset (DSL_DEV_Device_t * pDev, u32 ul_address, - u32 * pul_data) -{ - *pul_data = IFX_MEI_READ_REGISTER_L (pDev->base_address + ul_address); - rmb(); - return; -} - -/** - * Write several DWORD datas to ARC memory via ARC DMA interface - * This function writes several DWORD datas to ARC memory via DMA interface. - * - * \param pDev the device pointer - * \param destaddr The address to write - * \param databuff Pointer to the data buffer - * \param databuffsize Number of DWORDs to write - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_DMAWrite (DSL_DEV_Device_t * pDev, u32 destaddr, - u32 * databuff, u32 databuffsize) -{ - u32 *p = databuff; - u32 temp; - - if (destaddr & 3) - return DSL_DEV_MEI_ERR_FAILURE; - - // Set the write transfer address - IFX_MEI_LongWordWriteOffset (pDev, ME_DX_AD, destaddr); - - // Write the data pushed across DMA - while (databuffsize--) { - temp = *p; - if (destaddr == MEI_TO_ARC_MAILBOX) - MEI_HALF_WORD_SWAP (temp); - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DX_DATA, temp); - p++; - } - - return DSL_DEV_MEI_ERR_SUCCESS; - -} - -/** - * Read several DWORD datas from ARC memory via ARC DMA interface - * This function reads several DWORD datas from ARC memory via DMA interface. - * - * \param pDev the device pointer - * \param srcaddr The address to read - * \param databuff Pointer to the data buffer - * \param databuffsize Number of DWORDs to read - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_DMARead (DSL_DEV_Device_t * pDev, u32 srcaddr, u32 * databuff, - u32 databuffsize) -{ - u32 *p = databuff; - u32 temp; - - if (srcaddr & 3) - return DSL_DEV_MEI_ERR_FAILURE; - - // Set the read transfer address - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DX_AD, srcaddr); - - // Read the data popped across DMA - while (databuffsize--) { - IFX_MEI_LongWordReadOffset (pDev, (u32) ME_DX_DATA, &temp); - if (databuff == (u32 *) DSL_DEV_PRIVATE(pDev)->CMV_RxMsg) // swap half word - MEI_HALF_WORD_SWAP (temp); - *p = temp; - p++; - } - - return DSL_DEV_MEI_ERR_SUCCESS; - -} - -/** - * Switch the ARC control mode - * This function switchs the ARC control mode to JTAG mode or MEI mode - * - * \param pDev the device pointer - * \param mode The mode want to switch: JTAG_MASTER_MODE or MEI_MASTER_MODE. - * \ingroup Internal - */ -static void -IFX_MEI_ControlModeSet (DSL_DEV_Device_t * pDev, int mode) -{ - u32 temp = 0x0; - - IFX_MEI_LongWordReadOffset (pDev, (u32) ME_DBG_MASTER, &temp); - switch (mode) { - case JTAG_MASTER_MODE: - temp &= ~(HOST_MSTR); - break; - case MEI_MASTER_MODE: - temp |= (HOST_MSTR); - break; - default: - IFX_MEI_EMSG ("IFX_MEI_ControlModeSet: unkonwn mode [%d]\n", mode); - return; - } - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DBG_MASTER, temp); -} - -/** - * Disable ARC to MEI interrupt - * - * \param pDev the device pointer - * \ingroup Internal - */ -static void -IFX_MEI_IRQDisable (DSL_DEV_Device_t * pDev) -{ - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ARC2ME_MASK, 0x0); -} - -/** - * Eable ARC to MEI interrupt - * - * \param pDev the device pointer - * \ingroup Internal - */ -static void -IFX_MEI_IRQEnable (DSL_DEV_Device_t * pDev) -{ - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ARC2ME_MASK, MSGAV_EN); -} - -/** - * Poll for transaction complete signal - * This function polls and waits for transaction complete signal. - * - * \param pDev the device pointer - * \ingroup Internal - */ -static void -meiPollForDbgDone (DSL_DEV_Device_t * pDev) -{ - u32 query = 0; - int i = 0; - - while (i < WHILE_DELAY) { - IFX_MEI_LongWordReadOffset (pDev, (u32) ME_ARC2ME_STAT, &query); - query &= (ARC_TO_MEI_DBG_DONE); - if (query) - break; - i++; - if (i == WHILE_DELAY) { - IFX_MEI_EMSG ("PollforDbg fail!\n"); - } - } - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ARC2ME_STAT, ARC_TO_MEI_DBG_DONE); // to clear this interrupt -} - -/** - * ARC Debug Memory Access for a single DWORD reading. - * This function used for direct, address-based access to ARC memory. - * - * \param pDev the device pointer - * \param DEC_mode ARC memory space to used - * \param address Address to read - * \param data Pointer to data - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -_IFX_MEI_DBGLongWordRead (DSL_DEV_Device_t * pDev, u32 DEC_mode, - u32 address, u32 * data) -{ - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DBG_DECODE, DEC_mode); - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DBG_RD_AD, address); - meiPollForDbgDone (pDev); - IFX_MEI_LongWordReadOffset (pDev, (u32) ME_DBG_DATA, data); - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * ARC Debug Memory Access for a single DWORD writing. - * This function used for direct, address-based access to ARC memory. - * - * \param pDev the device pointer - * \param DEC_mode ARC memory space to used - * \param address The address to write - * \param data The data to write - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -_IFX_MEI_DBGLongWordWrite (DSL_DEV_Device_t * pDev, u32 DEC_mode, - u32 address, u32 data) -{ - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DBG_DECODE, DEC_mode); - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DBG_WR_AD, address); - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_DBG_DATA, data); - meiPollForDbgDone (pDev); - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * ARC Debug Memory Access for writing. - * This function used for direct, address-based access to ARC memory. - * - * \param pDev the device pointer - * \param destaddr The address to read - * \param databuffer Pointer to data - * \param databuffsize The number of DWORDs to read - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ - -static DSL_DEV_MeiError_t -IFX_MEI_DebugWrite (DSL_DEV_Device_t * pDev, u32 destaddr, - u32 * databuff, u32 databuffsize) -{ - u32 i; - u32 temp = 0x0; - u32 address = 0x0; - u32 *buffer = 0x0; - - // Open the debug port before DMP memory write - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); - - // For the requested length, write the address and write the data - address = destaddr; - buffer = databuff; - for (i = 0; i < databuffsize; i++) { - temp = *buffer; - _IFX_MEI_DBGLongWordWrite (pDev, ME_DBG_DECODE_DMP1_MASK, address, temp); - address += 4; - buffer++; - } - - // Close the debug port after DMP memory write - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * ARC Debug Memory Access for reading. - * This function used for direct, address-based access to ARC memory. - * - * \param pDev the device pointer - * \param srcaddr The address to read - * \param databuffer Pointer to data - * \param databuffsize The number of DWORDs to read - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_DebugRead (DSL_DEV_Device_t * pDev, u32 srcaddr, u32 * databuff, u32 databuffsize) -{ - u32 i; - u32 temp = 0x0; - u32 address = 0x0; - u32 *buffer = 0x0; - - // Open the debug port before DMP memory read - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); - - // For the requested length, write the address and read the data - address = srcaddr; - buffer = databuff; - for (i = 0; i < databuffsize; i++) { - _IFX_MEI_DBGLongWordRead (pDev, ME_DBG_DECODE_DMP1_MASK, address, &temp); - *buffer = temp; - address += 4; - buffer++; - } - - // Close the debug port after DMP memory read - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * Send a message to ARC MailBox. - * This function sends a message to ARC Mailbox via ARC DMA interface. - * - * \param pDev the device pointer - * \param msgsrcbuffer Pointer to message. - * \param msgsize The number of words to write. - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_MailboxWrite (DSL_DEV_Device_t * pDev, u16 * msgsrcbuffer, - u16 msgsize) -{ - int i; - u32 arc_mailbox_status = 0x0; - u32 temp = 0; - DSL_DEV_MeiError_t meiMailboxError = DSL_DEV_MEI_ERR_SUCCESS; - - // Write to mailbox - meiMailboxError = - IFX_MEI_DMAWrite (pDev, MEI_TO_ARC_MAILBOX, (u32 *) msgsrcbuffer, msgsize / 2); - meiMailboxError = - IFX_MEI_DMAWrite (pDev, MEI_TO_ARC_MAILBOXR, (u32 *) (&temp), 1); - - // Notify arc that mailbox write completed - DSL_DEV_PRIVATE(pDev)->cmv_waiting = 1; - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ME2ARC_INT, MEI_TO_ARC_MSGAV); - - i = 0; - while (i < WHILE_DELAY) { // wait for ARC to clear the bit - IFX_MEI_LongWordReadOffset (pDev, (u32) ME_ME2ARC_INT, &arc_mailbox_status); - if ((arc_mailbox_status & MEI_TO_ARC_MSGAV) != MEI_TO_ARC_MSGAV) - break; - i++; - if (i == WHILE_DELAY) { - IFX_MEI_EMSG (">>> Timeout waiting for ARC to clear MEI_TO_ARC_MSGAV!!!" - " MEI_TO_ARC message size = %d DWORDs <<<\n", msgsize/2); - meiMailboxError = DSL_DEV_MEI_ERR_FAILURE; - } - } - - return meiMailboxError; -} - -/** - * Read a message from ARC MailBox. - * This function reads a message from ARC Mailbox via ARC DMA interface. - * - * \param pDev the device pointer - * \param msgsrcbuffer Pointer to message. - * \param msgsize The number of words to read - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_MailboxRead (DSL_DEV_Device_t * pDev, u16 * msgdestbuffer, - u16 msgsize) -{ - DSL_DEV_MeiError_t meiMailboxError = DSL_DEV_MEI_ERR_SUCCESS; - // Read from mailbox - meiMailboxError = - IFX_MEI_DMARead (pDev, ARC_TO_MEI_MAILBOX, (u32 *) msgdestbuffer, msgsize / 2); - - // Notify arc that mailbox read completed - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ARC2ME_STAT, ARC_TO_MEI_MSGAV); - - return meiMailboxError; -} - -/** - * Download boot pages to ARC. - * This function downloads boot pages to ARC. - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_DownloadBootPages (DSL_DEV_Device_t * pDev) -{ - int boot_loop; - int page_size; - u32 dest_addr; - - /* - ** DMA the boot code page(s) - */ - - for (boot_loop = 1; - boot_loop < - (DSL_DEV_PRIVATE(pDev)->img_hdr-> count); boot_loop++) { - if ((DSL_DEV_PRIVATE(pDev)-> img_hdr->page[boot_loop].p_size) & BOOT_FLAG) { - page_size = IFX_MEI_GetPage (pDev, boot_loop, - GET_PROG, MAXSWAPSIZE, - mei_arc_swap_buff, - &dest_addr); - if (page_size > 0) { - IFX_MEI_DMAWrite (pDev, dest_addr, - mei_arc_swap_buff, - page_size); - } - } - if ((DSL_DEV_PRIVATE(pDev)-> img_hdr->page[boot_loop].d_size) & BOOT_FLAG) { - page_size = IFX_MEI_GetPage (pDev, boot_loop, - GET_DATA, MAXSWAPSIZE, - mei_arc_swap_buff, - &dest_addr); - if (page_size > 0) { - IFX_MEI_DMAWrite (pDev, dest_addr, - mei_arc_swap_buff, - page_size); - } - } - } - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * Initial efuse rar. - **/ -static void -IFX_MEI_FuseInit (DSL_DEV_Device_t * pDev) -{ - u32 data = 0; - IFX_MEI_DMAWrite (pDev, IRAM0_BASE, &data, 1); - IFX_MEI_DMAWrite (pDev, IRAM0_BASE + 4, &data, 1); - IFX_MEI_DMAWrite (pDev, IRAM1_BASE, &data, 1); - IFX_MEI_DMAWrite (pDev, IRAM1_BASE + 4, &data, 1); - IFX_MEI_DMAWrite (pDev, BRAM_BASE, &data, 1); - IFX_MEI_DMAWrite (pDev, BRAM_BASE + 4, &data, 1); - IFX_MEI_DMAWrite (pDev, ADSL_DILV_BASE, &data, 1); - IFX_MEI_DMAWrite (pDev, ADSL_DILV_BASE + 4, &data, 1); -} - -/** - * efuse rar program - **/ -static void -IFX_MEI_FuseProg (DSL_DEV_Device_t * pDev) -{ - u32 reg_data, fuse_value; - int i = 0; - - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, ®_data); - while ((reg_data & 0x10000000) == 0) { - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, ®_data); - i++; - /* 0x4000 translate to about 16 ms@111M, so should be enough */ - if (i == 0x4000) - return; - } - // STEP a: Prepare memory for external accesses - // Write fuse_en bit24 - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, ®_data); - IFX_MEI_LongWordWrite ((u32) LTQ_RCU_RST, reg_data | (1 << 24)); - - IFX_MEI_FuseInit (pDev); - for (i = 0; i < 4; i++) { - IFX_MEI_LongWordRead ((u32) (LTQ_FUSE_BASE) + i * 4, &fuse_value); - switch (fuse_value & 0xF0000) { - case 0x80000: - reg_data = ((fuse_value & RX_DILV_ADDR_BIT_MASK) | - (RX_DILV_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, ADSL_DILV_BASE, ®_data, 1); - break; - case 0x90000: - reg_data = ((fuse_value & RX_DILV_ADDR_BIT_MASK) | - (RX_DILV_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, ADSL_DILV_BASE + 4, ®_data, 1); - break; - case 0xA0000: - reg_data = ((fuse_value & IRAM0_ADDR_BIT_MASK) | - (IRAM0_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, IRAM0_BASE, ®_data, 1); - break; - case 0xB0000: - reg_data = ((fuse_value & IRAM0_ADDR_BIT_MASK) | - (IRAM0_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, IRAM0_BASE + 4, ®_data, 1); - break; - case 0xC0000: - reg_data = ((fuse_value & IRAM1_ADDR_BIT_MASK) | - (IRAM1_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, IRAM1_BASE, ®_data, 1); - break; - case 0xD0000: - reg_data = ((fuse_value & IRAM1_ADDR_BIT_MASK) | - (IRAM1_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, IRAM1_BASE + 4, ®_data, 1); - break; - case 0xE0000: - reg_data = ((fuse_value & BRAM_ADDR_BIT_MASK) | - (BRAM_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, BRAM_BASE, ®_data, 1); - break; - case 0xF0000: - reg_data = ((fuse_value & BRAM_ADDR_BIT_MASK) | - (BRAM_ADDR_BIT_MASK + 0x1)); - IFX_MEI_DMAWrite (pDev, BRAM_BASE + 4, ®_data, 1); - break; - default: // PPE efuse - break; - } - } - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, ®_data); - IFX_MEI_LongWordWrite ((u32) LTQ_RCU_RST, reg_data & ~(1 << 24)); - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, ®_data); -} - -/** - * Enable DFE Clock - * This function enables DFE Clock - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_EnableCLK (DSL_DEV_Device_t * pDev) -{ - u32 arc_debug_data = 0; - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); - //enable ac_clk signal - _IFX_MEI_DBGLongWordRead (pDev, ME_DBG_DECODE_DMP1_MASK, - CRI_CCR0, &arc_debug_data); - arc_debug_data |= ACL_CLK_MODE_ENABLE; - _IFX_MEI_DBGLongWordWrite (pDev, ME_DBG_DECODE_DMP1_MASK, - CRI_CCR0, arc_debug_data); - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * Halt the ARC. - * This function halts the ARC. - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_HaltArc (DSL_DEV_Device_t * pDev) -{ - u32 arc_debug_data = 0x0; - - // Switch arc control from JTAG mode to MEI mode - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); - _IFX_MEI_DBGLongWordRead (pDev, MEI_DEBUG_DEC_AUX_MASK, - ARC_DEBUG, &arc_debug_data); - arc_debug_data |= ARC_DEBUG_HALT; - _IFX_MEI_DBGLongWordWrite (pDev, MEI_DEBUG_DEC_AUX_MASK, - ARC_DEBUG, arc_debug_data); - // Switch arc control from MEI mode to JTAG mode - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - MEI_WAIT (10); - - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * Run the ARC. - * This function runs the ARC. - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_RunArc (DSL_DEV_Device_t * pDev) -{ - u32 arc_debug_data = 0x0; - - // Switch arc control from JTAG mode to MEI mode- write '1' to bit0 - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); - _IFX_MEI_DBGLongWordRead (pDev, MEI_DEBUG_DEC_AUX_MASK, - AUX_STATUS, &arc_debug_data); - - // Write debug data reg with content ANDd with 0xFDFFFFFF (halt bit cleared) - arc_debug_data &= ~ARC_AUX_HALT; - _IFX_MEI_DBGLongWordWrite (pDev, MEI_DEBUG_DEC_AUX_MASK, - AUX_STATUS, arc_debug_data); - - // Switch arc control from MEI mode to JTAG mode- write '0' to bit0 - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - // Enable mask for arc codeswap interrupts - IFX_MEI_IRQEnable (pDev); - - return DSL_DEV_MEI_ERR_SUCCESS; - -} - -/** - * Reset the ARC. - * This function resets the ARC. - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_ResetARC (DSL_DEV_Device_t * pDev) -{ - u32 arc_debug_data = 0; - - IFX_MEI_HaltArc (pDev); - - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, &arc_debug_data); - IFX_MEI_LongWordWrite ((u32) LTQ_RCU_RST, - arc_debug_data | LTQ_RCU_RST_REQ_DFE | LTQ_RCU_RST_REQ_AFE); - - // reset ARC - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_RST_CTRL, MEI_SOFT_RESET); - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_RST_CTRL, 0); - - IFX_MEI_IRQDisable (pDev); - - IFX_MEI_EnableCLK (pDev); - -#if 0 - // reset part of PPE - *(unsigned long *) (BSP_PPE32_SRST) = 0xC30; - *(unsigned long *) (BSP_PPE32_SRST) = 0xFFF; -#endif - - DSL_DEV_PRIVATE(pDev)->modem_ready = 0; - - return DSL_DEV_MEI_ERR_SUCCESS; -} - -DSL_DEV_MeiError_t -DSL_BSP_Showtime (DSL_DEV_Device_t * dev, DSL_uint32_t rate_fast, DSL_uint32_t rate_intl) -{ - struct port_cell_info port_cell = {0}; - - IFX_MEI_EMSG ("Datarate US intl = %d, fast = %d\n", (int)rate_intl, - (int)rate_fast); - - if ( rate_fast ) - g_tx_link_rate[0] = rate_fast / (53 * 8); - if ( rate_intl ) - g_tx_link_rate[1] = rate_intl / (53 * 8); - - if ( g_tx_link_rate[0] == 0 && g_tx_link_rate[1] == 0 ) { - IFX_MEI_EMSG ("Got rate fail.\n"); - } - - if ( ifx_mei_atm_showtime_enter ) - { - port_cell.port_num = 2; - port_cell.tx_link_rate[0] = g_tx_link_rate[0]; - port_cell.tx_link_rate[1] = g_tx_link_rate[1]; - ifx_mei_atm_showtime_enter(&port_cell, g_xdata_addr); - } - else - { - IFX_MEI_EMSG("no hookup from ATM driver to set cell rate\n"); - } - - return DSL_DEV_MEI_ERR_SUCCESS; -}; - -/** - * Reset/halt/run the DFE. - * This function provide operations to reset/halt/run the DFE. - * - * \param pDev the device pointer - * \param mode which operation want to do - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_CpuModeSet (DSL_DEV_Device_t *pDev, - DSL_DEV_CpuMode_t mode) -{ - DSL_DEV_MeiError_t err_ret = DSL_DEV_MEI_ERR_FAILURE; - switch (mode) { - case DSL_CPU_HALT: - err_ret = IFX_MEI_HaltArc (pDev); - break; - case DSL_CPU_RUN: - err_ret = IFX_MEI_RunArc (pDev); - break; - case DSL_CPU_RESET: - err_ret = IFX_MEI_ResetARC (pDev); - break; - default: - break; - } - return err_ret; -} - -/** - * Accress DFE memory. - * This function provide a way to access DFE memory; - * - * \param pDev the device pointer - * \param type read or write - * \param destaddr destination address - * \param databuff pointer to hold data - * \param databuffsize size want to read/write - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -DSL_DEV_MeiError_t -DSL_BSP_MemoryDebugAccess (DSL_DEV_Device_t * pDev, - DSL_BSP_MemoryAccessType_t type, - DSL_uint32_t destaddr, DSL_uint32_t *databuff, - DSL_uint32_t databuffsize) -{ - DSL_DEV_MeiError_t meierr = DSL_DEV_MEI_ERR_SUCCESS; - switch (type) { - case DSL_BSP_MEMORY_READ: - meierr = IFX_MEI_DebugRead (pDev, (u32)destaddr, (u32*)databuff, (u32)databuffsize); - break; - case DSL_BSP_MEMORY_WRITE: - meierr = IFX_MEI_DebugWrite (pDev, (u32)destaddr, (u32*)databuff, (u32)databuffsize); - break; - } - return DSL_DEV_MEI_ERR_SUCCESS; -}; - -/** - * Download boot code to ARC. - * This function downloads boot code to ARC. - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_DownloadBootCode (DSL_DEV_Device_t *pDev) -{ - IFX_MEI_IRQDisable (pDev); - - IFX_MEI_EnableCLK (pDev); - - IFX_MEI_FuseProg (pDev); //program fuse rar - - IFX_MEI_DownloadBootPages (pDev); - - return DSL_DEV_MEI_ERR_SUCCESS; -}; - -/** - * Enable Jtag debugger interface - * This function setups mips gpio to enable jtag debugger - * - * \param pDev the device pointer - * \param enable enable or disable - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_ArcJtagEnable (DSL_DEV_Device_t *dev, int enable) -{ - /* - int meierr=0; - u32 reg_data; - switch (enable) { - case 1: - //reserve gpio 9, 10, 11, 14, 19 for ARC JTAG - ifxmips_port_reserve_pin (0, 9); - ifxmips_port_reserve_pin (0, 10); - ifxmips_port_reserve_pin (0, 11); - ifxmips_port_reserve_pin (0, 14); - ifxmips_port_reserve_pin (1, 3); - - ifxmips_port_set_dir_in(0, 11); - ifxmips_port_clear_altsel0(0, 11); - ifxmips_port_clear_altsel1(0, 11); - ifxmips_port_set_open_drain(0, 11); - //enable ARC JTAG - IFX_MEI_LongWordRead ((u32) LTQ_RCU_RST, ®_data); - IFX_MEI_LongWordWrite ((u32) LTQ_RCU_RST, reg_data | LTQ_RCU_RST_REQ_ARC_JTAG); - break; - case 0: - default: - break; - } -jtag_end: - if (meierr) - return DSL_DEV_MEI_ERR_FAILURE; -*/ - - return DSL_DEV_MEI_ERR_SUCCESS; -}; - -/** - * Enable DFE to MIPS interrupt - * This function enable DFE to MIPS interrupt - * - * \param pDev the device pointer - * \param enable enable or disable - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_AdslMailboxIRQEnable (DSL_DEV_Device_t *pDev, int enable) -{ - DSL_DEV_MeiError_t meierr; - switch (enable) { - case 0: - meierr = DSL_DEV_MEI_ERR_SUCCESS; - IFX_MEI_IRQDisable (pDev); - break; - case 1: - IFX_MEI_IRQEnable (pDev); - meierr = DSL_DEV_MEI_ERR_SUCCESS; - break; - default: - meierr = DSL_DEV_MEI_ERR_FAILURE; - break; - - } - return meierr; -} - -/** - * Get the modem status - * This function return the modem status - * - * \param pDev the device pointer - * \return 1: modem ready 0: not ready - * \ingroup Internal - */ -static int -IFX_MEI_IsModemReady (DSL_DEV_Device_t * pDev) -{ - return DSL_DEV_PRIVATE(pDev)->modem_ready; -} - -DSL_DEV_MeiError_t -DSL_BSP_AdslLedInit (DSL_DEV_Device_t * dev, - DSL_DEV_LedId_t led_number, - DSL_DEV_LedType_t type, - DSL_DEV_LedHandler_t handler) -{ -#if 0 - struct led_config_param param; - if (led_number == DSL_LED_LINK_ID && type == DSL_LED_LINK_TYPE && handler == /*DSL_LED_HD_CPU*/DSL_LED_HD_FW) { - param.operation_mask = CONFIG_OPERATION_UPDATE_SOURCE; - param.led = 0x01; - param.source = 0x01; -// bsp_led_config (¶m); - - } else if (led_number == DSL_LED_DATA_ID && type == DSL_LED_DATA_TYPE && (handler == DSL_LED_HD_FW)) { - param.operation_mask = CONFIG_OPERATION_UPDATE_SOURCE; - param.led = 0x02; - param.source = 0x02; -// bsp_led_config (¶m); - } -#endif - return DSL_DEV_MEI_ERR_SUCCESS; -}; -#if 0 -DSL_DEV_MeiError_t -DSL_BSP_AdslLedSet (DSL_DEV_Device_t * dev, DSL_DEV_LedId_t led_number, DSL_DEV_LedMode_t mode) -{ - printk(KERN_INFO "[%s %d]: mode = %#x, led_number = %d\n", __func__, __LINE__, mode, led_number); - switch (mode) { - case DSL_LED_OFF: - switch (led_number) { - case DSL_LED_LINK_ID: -#ifdef CONFIG_BSP_LED - bsp_led_set_blink (1, 0); - bsp_led_set_data (1, 0); -#endif - break; - case DSL_LED_DATA_ID: -#ifdef CONFIG_BSP_LED - bsp_led_set_blink (0, 0); - bsp_led_set_data (0, 0); -#endif - break; - } - break; - case DSL_LED_FLASH: - switch (led_number) { - case DSL_LED_LINK_ID: -#ifdef CONFIG_BSP_LED - bsp_led_set_blink (1, 1); // data -#endif - break; - case DSL_LED_DATA_ID: -#ifdef CONFIG_BSP_LED - bsp_led_set_blink (0, 1); // data -#endif - break; - } - break; - case DSL_LED_ON: - switch (led_number) { - case DSL_LED_LINK_ID: -#ifdef CONFIG_BSP_LED - bsp_led_set_blink (1, 0); - bsp_led_set_data (1, 1); -#endif - break; - case DSL_LED_DATA_ID: -#ifdef CONFIG_BSP_LED - bsp_led_set_blink (0, 0); - bsp_led_set_data (0, 1); -#endif - break; - } - break; - } - return DSL_DEV_MEI_ERR_SUCCESS; -}; - -#endif - -/** -* Compose a message. -* This function compose a message from opcode, group, address, index, size, and data -* -* \param opcode The message opcode -* \param group The message group number -* \param address The message address. -* \param index The message index. -* \param size The number of words to read/write. -* \param data The pointer to data. -* \param CMVMSG The pointer to message buffer. -* \ingroup Internal -*/ -void -makeCMV (u8 opcode, u8 group, u16 address, u16 index, int size, u16 * data, u16 *CMVMSG) -{ - memset (CMVMSG, 0, MSG_LENGTH * 2); - CMVMSG[0] = (opcode << 4) + (size & 0xf); - CMVMSG[1] = (((index == 0) ? 0 : 1) << 7) + (group & 0x7f); - CMVMSG[2] = address; - CMVMSG[3] = index; - if (opcode == H2D_CMV_WRITE) - memcpy (CMVMSG + 4, data, size * 2); - return; -} - -/** - * Send a message to ARC and read the response - * This function sends a message to arc, waits the response, and reads the responses. - * - * \param pDev the device pointer - * \param request Pointer to the request - * \param reply Wait reply or not. - * \param response Pointer to the response - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -DSL_DEV_MeiError_t -DSL_BSP_SendCMV (DSL_DEV_Device_t * pDev, u16 * request, int reply, u16 * response) // write cmv to arc, if reply needed, wait for reply -{ - DSL_DEV_MeiError_t meierror; -#if defined(BSP_PORT_RTEMS) - int delay_counter = 0; -#endif - - if (MEI_MUTEX_LOCK (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema)) - return -ERESTARTSYS; - - DSL_DEV_PRIVATE(pDev)->cmv_reply = reply; - memset (DSL_DEV_PRIVATE(pDev)->CMV_RxMsg, 0, - sizeof (DSL_DEV_PRIVATE(pDev)-> - CMV_RxMsg)); - DSL_DEV_PRIVATE(pDev)->arcmsgav = 0; - - meierror = IFX_MEI_MailboxWrite (pDev, request, MSG_LENGTH); - - if (meierror != DSL_DEV_MEI_ERR_SUCCESS) { - DSL_DEV_PRIVATE(pDev)->cmv_waiting = 0; - DSL_DEV_PRIVATE(pDev)->arcmsgav = 0; - IFX_MEI_EMSG ("MailboxWrite Fail!\n"); - IFX_MEI_EMSG ("Resetting ARC...\n"); - IFX_MEI_ResetARC(pDev); - MEI_MUTEX_UNLOCK (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema); - return meierror; - } - else { - DSL_DEV_PRIVATE(pDev)->cmv_count++; - } - - if (DSL_DEV_PRIVATE(pDev)->cmv_reply == - NO_REPLY) { - MEI_MUTEX_UNLOCK (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema); - return DSL_DEV_MEI_ERR_SUCCESS; - } - -#if !defined(BSP_PORT_RTEMS) - if (DSL_DEV_PRIVATE(pDev)->arcmsgav == 0) - MEI_WAIT_EVENT_TIMEOUT (DSL_DEV_PRIVATE(pDev)->wait_queue_arcmsgav, CMV_TIMEOUT); -#else - while (DSL_DEV_PRIVATE(pDev)->arcmsgav == 0 && delay_counter < CMV_TIMEOUT / 5) { - MEI_WAIT (5); - delay_counter++; - } -#endif - - DSL_DEV_PRIVATE(pDev)->cmv_waiting = 0; - if (DSL_DEV_PRIVATE(pDev)->arcmsgav == 0) { //CMV_timeout - DSL_DEV_PRIVATE(pDev)->arcmsgav = 0; - IFX_MEI_EMSG ("\%s: DSL_DEV_MEI_ERR_MAILBOX_TIMEOUT\n", - __FUNCTION__); - MEI_MUTEX_UNLOCK (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema); - return DSL_DEV_MEI_ERR_MAILBOX_TIMEOUT; - } - else { - DSL_DEV_PRIVATE(pDev)->arcmsgav = 0; - DSL_DEV_PRIVATE(pDev)-> - reply_count++; - memcpy (response, DSL_DEV_PRIVATE(pDev)->CMV_RxMsg, MSG_LENGTH * 2); - MEI_MUTEX_UNLOCK (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema); - return DSL_DEV_MEI_ERR_SUCCESS; - } - MEI_MUTEX_UNLOCK (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema); - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/** - * Reset the ARC, download boot codes, and run the ARC. - * This function resets the ARC, downloads boot codes to ARC, and runs the ARC. - * - * \param pDev the device pointer - * \return DSL_DEV_MEI_ERR_SUCCESS or DSL_DEV_MEI_ERR_FAILURE - * \ingroup Internal - */ -static DSL_DEV_MeiError_t -IFX_MEI_RunAdslModem (DSL_DEV_Device_t *pDev) -{ - int nSize = 0, idx = 0; - uint32_t im0_register, im2_register; -// DSL_DEV_WinHost_Message_t m; - - if (mei_arc_swap_buff == NULL) { - mei_arc_swap_buff = - (u32 *) kmalloc (MAXSWAPSIZE * 4, GFP_KERNEL); - if (mei_arc_swap_buff == NULL) { - IFX_MEI_EMSG (">>> malloc fail for codeswap buff!!! <<<\n"); - return DSL_DEV_MEI_ERR_FAILURE; - } - IFX_MEI_DMSG("allocate %dKB swap buff memory at: 0x%p\n", ksize(mei_arc_swap_buff)/1024, mei_arc_swap_buff); - } - - DSL_DEV_PRIVATE(pDev)->img_hdr = - (ARC_IMG_HDR *) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[0].address; - if ((DSL_DEV_PRIVATE(pDev)->img_hdr-> - count) * sizeof (ARC_SWP_PAGE_HDR) > SDRAM_SEGMENT_SIZE) { - IFX_MEI_EMSG ("firmware header size is bigger than 64K segment size\n"); - return DSL_DEV_MEI_ERR_FAILURE; - } - // check image size - for (idx = 0; idx < MAX_BAR_REGISTERS; idx++) { - nSize += DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].nCopy; - } - if (nSize != - DSL_DEV_PRIVATE(pDev)->image_size) { - IFX_MEI_EMSG ("Firmware download is not completed. Please download firmware again!\n"); - return DSL_DEV_MEI_ERR_FAILURE; - } - // TODO: check crc - /// - - IFX_MEI_ResetARC (pDev); - IFX_MEI_HaltArc (pDev); - IFX_MEI_BarUpdate (pDev, DSL_DEV_PRIVATE(pDev)->nBar); - - //IFX_MEI_DMSG("Starting to meiDownloadBootCode\n"); - - IFX_MEI_DownloadBootCode (pDev); - - im0_register = (*LTQ_ICU_IM0_IER) & (1 << 20); - im2_register = (*LTQ_ICU_IM2_IER) & (1 << 20); - /* Turn off irq */ - #ifdef CONFIG_SOC_AMAZON_SE -#define IFXMIPS_USB_OC_INT0 (INT_NUM_IM4_IRL0 + 23) - disable_irq (IFXMIPS_USB_OC_INT0); -// disable_irq (IFXMIPS_USB_OC_INT2); - #elif defined(CONFIG_SOC_AR9) -#define IFXMIPS_USB_OC_INT0 (INT_NUM_IM4_IRL1 + 28) - disable_irq (IFXMIPS_USB_OC_INT0); -// disable_irq (IFXMIPS_USB_OC_INT2); - #elif defined(CONFIG_SOC_XWAY) - disable_irq (LTQ_USB_OC_INT); - #else - #error unkonwn arch - #endif - disable_irq (pDev->nIrq[IFX_DYING_GASP]); - - IFX_MEI_RunArc (pDev); - - MEI_WAIT_EVENT_TIMEOUT (DSL_DEV_PRIVATE(pDev)->wait_queue_modemready, 1000); - - #ifdef CONFIG_SOC_AMAZON_SE - MEI_MASK_AND_ACK_IRQ (IFXMIPS_USB_OC_INT0); -// MEI_MASK_AND_ACK_IRQ (IFXMIPS_USB_OC_INT2); - #elif defined(CONFIG_SOC_AR9) - MEI_MASK_AND_ACK_IRQ (IFXMIPS_USB_OC_INT0); -// MEI_MASK_AND_ACK_IRQ (IFXMIPS_USB_OC_INT2); - #elif defined(CONFIG_SOC_XWAY) - MEI_MASK_AND_ACK_IRQ (LTQ_USB_OC_INT); - #else - #error unkonwn arch - #endif - MEI_MASK_AND_ACK_IRQ (pDev->nIrq[IFX_DYING_GASP]); - - /* Re-enable irq */ - enable_irq(pDev->nIrq[IFX_DYING_GASP]); - *LTQ_ICU_IM0_IER |= im0_register; - *LTQ_ICU_IM2_IER |= im2_register; - - if (DSL_DEV_PRIVATE(pDev)->modem_ready != 1) { - IFX_MEI_EMSG ("Modem failed to be ready!\n"); - return DSL_DEV_MEI_ERR_FAILURE; - } else { - IFX_MEI_DMSG("Modem is ready.\n"); - return DSL_DEV_MEI_ERR_SUCCESS; - } -} - -/** - * Get the page's data pointer - * This function caculats the data address from the firmware header. - * - * \param pDev the device pointer - * \param Page The page number. - * \param data Data page or program page. - * \param MaxSize The maximum size to read. - * \param Buffer Pointer to data. - * \param Dest Pointer to the destination address. - * \return The number of bytes to read. - * \ingroup Internal - */ -static int -IFX_MEI_GetPage (DSL_DEV_Device_t * pDev, u32 Page, u32 data, - u32 MaxSize, u32 * Buffer, u32 * Dest) -{ - u32 size; - u32 i; - u32 *p; - u32 idx, offset, nBar = 0; - - if (Page > DSL_DEV_PRIVATE(pDev)->img_hdr->count) - return -2; - /* - ** Get program or data size, depending on "data" flag - */ - size = (data == GET_DATA) ? (DSL_DEV_PRIVATE(pDev)->img_hdr->page[Page].d_size) : - (DSL_DEV_PRIVATE(pDev)->img_hdr->page[Page].p_size); - size &= BOOT_FLAG_MASK; // Clear boot bit! - if (size > MaxSize) - return -1; - - if (size == 0) - return 0; - /* - ** Get program or data offset, depending on "data" flag - */ - i = data ? (DSL_DEV_PRIVATE(pDev)->img_hdr->page[Page].d_offset) : - (DSL_DEV_PRIVATE(pDev)->img_hdr->page[Page].p_offset); - - /* - ** Copy data/program to buffer - */ - - idx = i / SDRAM_SEGMENT_SIZE; - offset = i % SDRAM_SEGMENT_SIZE; - p = (u32 *) ((u8 *) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].address + offset); - - for (i = 0; i < size; i++) { - if (offset + i * 4 - (nBar * SDRAM_SEGMENT_SIZE) >= SDRAM_SEGMENT_SIZE) { - idx++; - nBar++; - p = (u32 *) ((u8 *) KSEG1ADDR ((u32)DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].address)); - } - Buffer[i] = *p++; - } - - /* - ** Pass back data/program destination address - */ - *Dest = data ? (DSL_DEV_PRIVATE(pDev)-> img_hdr->page[Page].d_dest) : - (DSL_DEV_PRIVATE(pDev)->img_hdr->page[Page].p_dest); - - return size; -} - -/** - * Free the memory for ARC firmware - * - * \param pDev the device pointer - * \param type Free all memory or free the unused memory after showtime - * \ingroup Internal - */ -const char *free_str[4] = {"Invalid", "Free_Reload", "Free_Showtime", "Free_All"}; -static int -IFX_MEI_DFEMemoryFree (DSL_DEV_Device_t * pDev, int type) -{ - int idx = 0; - smmu_mem_info_t *adsl_mem_info = - DSL_DEV_PRIVATE(pDev)->adsl_mem_info; - - for (idx = 0; idx < MAX_BAR_REGISTERS; idx++) { - if (type == FREE_ALL ||adsl_mem_info[idx].type == type) { - if (adsl_mem_info[idx].size > 0) { - IFX_MEI_DMSG ("Freeing memory %p (%s)\n", adsl_mem_info[idx].org_address, free_str[adsl_mem_info[idx].type]); - if ( idx == XDATA_REGISTER ) { - g_xdata_addr = NULL; - if ( ifx_mei_atm_showtime_exit ) - ifx_mei_atm_showtime_exit(); - } - kfree (adsl_mem_info[idx].org_address); - adsl_mem_info[idx].org_address = 0; - adsl_mem_info[idx].address = 0; - adsl_mem_info[idx].size = 0; - adsl_mem_info[idx].type = 0; - adsl_mem_info[idx].nCopy = 0; - } - } - } - - if(mei_arc_swap_buff != NULL){ - IFX_MEI_DMSG("free %dKB swap buff memory at: 0x%p\n", ksize(mei_arc_swap_buff)/1024, mei_arc_swap_buff); - kfree(mei_arc_swap_buff); - mei_arc_swap_buff=NULL; - } - - return 0; -} -static int -IFX_MEI_DFEMemoryAlloc (DSL_DEV_Device_t * pDev, long size) -{ - unsigned long mem_ptr; - char *org_mem_ptr = NULL; - int idx = 0; - long total_size = 0; - int err = 0; - smmu_mem_info_t *adsl_mem_info = - ((ifx_mei_device_private_t *) pDev->pPriv)->adsl_mem_info; -// DSL_DEV_PRIVATE(pDev)->adsl_mem_info; - int allocate_size = SDRAM_SEGMENT_SIZE; - - IFX_MEI_DMSG("image_size = %ld\n", size); - // Alloc Swap Pages - for (idx = 0; size > 0 && idx < MAX_BAR_REGISTERS; idx++) { - // skip bar15 for XDATA usage. - if (idx == XDATA_REGISTER) - continue; -#if 0 - if (size < SDRAM_SEGMENT_SIZE) { - allocate_size = size; - if (allocate_size < 1024) - allocate_size = 1024; - } -#endif - if (idx == (MAX_BAR_REGISTERS - 1)) - allocate_size = size; - else - allocate_size = SDRAM_SEGMENT_SIZE; - org_mem_ptr = kmalloc (allocate_size + 1024, GFP_KERNEL); - if (org_mem_ptr == NULL) { - IFX_MEI_EMSG ("%d: kmalloc %d bytes memory fail!\n", idx, allocate_size); - err = -ENOMEM; - goto allocate_error; - } - mem_ptr = (unsigned long) (org_mem_ptr + 1023) & ~(1024 -1); - adsl_mem_info[idx].address = (char *) mem_ptr; - adsl_mem_info[idx].org_address = org_mem_ptr; - adsl_mem_info[idx].size = allocate_size; - size -= allocate_size; - total_size += allocate_size; - } - if (size > 0) { - IFX_MEI_EMSG ("Image size is too large!\n"); - err = -EFBIG; - goto allocate_error; - } - err = idx; - return err; - - allocate_error: - IFX_MEI_DFEMemoryFree (pDev, FREE_ALL); - return err; -} - -/** - * Program the BAR registers - * - * \param pDev the device pointer - * \param nTotalBar The number of bar to program. - * \ingroup Internal - */ -static int -IFX_MEI_BarUpdate (DSL_DEV_Device_t * pDev, int nTotalBar) -{ - int idx = 0; - smmu_mem_info_t *adsl_mem_info = - DSL_DEV_PRIVATE(pDev)->adsl_mem_info; - - for (idx = 0; idx < nTotalBar; idx++) { - //skip XDATA register - if (idx == XDATA_REGISTER) - continue; - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_XMEM_BAR_BASE + idx * 4, - (((uint32_t) adsl_mem_info[idx].address) & 0x0FFFFFFF)); - } - for (idx = nTotalBar; idx < MAX_BAR_REGISTERS; idx++) { - if (idx == XDATA_REGISTER) - continue; - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_XMEM_BAR_BASE + idx * 4, - (((uint32_t)adsl_mem_info[nTotalBar - 1].address) & 0x0FFFFFFF)); - /* These are for /proc/danube_mei/meminfo purpose */ - adsl_mem_info[idx].address = adsl_mem_info[nTotalBar - 1].address; - adsl_mem_info[idx].org_address = adsl_mem_info[nTotalBar - 1].org_address; - adsl_mem_info[idx].size = 0; /* Prevent it from being freed */ - } - - g_xdata_addr = adsl_mem_info[XDATA_REGISTER].address; - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_XMEM_BAR_BASE + XDATA_REGISTER * 4, - (((uint32_t) adsl_mem_info [XDATA_REGISTER].address) & 0x0FFFFFFF)); - // update MEI_XDATA_BASE_SH - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_XDATA_BASE_SH, - ((unsigned long)adsl_mem_info[XDATA_REGISTER].address) & 0x0FFFFFFF); - - return DSL_DEV_MEI_ERR_SUCCESS; -} - -/* This copies the firmware from secondary storage to 64k memory segment in SDRAM */ -DSL_DEV_MeiError_t -DSL_BSP_FWDownload (DSL_DEV_Device_t * pDev, const char *buf, - unsigned long size, long *loff, long *current_offset) -{ - ARC_IMG_HDR img_hdr_tmp; - smmu_mem_info_t *adsl_mem_info = DSL_DEV_PRIVATE(pDev)->adsl_mem_info; - - size_t nRead = 0, nCopy = 0; - char *mem_ptr; - ssize_t retval = -ENOMEM; - int idx = 0; - - IFX_MEI_DMSG("\n"); - - if (*loff == 0) { - if (size < sizeof (img_hdr_tmp)) { - IFX_MEI_EMSG ("Firmware size is too small!\n"); - return retval; - } - copy_from_user ((char *) &img_hdr_tmp, buf, sizeof (img_hdr_tmp)); - // header of image_size and crc are not included. - DSL_DEV_PRIVATE(pDev)->image_size = le32_to_cpu (img_hdr_tmp.size) + 8; - - if (DSL_DEV_PRIVATE(pDev)->image_size > 1024 * 1024) { - IFX_MEI_EMSG ("Firmware size is too large!\n"); - return retval; - } - // check if arc is halt - IFX_MEI_ResetARC (pDev); - IFX_MEI_HaltArc (pDev); - - IFX_MEI_DFEMemoryFree (pDev, FREE_ALL); //free all - - retval = IFX_MEI_DFEMemoryAlloc (pDev, DSL_DEV_PRIVATE(pDev)->image_size); - if (retval < 0) { - IFX_MEI_EMSG ("Error: No memory space left.\n"); - goto error; - } - for (idx = 0; idx < retval; idx++) { - //skip XDATA register - if (idx == XDATA_REGISTER) - continue; - if (idx * SDRAM_SEGMENT_SIZE < le32_to_cpu (img_hdr_tmp.page[0].p_offset)) - adsl_mem_info[idx].type = FREE_RELOAD; - else - adsl_mem_info[idx].type = FREE_SHOWTIME; - } - DSL_DEV_PRIVATE(pDev)->nBar = retval; - - DSL_DEV_PRIVATE(pDev)->img_hdr = - (ARC_IMG_HDR *) adsl_mem_info[0].address; - - adsl_mem_info[XDATA_REGISTER].org_address = kmalloc (SDRAM_SEGMENT_SIZE + 1024, GFP_KERNEL); - adsl_mem_info[XDATA_REGISTER].address = - (char *) ((unsigned long) (adsl_mem_info[XDATA_REGISTER].org_address + 1023) & 0xFFFFFC00); - - adsl_mem_info[XDATA_REGISTER].size = SDRAM_SEGMENT_SIZE; - - if (adsl_mem_info[XDATA_REGISTER].address == NULL) { - IFX_MEI_EMSG ("kmalloc memory fail!\n"); - retval = -ENOMEM; - goto error; - } - adsl_mem_info[XDATA_REGISTER].type = FREE_RELOAD; - IFX_MEI_DMSG("-> IFX_MEI_BarUpdate()\n"); - IFX_MEI_BarUpdate (pDev, (DSL_DEV_PRIVATE(pDev)->nBar)); - } - else if (DSL_DEV_PRIVATE(pDev)-> image_size == 0) { - IFX_MEI_EMSG ("Error: Firmware size=0! \n"); - goto error; - } - - nRead = 0; - while (nRead < size) { - long offset = ((long) (*loff) + nRead) % SDRAM_SEGMENT_SIZE; - idx = (((long) (*loff)) + nRead) / SDRAM_SEGMENT_SIZE; - mem_ptr = (char *) KSEG1ADDR ((unsigned long) (adsl_mem_info[idx].address) + offset); - if ((size - nRead + offset) > SDRAM_SEGMENT_SIZE) - nCopy = SDRAM_SEGMENT_SIZE - offset; - else - nCopy = size - nRead; - copy_from_user (mem_ptr, buf + nRead, nCopy); - for (offset = 0; offset < (nCopy / 4); offset++) { - ((unsigned long *) mem_ptr)[offset] = le32_to_cpu (((unsigned long *) mem_ptr)[offset]); - } - nRead += nCopy; - adsl_mem_info[idx].nCopy += nCopy; - } - - *loff += size; - *current_offset = size; - return DSL_DEV_MEI_ERR_SUCCESS; -error: - IFX_MEI_DFEMemoryFree (pDev, FREE_ALL); - return DSL_DEV_MEI_ERR_FAILURE; -} -/* - * Register a callback event. - * Return: - * -1 if the event already has a callback function registered. - * 0 success - */ -int DSL_BSP_EventCBRegister(DSL_BSP_EventCallBack_t *p) -{ - if (!p) { - IFX_MEI_EMSG("Invalid parameter!\n"); - return -EINVAL; - } - if (p->event > DSL_BSP_CB_LAST || p->event < DSL_BSP_CB_FIRST) { - IFX_MEI_EMSG("Invalid Event %d\n", p->event); - return -EINVAL; - } - if (dsl_bsp_event_callback[p->event].function) { - IFX_MEI_EMSG("Event %d already has a callback function registered!\n", p->event); - return -1; - } else { - dsl_bsp_event_callback[p->event].function = p->function; - dsl_bsp_event_callback[p->event].event = p->event; - dsl_bsp_event_callback[p->event].pData = p->pData; - } - return 0; -} -int DSL_BSP_EventCBUnregister(DSL_BSP_EventCallBack_t *p) -{ - if (!p) { - IFX_MEI_EMSG("Invalid parameter!\n"); - return -EINVAL; - } - if (p->event > DSL_BSP_CB_LAST || p->event < DSL_BSP_CB_FIRST) { - IFX_MEI_EMSG("Invalid Event %d\n", p->event); - return -EINVAL; - } - if (dsl_bsp_event_callback[p->event].function) { - IFX_MEI_EMSG("Unregistering Event %d...\n", p->event); - dsl_bsp_event_callback[p->event].function = NULL; - dsl_bsp_event_callback[p->event].pData = NULL; - } else { - IFX_MEI_EMSG("Event %d is not registered!\n", p->event); - return -1; - } - return 0; -} - -/** - * MEI Dying Gasp interrupt handler - * - * \param int1 - * \param void0 - * \param regs Pointer to the structure of danube mips registers - * \ingroup Internal - */ -static irqreturn_t IFX_MEI_Dying_Gasp_IrqHandle (int int1, void *void0) -{ - DSL_DEV_Device_t *pDev = (DSL_DEV_Device_t *) void0; - DSL_BSP_CB_Type_t event; - - if (pDev == NULL) - IFX_MEI_EMSG("Error: Got Interrupt but pDev is NULL!!!!\n"); - -#ifndef CONFIG_SMP - disable_irq (pDev->nIrq[IFX_DYING_GASP]); -#else - disable_irq_nosync(pDev->nIrq[IFX_DYING_GASP]); -#endif - event = DSL_BSP_CB_DYING_GASP; - - if (dsl_bsp_event_callback[event].function) - (*dsl_bsp_event_callback[event].function)(pDev, event, dsl_bsp_event_callback[event].pData); - -#ifdef CONFIG_USE_EMULATOR - IFX_MEI_EMSG("Dying Gasp! Shutting Down... (Work around for Amazon-S Venus emulator)\n"); -#else - IFX_MEI_EMSG("Dying Gasp! Shutting Down...\n"); -// kill_proc (1, SIGINT, 1); /* Ask init to reboot us */ -#endif - return IRQ_HANDLED; -} - -extern void ifx_usb_enable_afe_oc(void); - -/** - * MEI interrupt handler - * - * \param int1 - * \param void0 - * \param regs Pointer to the structure of danube mips registers - * \ingroup Internal - */ -static irqreturn_t IFX_MEI_IrqHandle (int int1, void *void0) -{ - u32 scratch; - DSL_DEV_Device_t *pDev = (DSL_DEV_Device_t *) void0; -#if defined(CONFIG_LTQ_MEI_FW_LOOPBACK) && defined(DFE_PING_TEST) - dfe_loopback_irq_handler (pDev); - return IRQ_HANDLED; -#endif //CONFIG_AMAZON_S_MEI_FW_LOOPBACK - DSL_BSP_CB_Type_t event; - - if (pDev == NULL) - IFX_MEI_EMSG("Error: Got Interrupt but pDev is NULL!!!!\n"); - - IFX_MEI_DebugRead (pDev, ARC_MEI_MAILBOXR, &scratch, 1); - if (scratch & OMB_CODESWAP_MESSAGE_MSG_TYPE_MASK) { - IFX_MEI_EMSG("Receive Code Swap Request interrupt!!!\n"); - return IRQ_HANDLED; - } - else if (scratch & OMB_CLEAREOC_INTERRUPT_CODE) { - // clear eoc message interrupt - IFX_MEI_DMSG("OMB_CLEAREOC_INTERRUPT_CODE\n"); - event = DSL_BSP_CB_CEOC_IRQ; - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ARC2ME_STAT, ARC_TO_MEI_MSGAV); - if (dsl_bsp_event_callback[event].function) - (*dsl_bsp_event_callback[event].function)(pDev, event, dsl_bsp_event_callback[event].pData); - } else if (scratch & OMB_REBOOT_INTERRUPT_CODE) { - // Reboot - IFX_MEI_DMSG("OMB_REBOOT_INTERRUPT_CODE\n"); - event = DSL_BSP_CB_FIRMWARE_REBOOT; - - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_ARC2ME_STAT, ARC_TO_MEI_MSGAV); - - if (dsl_bsp_event_callback[event].function) - (*dsl_bsp_event_callback[event].function)(pDev, event, dsl_bsp_event_callback[event].pData); - } else { // normal message - IFX_MEI_MailboxRead (pDev, DSL_DEV_PRIVATE(pDev)->CMV_RxMsg, MSG_LENGTH); - if (DSL_DEV_PRIVATE(pDev)-> cmv_waiting == 1) { - DSL_DEV_PRIVATE(pDev)-> arcmsgav = 1; - DSL_DEV_PRIVATE(pDev)-> cmv_waiting = 0; -#if !defined(BSP_PORT_RTEMS) - MEI_WAKEUP_EVENT (DSL_DEV_PRIVATE(pDev)->wait_queue_arcmsgav); -#endif - } - else { - DSL_DEV_PRIVATE(pDev)-> modem_ready_cnt++; - memcpy ((char *) DSL_DEV_PRIVATE(pDev)->Recent_indicator, - (char *) DSL_DEV_PRIVATE(pDev)->CMV_RxMsg, MSG_LENGTH * 2); - if (((DSL_DEV_PRIVATE(pDev)->CMV_RxMsg[0] & 0xff0) >> 4) == D2H_AUTONOMOUS_MODEM_READY_MSG) { - //check ARC ready message - IFX_MEI_DMSG ("Got MODEM_READY_MSG\n"); - DSL_DEV_PRIVATE(pDev)->modem_ready = 1; - MEI_WAKEUP_EVENT (DSL_DEV_PRIVATE(pDev)->wait_queue_modemready); - } - } - } - - return IRQ_HANDLED; -} - -int -DSL_BSP_ATMLedCBRegister (int (*ifx_adsl_ledcallback) (void)) -{ - g_adsl_ledcallback = ifx_adsl_ledcallback; - return 0; -} - -int -DSL_BSP_ATMLedCBUnregister (int (*ifx_adsl_ledcallback) (void)) -{ - g_adsl_ledcallback = adsl_dummy_ledcallback; - return 0; -} - -#if 0 -int -DSL_BSP_EventCBRegister (int (*ifx_adsl_callback) - (DSL_BSP_CB_Event_t * param)) -{ - int error = 0; - - if (DSL_EventCB == NULL) { - DSL_EventCB = ifx_adsl_callback; - } - else { - error = -EIO; - } - return error; -} - -int -DSL_BSP_EventCBUnregister (int (*ifx_adsl_callback) - (DSL_BSP_CB_Event_t * param)) -{ - int error = 0; - - if (DSL_EventCB == ifx_adsl_callback) { - DSL_EventCB = NULL; - } - else { - error = -EIO; - } - return error; -} - -static int -DSL_BSP_GetEventCB (int (**ifx_adsl_callback) - (DSL_BSP_CB_Event_t * param)) -{ - *ifx_adsl_callback = DSL_EventCB; - return 0; -} -#endif - -#ifdef CONFIG_LTQ_MEI_FW_LOOPBACK -#define mte_reg_base (0x4800*4+0x20000) - -/* Iridia Registers Address Constants */ -#define MTE_Reg(r) (int)(mte_reg_base + (r*4)) - -#define IT_AMODE MTE_Reg(0x0004) - -#define TIMER_DELAY (1024) -#define BC0_BYTES (32) -#define BC1_BYTES (30) -#define NUM_MB (12) -#define TIMEOUT_VALUE 2000 - -static void -BFMWait (u32 cycle) -{ - u32 i; - for (i = 0; i < cycle; i++); -} - -static void -WriteRegLong (u32 addr, u32 data) -{ - //*((volatile u32 *)(addr)) = data; - IFX_MEI_WRITE_REGISTER_L (data, addr); -} - -static u32 -ReadRegLong (u32 addr) -{ - // u32 rd_val; - //rd_val = *((volatile u32 *)(addr)); - // return rd_val; - return IFX_MEI_READ_REGISTER_L (addr); -} - -/* This routine writes the mailbox with the data in an input array */ -static void -WriteMbox (u32 * mboxarray, u32 size) -{ - IFX_MEI_DebugWrite (&dsl_devices[0], IMBOX_BASE, mboxarray, size); - IFX_MEI_DMSG("write to %X\n", IMBOX_BASE); - IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_ME2ARC_INT, MEI_TO_ARC_MSGAV); -} - -/* This routine reads the output mailbox and places the results into an array */ -static void -ReadMbox (u32 * mboxarray, u32 size) -{ - IFX_MEI_DebugRead (&dsl_devices[0], OMBOX_BASE, mboxarray, size); - IFX_MEI_DMSG("read from %X\n", OMBOX_BASE); -} - -static void -MEIWriteARCValue (u32 address, u32 value) -{ - u32 i, check = 0; - - /* Write address register */ - IFX_MEI_WRITE_REGISTER_L (address, ME_DBG_WR_AD + LTQ_MEI_BASE_ADDR); - - /* Write data register */ - IFX_MEI_WRITE_REGISTER_L (value, ME_DBG_DATA + LTQ_MEI_BASE_ADDR); - - /* wait until complete - timeout at 40 */ - for (i = 0; i < 40; i++) { - check = IFX_MEI_READ_REGISTER_L (ME_ARC2ME_STAT + LTQ_MEI_BASE_ADDR); - - if ((check & ARC_TO_MEI_DBG_DONE)) - break; - } - /* clear the flag */ - IFX_MEI_WRITE_REGISTER_L (ARC_TO_MEI_DBG_DONE, ME_ARC2ME_STAT + LTQ_MEI_BASE_ADDR); -} - -void -arc_code_page_download (uint32_t arc_code_length, uint32_t * start_address) -{ - int count; - - IFX_MEI_DMSG("try to download pages,size=%d\n", arc_code_length); - IFX_MEI_ControlModeSet (&dsl_devices[0], MEI_MASTER_MODE); - IFX_MEI_HaltArc (&dsl_devices[0]); - IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_DX_AD, 0); - for (count = 0; count < arc_code_length; count++) { - IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_DX_DATA, - *(start_address + count)); - } - IFX_MEI_ControlModeSet (&dsl_devices[0], JTAG_MASTER_MODE); -} -static int -load_jump_table (unsigned long addr) -{ - int i; - uint32_t addr_le, addr_be; - uint32_t jump_table[32]; - - for (i = 0; i < 16; i++) { - addr_le = i * 8 + addr; - addr_be = ((addr_le >> 16) & 0xffff); - addr_be |= ((addr_le & 0xffff) << 16); - jump_table[i * 2 + 0] = 0x0f802020; - jump_table[i * 2 + 1] = addr_be; - //printk("jt %X %08X %08X\n",i,jump_table[i*2+0],jump_table[i*2+1]); - } - arc_code_page_download (32, &jump_table[0]); -return 0; -} - -int got_int = 0; - -void -dfe_loopback_irq_handler (DSL_DEV_Device_t *pDev) -{ - uint32_t rd_mbox[10]; - - memset (&rd_mbox[0], 0, 10 * 4); - ReadMbox (&rd_mbox[0], 6); - if (rd_mbox[0] == 0x0) { - FX_MEI_DMSG("Get ARC_ACK\n"); - got_int = 1; - } - else if (rd_mbox[0] == 0x5) { - IFX_MEI_DMSG("Get ARC_BUSY\n"); - got_int = 2; - } - else if (rd_mbox[0] == 0x3) { - IFX_MEI_DMSG("Get ARC_EDONE\n"); - if (rd_mbox[1] == 0x0) { - got_int = 3; - IFX_MEI_DMSG("Get E_MEMTEST\n"); - if (rd_mbox[2] != 0x1) { - got_int = 4; - IFX_MEI_DMSG("Get Result %X\n", rd_mbox[2]); - } - } - } - IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_ARC2ME_STAT, - ARC_TO_MEI_DBG_DONE); - MEI_MASK_AND_ACK_IRQ (pDev->nIrq[IFX_DFEIR]); - disable_irq (pDev->nIrq[IFX_DFEIR]); - //got_int = 1; - return; -} - -static void -wait_mem_test_result (void) -{ - uint32_t mbox[5]; - mbox[0] = 0; - - IFX_MEI_DMSG("Waiting Starting\n"); - while (mbox[0] == 0) { - ReadMbox (&mbox[0], 5); - } - IFX_MEI_DMSG("Try to get mem test result.\n"); - ReadMbox (&mbox[0], 5); - if (mbox[0] == 0xA) { - IFX_MEI_DMSG("Success.\n"); - } - else if (mbox[0] == 0xA) { - IFX_MEI_EMSG("Fail,address %X,except data %X,receive data %X\n", - mbox[1], mbox[2], mbox[3]); - } - else { - IFX_MEI_EMSG("Fail\n"); - } -} - -static int -arc_ping_testing (DSL_DEV_Device_t *pDev) -{ -#define MEI_PING 0x00000001 - uint32_t wr_mbox[10], rd_mbox[10]; - int i; - - for (i = 0; i < 10; i++) { - wr_mbox[i] = 0; - rd_mbox[i] = 0; - } - - FX_MEI_DMSG("send ping msg\n"); - wr_mbox[0] = MEI_PING; - WriteMbox (&wr_mbox[0], 10); - - while (got_int == 0) { - MEI_WAIT (100); - } - - IFX_MEI_DMSG("send start event\n"); - got_int = 0; - - wr_mbox[0] = 0x4; - wr_mbox[1] = 0; - wr_mbox[2] = 0; - wr_mbox[3] = (uint32_t) 0xf5acc307e; - wr_mbox[4] = 5; - wr_mbox[5] = 2; - wr_mbox[6] = 0x1c000; - wr_mbox[7] = 64; - wr_mbox[8] = 0; - wr_mbox[9] = 0; - WriteMbox (&wr_mbox[0], 10); - DSL_ENABLE_IRQ (pDev->nIrq[IFX_DFEIR]); - //printk("IFX_MEI_MailboxWrite ret=%d\n",i); - IFX_MEI_LongWordWriteOffset (&dsl_devices[0], - (u32) ME_ME2ARC_INT, - MEI_TO_ARC_MSGAV); - IFX_MEI_DMSG("sleeping\n"); - while (1) { - if (got_int > 0) { - - if (got_int > 3) - IFX_MEI_DMSG("got_int >>>> 3\n"); - else - IFX_MEI_DMSG("got int = %d\n", got_int); - got_int = 0; - //schedule(); - DSL_ENABLE_IRQ (pDev->nIrq[IFX_DFEIR]); - } - //mbox_read(&rd_mbox[0],6); - MEI_WAIT (100); - } - return 0; -} - -static DSL_DEV_MeiError_t -DFE_Loopback_Test (void) -{ - int i = 0; - u32 arc_debug_data = 0, temp; - DSL_DEV_Device_t *pDev = &dsl_devices[0]; - uint32_t wr_mbox[10]; - - IFX_MEI_ResetARC (pDev); - // start the clock - arc_debug_data = ACL_CLK_MODE_ENABLE; - IFX_MEI_DebugWrite (pDev, CRI_CCR0, &arc_debug_data, 1); - -#if defined( DFE_PING_TEST )|| defined( DFE_ATM_LOOPBACK) - // WriteARCreg(AUX_XMEM_LTEST,0); - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); -#define AUX_XMEM_LTEST 0x128 - _IFX_MEI_DBGLongWordWrite (pDev, MEI_DEBUG_DEC_AUX_MASK, AUX_XMEM_LTEST, 0); - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - // WriteARCreg(AUX_XDMA_GAP,0); - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); -#define AUX_XDMA_GAP 0x114 - _IFX_MEI_DBGLongWordWrite (pDev, MEI_DEBUG_DEC_AUX_MASK, AUX_XDMA_GAP, 0); - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); - temp = 0; - _IFX_MEI_DBGLongWordWrite (pDev, MEI_DEBUG_DEC_AUX_MASK, - (u32) ME_XDATA_BASE_SH + LTQ_MEI_BASE_ADDR, temp); - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - i = IFX_MEI_DFEMemoryAlloc (pDev, SDRAM_SEGMENT_SIZE * 16); - if (i >= 0) { - int idx; - - for (idx = 0; idx < i; idx++) { - DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].type = FREE_RELOAD; - IFX_MEI_WRITE_REGISTER_L ((((uint32_t) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].address) & 0x0fffffff), - LTQ_MEI_BASE_ADDR + ME_XMEM_BAR_BASE + idx * 4); - IFX_MEI_DMSG("bar%d(%X)=%X\n", idx, - LTQ_MEI_BASE_ADDR + ME_XMEM_BAR_BASE + - idx * 4, (((uint32_t) - ((ifx_mei_device_private_t *) - pDev->pPriv)->adsl_mem_info[idx]. - address) & 0x0fffffff)); - memset ((u8 *) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].address, 0, SDRAM_SEGMENT_SIZE); - } - - IFX_MEI_LongWordWriteOffset (pDev, (u32) ME_XDATA_BASE_SH, - ((unsigned long) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[XDATA_REGISTER].address) & 0x0FFFFFFF); - } - else { - IFX_MEI_EMSG ("cannot load image: no memory\n"); - return DSL_DEV_MEI_ERR_FAILURE; - } - //WriteARCreg(AUX_IC_CTRL,2); - IFX_MEI_DMSG("Setting MEI_MASTER_MODE..\n"); - IFX_MEI_ControlModeSet (pDev, MEI_MASTER_MODE); -#define AUX_IC_CTRL 0x11 - _IFX_MEI_DBGLongWordWrite (pDev, MEI_DEBUG_DEC_AUX_MASK, - AUX_IC_CTRL, 2); - IFX_MEI_DMSG("Setting JTAG_MASTER_MODE..\n"); - IFX_MEI_ControlModeSet (pDev, JTAG_MASTER_MODE); - - IFX_MEI_DMSG("Halting ARC...\n"); - IFX_MEI_HaltArc (&dsl_devices[0]); - -#ifdef DFE_PING_TEST - - IFX_MEI_DMSG("ping test image size=%d\n", sizeof (arc_ahb_access_code)); - memcpy ((u8 *) (DSL_DEV_PRIVATE(pDev)-> - adsl_mem_info[0].address + 0x1004), - &arc_ahb_access_code[0], sizeof (arc_ahb_access_code)); - load_jump_table (0x80000 + 0x1004); - -#endif //DFE_PING_TEST - - IFX_MEI_DMSG("ARC ping test code download complete\n"); -#endif //defined( DFE_PING_TEST )|| defined( DFE_ATM_LOOPBACK) -#ifdef DFE_MEM_TEST - IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_ARC2ME_MASK, MSGAV_EN); - - arc_code_page_download (1537, &code_array[0]); - IFX_MEI_DMSG("ARC mem test code download complete\n"); -#endif //DFE_MEM_TEST -#ifdef DFE_ATM_LOOPBACK - arc_debug_data = 0xf; - arc_code_page_download (sizeof(code_array) / sizeof(*code_array), &code_array[0]); - wr_mbox[0] = 0; //TIMER_DELAY - org: 1024 - wr_mbox[1] = 0; //TXFB_START0 - wr_mbox[2] = 0x7f; //TXFB_END0 - org: 49 - wr_mbox[3] = 0x80; //TXFB_START1 - org: 80 - wr_mbox[4] = 0xff; //TXFB_END1 - org: 109 - wr_mbox[5] = 0x100; //RXFB_START0 - org: 0 - wr_mbox[6] = 0x17f; //RXFB_END0 - org: 49 - wr_mbox[7] = 0x180; //RXFB_START1 - org: 256 - wr_mbox[8] = 0x1ff; //RXFB_END1 - org: 315 - WriteMbox (&wr_mbox[0], 9); - // Start Iridia IT_AMODE (in dmp access) why is it required? - IFX_MEI_DebugWrite (&dsl_devices[0], 0x32010, &arc_debug_data, 1); -#endif //DFE_ATM_LOOPBACK - IFX_MEI_IRQEnable (pDev); - IFX_MEI_DMSG("run ARC...\n"); - IFX_MEI_RunArc (&dsl_devices[0]); - -#ifdef DFE_PING_TEST - arc_ping_testing (pDev); -#endif //DFE_PING_TEST -#ifdef DFE_MEM_TEST - wait_mem_test_result (); -#endif //DFE_MEM_TEST - - IFX_MEI_DFEMemoryFree (pDev, FREE_ALL); - return DSL_DEV_MEI_ERR_SUCCESS; -} - -#endif //CONFIG_AMAZON_S_MEI_FW_LOOPBACK - -static int -IFX_MEI_InitDevNode (int num) -{ - if (num == 0) { - if ((dev_major = register_chrdev (dev_major, IFX_MEI_DEVNAME, &bsp_mei_operations)) < 0) { - IFX_MEI_EMSG ("register_chrdev(%d %s) failed!\n", dev_major, IFX_MEI_DEVNAME); - return -ENODEV; - } - } - return 0; -} - -static int -IFX_MEI_CleanUpDevNode (int num) -{ - if (num == 0) - unregister_chrdev (dev_major, MEI_DIRNAME); - return 0; -} - -static int -IFX_MEI_InitDevice (int num) -{ - DSL_DEV_Device_t *pDev; - u32 temp; - pDev = &dsl_devices[num]; - if (pDev == NULL) - return -ENOMEM; - pDev->pPriv = &sDanube_Mei_Private[num]; - memset (pDev->pPriv, 0, sizeof (ifx_mei_device_private_t)); - - memset (&DSL_DEV_PRIVATE(pDev)-> - adsl_mem_info[0], 0, - sizeof (smmu_mem_info_t) * MAX_BAR_REGISTERS); - - if (num == 0) { - pDev->nIrq[IFX_DFEIR] = LTQ_MEI_INT; - pDev->nIrq[IFX_DYING_GASP] = LTQ_MEI_DYING_GASP_INT; - pDev->base_address = KSEG1 + LTQ_MEI_BASE_ADDR; - - /* Power up MEI */ -#ifdef CONFIG_LANTIQ_AMAZON_SE - *LTQ_PMU_PWDCR &= ~(1 << 9); // enable dsl - *LTQ_PMU_PWDCR &= ~(1 << 15); // enable AHB base -#else - temp = ltq_r32(LTQ_PMU_PWDCR); - temp &= 0xffff7dbe; - ltq_w32(temp, LTQ_PMU_PWDCR); -#endif - } - pDev->nInUse = 0; - DSL_DEV_PRIVATE(pDev)->modem_ready = 0; - DSL_DEV_PRIVATE(pDev)->arcmsgav = 0; - - MEI_INIT_WAKELIST ("arcq", DSL_DEV_PRIVATE(pDev)->wait_queue_arcmsgav); // for ARCMSGAV - MEI_INIT_WAKELIST ("arcr", DSL_DEV_PRIVATE(pDev)->wait_queue_modemready); // for arc modem ready - - MEI_MUTEX_INIT (DSL_DEV_PRIVATE(pDev)->mei_cmv_sema, 1); // semaphore initialization, mutex -#if 0 - MEI_MASK_AND_ACK_IRQ (pDev->nIrq[IFX_DFEIR]); - MEI_MASK_AND_ACK_IRQ (pDev->nIrq[IFX_DYING_GASP]); -#endif - if (request_irq (pDev->nIrq[IFX_DFEIR], IFX_MEI_IrqHandle, 0, "DFEIR", pDev) != 0) { - IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DFEIR]); - return -1; - } - /*if (request_irq (pDev->nIrq[IFX_DYING_GASP], IFX_MEI_Dying_Gasp_IrqHandle, 0, "DYING_GASP", pDev) != 0) { - IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DYING_GASP]); - return -1; - }*/ -// IFX_MEI_DMSG("Device %d initialized. IER %#x\n", num, bsp_get_irq_ier(pDev->nIrq[IFX_DYING_GASP])); - return 0; -} - -static int -IFX_MEI_ExitDevice (int num) -{ - DSL_DEV_Device_t *pDev; - pDev = &dsl_devices[num]; - - if (pDev == NULL) - return -EIO; - - disable_irq (pDev->nIrq[IFX_DFEIR]); - disable_irq (pDev->nIrq[IFX_DYING_GASP]); - - free_irq(pDev->nIrq[IFX_DFEIR], pDev); - free_irq(pDev->nIrq[IFX_DYING_GASP], pDev); - - return 0; -} - -static DSL_DEV_Device_t * -IFX_BSP_HandleGet (int maj, int num) -{ - if (num > BSP_MAX_DEVICES) - return NULL; - return &dsl_devices[num]; -} - -DSL_DEV_Device_t * -DSL_BSP_DriverHandleGet (int maj, int num) -{ - DSL_DEV_Device_t *pDev; - - if (num > BSP_MAX_DEVICES) - return NULL; - - pDev = &dsl_devices[num]; - if (!try_module_get(pDev->owner)) - return NULL; - - pDev->nInUse++; - return pDev; -} - -int -DSL_BSP_DriverHandleDelete (DSL_DEV_Device_t * nHandle) -{ - DSL_DEV_Device_t *pDev = (DSL_DEV_Device_t *) nHandle; - if (pDev->nInUse) - pDev->nInUse--; - module_put(pDev->owner); - return 0; -} - -static int -IFX_MEI_Open (DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil) -{ - int maj = MAJOR (ino->i_rdev); - int num = MINOR (ino->i_rdev); - - DSL_DEV_Device_t *pDev = NULL; - if ((pDev = DSL_BSP_DriverHandleGet (maj, num)) == NULL) { - IFX_MEI_EMSG("open(%d:%d) fail!\n", maj, num); - return -EIO; - } - fil->private_data = pDev; - return 0; -} - -static int -IFX_MEI_Release (DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil) -{ - //int maj = MAJOR(ino->i_rdev); - int num = MINOR (ino->i_rdev); - DSL_DEV_Device_t *pDev; - - pDev = &dsl_devices[num]; - if (pDev == NULL) - return -EIO; - DSL_BSP_DriverHandleDelete (pDev); - return 0; -} - -/** - * Callback function for linux userspace program writing - */ -static ssize_t -IFX_MEI_Write (DSL_DRV_file_t * filp, const char *buf, size_t size, loff_t * loff) -{ - DSL_DEV_MeiError_t mei_error = DSL_DEV_MEI_ERR_FAILURE; - long offset = 0; - DSL_DEV_Device_t *pDev = (DSL_DEV_Device_t *) filp->private_data; - - if (pDev == NULL) - return -EIO; - - mei_error = - DSL_BSP_FWDownload (pDev, buf, size, (long *) loff, &offset); - - if (mei_error == DSL_DEV_MEI_ERR_FAILURE) - return -EIO; - return (ssize_t) offset; -} - -/** - * Callback function for linux userspace program ioctling - */ -static int -IFX_MEI_IoctlCopyFrom (int from_kernel, char *dest, char *from, int size) -{ - int ret = 0; - - if (!from_kernel) - ret = copy_from_user ((char *) dest, (char *) from, size); - else - ret = (int)memcpy ((char *) dest, (char *) from, size); - return ret; -} - -static int -IFX_MEI_IoctlCopyTo (int from_kernel, char *dest, char *from, int size) -{ - int ret = 0; - - if (!from_kernel) - ret = copy_to_user ((char *) dest, (char *) from, size); - else - ret = (int)memcpy ((char *) dest, (char *) from, size); - return ret; -} - -static int -IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev, int from_kernel, unsigned int command, unsigned long lon) -{ - int i = 0; - int meierr = DSL_DEV_MEI_ERR_SUCCESS; - u32 base_address = LTQ_MEI_BASE_ADDR; - DSL_DEV_WinHost_Message_t winhost_msg, m; - DSL_DEV_MeiDebug_t debugrdwr; - DSL_DEV_MeiReg_t regrdwr; - - switch (command) { - - case DSL_FIO_BSP_CMV_WINHOST: - IFX_MEI_IoctlCopyFrom (from_kernel, (char *) winhost_msg.msg.TxMessage, - (char *) lon, MSG_LENGTH * 2); - - if ((meierr = DSL_BSP_SendCMV (pDev, winhost_msg.msg.TxMessage, YES_REPLY, - winhost_msg.msg.RxMessage)) != DSL_DEV_MEI_ERR_SUCCESS) { - IFX_MEI_EMSG ("WINHOST CMV fail :TxMessage:%X %X %X %X, RxMessage:%X %X %X %X %X\n", - winhost_msg.msg.TxMessage[0], winhost_msg.msg.TxMessage[1], winhost_msg.msg.TxMessage[2], winhost_msg.msg.TxMessage[3], - winhost_msg.msg.RxMessage[0], winhost_msg.msg.RxMessage[1], winhost_msg.msg.RxMessage[2], winhost_msg.msg.RxMessage[3], - winhost_msg.msg.RxMessage[4]); - meierr = DSL_DEV_MEI_ERR_FAILURE; - } - else { - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, - (char *) winhost_msg.msg.RxMessage, - MSG_LENGTH * 2); - } - break; - - case DSL_FIO_BSP_CMV_READ: - IFX_MEI_IoctlCopyFrom (from_kernel, (char *) (®rdwr), - (char *) lon, sizeof (DSL_DEV_MeiReg_t)); - - IFX_MEI_LongWordRead ((u32) regrdwr.iAddress, - (u32 *) & (regrdwr.iData)); - - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, - (char *) (®rdwr), - sizeof (DSL_DEV_MeiReg_t)); - - break; - - case DSL_FIO_BSP_CMV_WRITE: - IFX_MEI_IoctlCopyFrom (from_kernel, (char *) (®rdwr), - (char *) lon, sizeof (DSL_DEV_MeiReg_t)); - - IFX_MEI_LongWordWrite ((u32) regrdwr.iAddress, - regrdwr.iData); - break; - - case DSL_FIO_BSP_GET_BASE_ADDRESS: - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, - (char *) (&base_address), - sizeof (base_address)); - break; - - case DSL_FIO_BSP_IS_MODEM_READY: - i = IFX_MEI_IsModemReady (pDev); - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, - (char *) (&i), sizeof (int)); - meierr = DSL_DEV_MEI_ERR_SUCCESS; - break; - case DSL_FIO_BSP_RESET: - case DSL_FIO_BSP_REBOOT: - meierr = IFX_MEI_CpuModeSet (pDev, DSL_CPU_RESET); - meierr = IFX_MEI_CpuModeSet (pDev, DSL_CPU_HALT); - break; - - case DSL_FIO_BSP_HALT: - meierr = IFX_MEI_CpuModeSet (pDev, DSL_CPU_HALT); - break; - - case DSL_FIO_BSP_RUN: - meierr = IFX_MEI_CpuModeSet (pDev, DSL_CPU_RUN); - break; - case DSL_FIO_BSP_BOOTDOWNLOAD: - meierr = IFX_MEI_DownloadBootCode (pDev); - break; - case DSL_FIO_BSP_JTAG_ENABLE: - meierr = IFX_MEI_ArcJtagEnable (pDev, 1); - break; - - case DSL_FIO_BSP_REMOTE: - IFX_MEI_IoctlCopyFrom (from_kernel, (char *) (&i), - (char *) lon, sizeof (int)); - - meierr = IFX_MEI_AdslMailboxIRQEnable (pDev, i); - break; - - case DSL_FIO_BSP_DSL_START: - IFX_MEI_DMSG("DSL_FIO_BSP_DSL_START\n"); - if ((meierr = IFX_MEI_RunAdslModem (pDev)) != DSL_DEV_MEI_ERR_SUCCESS) { - IFX_MEI_EMSG ("IFX_MEI_RunAdslModem() error..."); - meierr = DSL_DEV_MEI_ERR_FAILURE; - } - break; - - case DSL_FIO_BSP_DEBUG_READ: - case DSL_FIO_BSP_DEBUG_WRITE: - IFX_MEI_IoctlCopyFrom (from_kernel, - (char *) (&debugrdwr), - (char *) lon, - sizeof (debugrdwr)); - - if (command == DSL_FIO_BSP_DEBUG_READ) - meierr = DSL_BSP_MemoryDebugAccess (pDev, - DSL_BSP_MEMORY_READ, - debugrdwr. - iAddress, - debugrdwr. - buffer, - debugrdwr. - iCount); - else - meierr = DSL_BSP_MemoryDebugAccess (pDev, - DSL_BSP_MEMORY_WRITE, - debugrdwr. - iAddress, - debugrdwr. - buffer, - debugrdwr. - iCount); - - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, (char *) (&debugrdwr), sizeof (debugrdwr)); - break; - case DSL_FIO_BSP_GET_VERSION: - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, (char *) (&bsp_mei_version), sizeof (DSL_DEV_Version_t)); - break; - -#define LTQ_MPS_CHIPID_VERSION_GET(value) (((value) >> 28) & ((1 << 4) - 1)) - case DSL_FIO_BSP_GET_CHIP_INFO: - bsp_chip_info.major = 1; - bsp_chip_info.minor = LTQ_MPS_CHIPID_VERSION_GET(*LTQ_MPS_CHIPID); - IFX_MEI_IoctlCopyTo (from_kernel, (char *) lon, (char *) (&bsp_chip_info), sizeof (DSL_DEV_HwVersion_t)); - meierr = DSL_DEV_MEI_ERR_SUCCESS; - break; - - case DSL_FIO_BSP_FREE_RESOURCE: - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_STAT, 4, 0, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) { - meierr = DSL_DEV_MEI_ERR_FAILURE; - return -EIO; - } - IFX_MEI_DMSG("RxMessage[4] = %#x\n", m.msg.RxMessage[4]); - if (!(m.msg.RxMessage[4] & DSL_DEV_STAT_CODESWAP_COMPLETE)) { - meierr = DSL_DEV_MEI_ERR_FAILURE; - return -EAGAIN; - } - IFX_MEI_DMSG("Freeing all memories marked FREE_SHOWTIME\n"); - IFX_MEI_DFEMemoryFree (pDev, FREE_SHOWTIME); - meierr = DSL_DEV_MEI_ERR_SUCCESS; - break; -#ifdef CONFIG_IFXMIPS_AMAZON_SE - case DSL_FIO_ARC_MUX_TEST: - AMAZON_SE_MEI_ARC_MUX_Test(); - break; -#endif - default: -// IFX_MEI_EMSG("Invalid IOCTL command: %d\n"); - break; - } - return meierr; -} - -#ifdef CONFIG_IFXMIPS_AMAZON_SE -void AMAZON_SE_MEI_ARC_MUX_Test(void) -{ - u32 *p, i; - *LTQ_RCU_RST |= LTQ_RCU_RST_REQ_MUX_ARC; - - p = (u32*)(DFE_LDST_BASE_ADDR + IRAM0_BASE); - IFX_MEI_EMSG("Writing to IRAM0(%p)...\n", p); - for (i = 0; i < IRAM0_SIZE/sizeof(u32); i++, p++) { - *p = 0xdeadbeef; - if (*p != 0xdeadbeef) - IFX_MEI_EMSG("%p: %#x\n", p, *p); - } - - p = (u32*)(DFE_LDST_BASE_ADDR + IRAM1_BASE); - IFX_MEI_EMSG("Writing to IRAM1(%p)...\n", p); - for (i = 0; i < IRAM1_SIZE/sizeof(u32); i++, p++) { - *p = 0xdeadbeef; - if (*p != 0xdeadbeef) - IFX_MEI_EMSG("%p: %#x\n", p, *p); - } - - p = (u32*)(DFE_LDST_BASE_ADDR + BRAM_BASE); - IFX_MEI_EMSG("Writing to BRAM(%p)...\n", p); - for (i = 0; i < BRAM_SIZE/sizeof(u32); i++, p++) { - *p = 0xdeadbeef; - if (*p != 0xdeadbeef) - IFX_MEI_EMSG("%p: %#x\n", p, *p); - } - - p = (u32*)(DFE_LDST_BASE_ADDR + XRAM_BASE); - IFX_MEI_EMSG("Writing to XRAM(%p)...\n", p); - for (i = 0; i < XRAM_SIZE/sizeof(u32); i++, p++) { - *p = 0xdeadbeef; - if (*p != 0xdeadbeef) - IFX_MEI_EMSG("%p: %#x\n", p, *p); - } - - p = (u32*)(DFE_LDST_BASE_ADDR + YRAM_BASE); - IFX_MEI_EMSG("Writing to YRAM(%p)...\n", p); - for (i = 0; i < YRAM_SIZE/sizeof(u32); i++, p++) { - *p = 0xdeadbeef; - if (*p != 0xdeadbeef) - IFX_MEI_EMSG("%p: %#x\n", p, *p); - } - - p = (u32*)(DFE_LDST_BASE_ADDR + EXT_MEM_BASE); - IFX_MEI_EMSG("Writing to EXT_MEM(%p)...\n", p); - for (i = 0; i < EXT_MEM_SIZE/sizeof(u32); i++, p++) { - *p = 0xdeadbeef; - if (*p != 0xdeadbeef) - IFX_MEI_EMSG("%p: %#x\n", p, *p); - } - *LTQ_RCU_RST &= ~LTQ_RCU_RST_REQ_MUX_ARC; -} -#endif -int -DSL_BSP_KernelIoctls (DSL_DEV_Device_t * pDev, unsigned int command, - unsigned long lon) -{ - int error = 0; - - error = IFX_MEI_Ioctls (pDev, 1, command, lon); - return error; -} - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) -static int -IFX_MEI_UserIoctls (DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil, - unsigned int command, unsigned long lon) -#else -static int -IFX_MEI_UserIoctls (DSL_DRV_file_t * fil, - unsigned int command, unsigned long lon) -#endif -{ - int error = 0; -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - int maj = MAJOR (ino->i_rdev); - int num = MINOR (ino->i_rdev); -#endif - DSL_DEV_Device_t *pDev; - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)) - pDev = IFX_BSP_HandleGet (maj, num); -#else - pDev = IFX_BSP_HandleGet (0, 0); -#endif - if (pDev == NULL) - return -EIO; - - error = IFX_MEI_Ioctls (pDev, 0, command, lon); - return error; -} - -#ifdef CONFIG_PROC_FS -/* - * Register a callback function for linux proc filesystem - */ -static int -IFX_MEI_InitProcFS (int num) -{ - struct proc_dir_entry *entry; - int i ; - DSL_DEV_Device_t *pDev; - reg_entry_t regs_temp[PROC_ITEMS] = { - /* flag, name, description } */ - {NULL, "arcmsgav", "arc to mei message ", 0}, - {NULL, "cmv_reply", "cmv needs reply", 0}, - {NULL, "cmv_waiting", "waiting for cmv reply from arc", 0}, - {NULL, "modem_ready_cnt", "ARC to MEI indicator count", 0}, - {NULL, "cmv_count", "MEI to ARC CMVs", 0}, - {NULL, "reply_count", "ARC to MEI Reply", 0}, - {NULL, "Recent_indicator", "most recent indicator", 0}, - {NULL, "fw_version", "Firmware Version", 0}, - {NULL, "fw_date", "Firmware Date", 0}, - {NULL, "meminfo", "Memory Allocation Information", 0}, - {NULL, "version", "MEI version information", 0}, - }; - - pDev = &dsl_devices[num]; - if (pDev == NULL) - return -ENOMEM; - - regs_temp[0].flag = &(DSL_DEV_PRIVATE(pDev)->arcmsgav); - regs_temp[1].flag = &(DSL_DEV_PRIVATE(pDev)->cmv_reply); - regs_temp[2].flag = &(DSL_DEV_PRIVATE(pDev)->cmv_waiting); - regs_temp[3].flag = &(DSL_DEV_PRIVATE(pDev)->modem_ready_cnt); - regs_temp[4].flag = &(DSL_DEV_PRIVATE(pDev)->cmv_count); - regs_temp[5].flag = &(DSL_DEV_PRIVATE(pDev)->reply_count); - regs_temp[6].flag = (int *) &(DSL_DEV_PRIVATE(pDev)->Recent_indicator); - - memcpy ((char *) regs[num], (char *) regs_temp, sizeof (regs_temp)); - // procfs - meidir = proc_mkdir (MEI_DIRNAME, NULL); - if (meidir == NULL) { - IFX_MEI_EMSG ("Failed to create /proc/%s\n", MEI_DIRNAME); - return (-ENOMEM); - } - - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - entry = create_proc_entry (regs[num][i].name, - S_IWUSR | S_IRUSR | S_IRGRP | - S_IROTH, meidir); - if (entry) { - regs[num][i].low_ino = entry->low_ino; - entry->proc_fops = &IFX_MEI_ProcOperations; - } - else { - IFX_MEI_EMSG ("Failed to create /proc/%s/%s\n", MEI_DIRNAME, regs[num][i].name); - return (-ENOMEM); - } - } - return 0; -} - -/* - * Reading function for linux proc filesystem - */ -static int -IFX_MEI_ProcRead (struct file *file, char *buf, size_t nbytes, loff_t * ppos) -{ - int i_ino = (file->f_dentry->d_inode)->i_ino; - char *p = buf; - int i; - int num; - reg_entry_t *entry = NULL; - DSL_DEV_Device_t *pDev = NULL; - DSL_DEV_WinHost_Message_t m; - - for (num = 0; num < BSP_MAX_DEVICES; num++) { - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - if (regs[num][i].low_ino == (unsigned short)i_ino) { - entry = ®s[num][i]; - pDev = &dsl_devices[num]; - break; - } - } - } - if (entry == NULL) - return -EINVAL; - else if (strcmp(entry->name, "meminfo") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - p += sprintf (p, "No Address Size\n"); - for (i = 0; i < MAX_BAR_REGISTERS; i++) { - p += sprintf (p, "BAR[%02d] Addr:0x%08X Size:%lu\n", - i, (u32) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[i].address, - DSL_DEV_PRIVATE(pDev)-> adsl_mem_info[i].size); - //printk( "BAR[%02d] Addr:0x%08X Size:%d\n",i,adsl_mem_info[i].address,adsl_mem_info[i].size); - } - *ppos += (p - buf); - } else if (strcmp(entry->name, "fw_version") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - if (DSL_DEV_PRIVATE(pDev)->modem_ready_cnt < 1) - return -EAGAIN; - //major:bits 0-7 - //minor:bits 8-15 - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 54, 0, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - p += sprintf(p, "FW Version: %d.%d.", m.msg.RxMessage[4] & 0xFF, (m.msg.RxMessage[4] >> 8) & 0xFF); - //sub_version:bits 4-7 - //int_version:bits 0-3 - //spl_appl:bits 8-13 - //rel_state:bits 14-15 - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 54, 1, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - p += sprintf(p, "%d.%d.%d.%d\n", - (m.msg.RxMessage[4] >> 4) & 0xF, m.msg.RxMessage[4] & 0xF, - (m.msg.RxMessage[4] >> 14) & 3, (m.msg.RxMessage[4] >> 8) & 0x3F); - *ppos += (p - buf); - } else if (strcmp(entry->name, "fw_date") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - if (DSL_DEV_PRIVATE(pDev)->modem_ready_cnt < 1) - return -EAGAIN; - - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 55, 0, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - /* Day/Month */ - p += sprintf(p, "FW Date: %d.%d.", m.msg.RxMessage[4] & 0xFF, (m.msg.RxMessage[4] >> 8) & 0xFF); - - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 55, 2, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - /* Year */ - p += sprintf(p, "%d ", m.msg.RxMessage[4]); - - makeCMV (H2D_CMV_READ, DSL_CMV_GROUP_INFO, 55, 1, 1, NULL, m.msg.TxMessage); - if (DSL_BSP_SendCMV (pDev, m.msg.TxMessage, YES_REPLY, m.msg.RxMessage) != DSL_DEV_MEI_ERR_SUCCESS) - return -EIO; - /* Hour:Minute */ - p += sprintf(p, "%d:%d\n", (m.msg.RxMessage[4] >> 8) & 0xFF, m.msg.RxMessage[4] & 0xFF); - - *ppos += (p - buf); - } else if (strcmp(entry->name, "version") == 0) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; - p += sprintf (p, "IFX MEI V%ld.%ld.%ld\n", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision); - - *ppos += (p - buf); - } else if (entry->flag != (int *) DSL_DEV_PRIVATE(pDev)->Recent_indicator) { - if (*ppos > 0) /* Assume reading completed in previous read */ - return 0; // indicates end of file - p += sprintf (p, "0x%08X\n\n", *(entry->flag)); - *ppos += (p - buf); - if ((p - buf) > nbytes) /* Assume output can be read at one time */ - return -EINVAL; - } else { - if ((int) (*ppos) / ((int) 7) == 16) - return 0; // indicate end of the message - p += sprintf (p, "0x%04X\n\n", *(((u16 *) (entry->flag)) + (int) (*ppos) / ((int) 7))); - *ppos += (p - buf); - } - return p - buf; -} - -/* - * Writing function for linux proc filesystem - */ -static ssize_t -IFX_MEI_ProcWrite (struct file *file, const char *buffer, size_t count, loff_t * ppos) -{ - int i_ino = (file->f_dentry->d_inode)->i_ino; - reg_entry_t *current_reg = NULL; - int i = 0; - int num = 0; - unsigned long newRegValue = 0; - char *endp = NULL; - DSL_DEV_Device_t *pDev = NULL; - - for (num = 0; num < BSP_MAX_DEVICES; num++) { - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - if (regs[num][i].low_ino == i_ino) { - current_reg = ®s[num][i]; - pDev = &dsl_devices[num]; - break; - } - } - } - if ((current_reg == NULL) - || (current_reg->flag == - (int *) DSL_DEV_PRIVATE(pDev)-> - Recent_indicator)) - return -EINVAL; - - newRegValue = simple_strtoul (buffer, &endp, 0); - *(current_reg->flag) = (int) newRegValue; - return (count + endp - buffer); -} -#endif //CONFIG_PROC_FS - -static int adsl_dummy_ledcallback(void) -{ - return 0; -} - -int ifx_mei_atm_led_blink(void) -{ - return g_adsl_ledcallback(); -} -EXPORT_SYMBOL(ifx_mei_atm_led_blink); - -int ifx_mei_atm_showtime_check(int *is_showtime, struct port_cell_info *port_cell, void **xdata_addr) -{ - int i; - - if ( is_showtime ) { - *is_showtime = g_tx_link_rate[0] == 0 && g_tx_link_rate[1] == 0 ? 0 : 1; - } - - if ( port_cell ) { - for ( i = 0; i < port_cell->port_num && i < 2; i++ ) - port_cell->tx_link_rate[i] = g_tx_link_rate[i]; - } - - if ( xdata_addr ) { - if ( g_tx_link_rate[0] == 0 && g_tx_link_rate[1] == 0 ) - *xdata_addr = NULL; - else - *xdata_addr = g_xdata_addr; - } - - return 0; -} -EXPORT_SYMBOL(ifx_mei_atm_showtime_check); - -/* - * Writing function for linux proc filesystem - */ -int __init -IFX_MEI_ModuleInit (void) -{ - int i = 0; - static struct class *dsl_class; - - pr_info("IFX MEI Version %ld.%02ld.%02ld", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision); - - for (i = 0; i < BSP_MAX_DEVICES; i++) { - if (IFX_MEI_InitDevice (i) != 0) { - IFX_MEI_EMSG("Init device fail!\n"); - return -EIO; - } - IFX_MEI_InitDevNode (i); -#ifdef CONFIG_PROC_FS - IFX_MEI_InitProcFS (i); -#endif - } - for (i = 0; i <= DSL_BSP_CB_LAST ; i++) - dsl_bsp_event_callback[i].function = NULL; - -#ifdef CONFIG_LTQ_MEI_FW_LOOPBACK - IFX_MEI_DMSG("Start loopback test...\n"); - DFE_Loopback_Test (); -#endif - dsl_class = class_create(THIS_MODULE, "ifx_mei"); - device_create(dsl_class, NULL, MKDEV(MEI_MAJOR, 0), NULL, "ifx_mei"); - return 0; -} - -void __exit -IFX_MEI_ModuleExit (void) -{ - int i = 0; - int num; - - for (num = 0; num < BSP_MAX_DEVICES; num++) { - IFX_MEI_CleanUpDevNode (num); -#ifdef CONFIG_PROC_FS - for (i = 0; i < NUM_OF_REG_ENTRY; i++) { - remove_proc_entry (regs[num][i].name, meidir); - } -#endif - } - - remove_proc_entry (MEI_DIRNAME, NULL); - for (i = 0; i < BSP_MAX_DEVICES; i++) { - for (i = 0; i < BSP_MAX_DEVICES; i++) { - IFX_MEI_ExitDevice (i); - } - } -} - -/* export function for DSL Driver */ - -/* The functions of MEI_DriverHandleGet and MEI_DriverHandleDelete are -something like open/close in kernel space , where the open could be used -to register a callback for autonomous messages and returns a mei driver context pointer (comparable to the file descriptor in user space) - The context will be required for the multi line chips future! */ - -EXPORT_SYMBOL (DSL_BSP_DriverHandleGet); -EXPORT_SYMBOL (DSL_BSP_DriverHandleDelete); - -EXPORT_SYMBOL (DSL_BSP_ATMLedCBRegister); -EXPORT_SYMBOL (DSL_BSP_ATMLedCBUnregister); -EXPORT_SYMBOL (DSL_BSP_KernelIoctls); -EXPORT_SYMBOL (DSL_BSP_AdslLedInit); -//EXPORT_SYMBOL (DSL_BSP_AdslLedSet); -EXPORT_SYMBOL (DSL_BSP_FWDownload); -EXPORT_SYMBOL (DSL_BSP_Showtime); - -EXPORT_SYMBOL (DSL_BSP_MemoryDebugAccess); -EXPORT_SYMBOL (DSL_BSP_SendCMV); - -// provide a register/unregister function for DSL driver to register a event callback function -EXPORT_SYMBOL (DSL_BSP_EventCBRegister); -EXPORT_SYMBOL (DSL_BSP_EventCBUnregister); - -module_init (IFX_MEI_ModuleInit); -module_exit (IFX_MEI_ModuleExit); - -MODULE_LICENSE("Dual BSD/GPL"); |