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authorFlorian Fainelli <florian@openwrt.org>2007-08-07 09:12:49 +0000
committerFlorian Fainelli <florian@openwrt.org>2007-08-07 09:12:49 +0000
commit195c4d9a3deacb973e7dc5d55f028ea9ed7c6d7d (patch)
tree881f2e1921a80a5701421cc99477c3592962a15f /package/rt2x00/src/rt61pci.h
parentce173e209444843060cc64cc22b5c7f612a9bf54 (diff)
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Upgrade rt2x00 to a more recent snapshot, master mode now working, thanks to Daniel Gimpelevich
SVN-Revision: 8367
Diffstat (limited to 'package/rt2x00/src/rt61pci.h')
-rw-r--r--package/rt2x00/src/rt61pci.h23
1 files changed, 19 insertions, 4 deletions
diff --git a/package/rt2x00/src/rt61pci.h b/package/rt2x00/src/rt61pci.h
index 68347324c9..9dfd29356e 100644
--- a/package/rt2x00/src/rt61pci.h
+++ b/package/rt2x00/src/rt61pci.h
@@ -36,10 +36,11 @@
#define RF2529 0x0004
/*
- * Max RSSI value, required for RSSI <-> dBm conversion.
+ * Signal information.
*/
-#define MAX_RX_SSI 120
+#define MAX_RX_SSI -1
#define MAX_RX_NOISE -110
+#define DEFAULT_RSSI_OFFSET 120
/*
* Register layout information.
@@ -1103,6 +1104,20 @@ struct hw_pairwise_ta_entry {
#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
/*
+ * EEPROM RSSI offset 802.11BG
+ */
+#define EEPROM_RSSI_OFFSET_BG 0x004d
+#define EEPROM_RSSI_OFFSET_BG_1 FIELD16(0x00ff)
+#define EEPROM_RSSI_OFFSET_BG_2 FIELD16(0xff00)
+
+/*
+ * EEPROM RSSI offset 802.11A
+ */
+#define EEPROM_RSSI_OFFSET_A 0x004e
+#define EEPROM_RSSI_OFFSET_A_1 FIELD16(0x00ff)
+#define EEPROM_RSSI_OFFSET_A_2 FIELD16(0xff00)
+
+/*
* BBP content.
* The wordsize of the BBP is 8 bits.
*/
@@ -1285,10 +1300,10 @@ struct hw_pairwise_ta_entry {
/*
* Word1
* SIGNAL: RX raw data rate reported by BBP.
- * RSSI: RSSI reported by BBP.
*/
#define RXD_W1_SIGNAL FIELD32(0x000000ff)
-#define RXD_W1_RSSI FIELD32(0x0000ff00)
+#define RXD_W1_RSSI_AGC FIELD32(0x00001f00)
+#define RXD_W1_RSSI_LNA FIELD32(0x00006000)
#define RXD_W1_FRAME_OFFSET FIELD32(0x7f000000)
/*