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| author | Gabor Juhos <juhosg@openwrt.org> | 2011-06-29 09:40:54 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2011-06-29 09:40:54 +0000 |
| commit | 43938e8eb9b839af842835819b0ef869a0f09ae2 (patch) | |
| tree | b93085534d661612e9d6d5f8fbf892c688df491c /package/rbcfg/src/rbcfg.h | |
| parent | d98476c6bd9693fe39a090e17b3ef2679a39c363 (diff) | |
| download | upstream-43938e8eb9b839af842835819b0ef869a0f09ae2.tar.gz upstream-43938e8eb9b839af842835819b0ef869a0f09ae2.tar.bz2 upstream-43938e8eb9b839af842835819b0ef869a0f09ae2.zip | |
package/rbcfg: new tool for modifying boot configuration on the RB4xx boards
SVN-Revision: 27315
Diffstat (limited to 'package/rbcfg/src/rbcfg.h')
| -rw-r--r-- | package/rbcfg/src/rbcfg.h | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/package/rbcfg/src/rbcfg.h b/package/rbcfg/src/rbcfg.h new file mode 100644 index 0000000000..899161a10d --- /dev/null +++ b/package/rbcfg/src/rbcfg.h @@ -0,0 +1,75 @@ +/* + * Mikrotik's RouterBOOT configuration defines + * + * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + */ + +#ifndef _RBCFG_H +#define _RBCFG_H + +/* + * Magic numbers + */ +#define RB_MAGIC_SOFT 0x74666f53 /* 'Soft' */ + +/* + * ID values for Software settings + */ +#define RB_ID_TERMINATOR 0 +#define RB_ID_UART_SPEED 1 +#define RB_ID_BOOT_DELAY 2 +#define RB_ID_BOOT_DEVICE 3 +#define RB_ID_BOOT_KEY 4 +#define RB_ID_CPU_MODE 5 +#define RB_ID_FW_VERSION 6 +#define RB_ID_SOFT_07 7 +#define RB_ID_SOFT_08 8 +#define RB_ID_BOOT_PROTOCOL 9 +#define RB_ID_SOFT_10 10 +#define RB_ID_SOFT_11 11 +#define RB_ID_BOOTER 13 + +#define RB_UART_SPEED_115200 0 +#define RB_UART_SPEED_57600 1 +#define RB_UART_SPEED_38400 2 +#define RB_UART_SPEED_19200 3 +#define RB_UART_SPEED_9600 4 +#define RB_UART_SPEED_4800 5 +#define RB_UART_SPEED_2400 6 +#define RB_UART_SPEED_1200 7 +#define RB_UART_SPEED_OFF 8 + +#define RB_BOOT_DELAY_1SEC 1 +#define RB_BOOT_DELAY_2SEC 2 +#define RB_BOOT_DELAY_3SEC 3 +#define RB_BOOT_DELAY_4SEC 4 +#define RB_BOOT_DELAY_5SEC 5 +#define RB_BOOT_DELAY_6SEC 6 +#define RB_BOOT_DELAY_7SEC 7 +#define RB_BOOT_DELAY_8SEC 8 +#define RB_BOOT_DELAY_9SEC 9 + +#define RB_BOOT_DEVICE_ETHER 0 +#define RB_BOOT_DEVICE_NANDETH 1 +#define RB_BOOT_DEVICE_CFCARD 2 +#define RB_BOOT_DEVICE_ETHONCE 3 +#define RB_BOOT_DEVICE_NANDONLY 5 + +#define RB_BOOT_KEY_ANY 0 +#define RB_BOOT_KEY_DEL 1 + +#define RB_CPU_MODE_POWERSAVE 0 +#define RB_CPU_MODE_REGULAR 1 + +#define RB_BOOT_PROTOCOL_BOOTP 0 +#define RB_BOOT_PROTOCOL_DHCP 1 + +#define RB_BOOTER_REGULAR 0 +#define RB_BOOTER_BACKUP 1 + +#endif /* _RBCFG_H */ |