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| author | Felix Fietkau <nbd@openwrt.org> | 2010-02-24 03:43:30 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2010-02-24 03:43:30 +0000 |
| commit | 0188db20ce46414b9f4e9881f09ec807c9f997c1 (patch) | |
| tree | 6157413924d289c6006066a8187d6037784a0e95 /package/mac80211/patches | |
| parent | 0a72720a3c14ec4865eaf09e6a36c4e620df3a07 (diff) | |
| download | upstream-0188db20ce46414b9f4e9881f09ec807c9f997c1.tar.gz upstream-0188db20ce46414b9f4e9881f09ec807c9f997c1.tar.bz2 upstream-0188db20ce46414b9f4e9881f09ec807c9f997c1.zip | |
ath9k: disable RIFS search on some chips to avoid baseband hangs
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19829 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'package/mac80211/patches')
| -rw-r--r-- | package/mac80211/patches/550-ath9k_rifs_disable.patch | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/package/mac80211/patches/550-ath9k_rifs_disable.patch b/package/mac80211/patches/550-ath9k_rifs_disable.patch new file mode 100644 index 0000000000..57441b6437 --- /dev/null +++ b/package/mac80211/patches/550-ath9k_rifs_disable.patch @@ -0,0 +1,31 @@ +--- a/drivers/net/wireless/ath/ath9k/hw.c ++++ b/drivers/net/wireless/ath/ath9k/hw.c +@@ -1326,6 +1326,16 @@ static void ath9k_hw_override_ini(struct + * Necessary to avoid issues on AR5416 2.0 + */ + REG_WRITE(ah, 0x9800 + (651 << 2), 0x11); ++ ++ /* ++ * Disable RIFS search on some chips to avoid baseband ++ * hang issues. ++ */ ++ if (AR_SREV_9100(ah) || AR_SREV_9160(ah)) { ++ val = REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS); ++ val &= ~AR_PHY_RIFS_INIT_DELAY; ++ REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val); ++ } + } + + static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah, +--- a/drivers/net/wireless/ath/ath9k/phy.h ++++ b/drivers/net/wireless/ath/ath9k/phy.h +@@ -384,6 +384,9 @@ bool ath9k_hw_set_rf_regs(struct ath_hw + + #define AR_PHY_HEAVY_CLIP_ENABLE 0x99E0 + ++#define AR_PHY_HEAVY_CLIP_FACTOR_RIFS 0x99EC ++#define AR_PHY_RIFS_INIT_DELAY 0x03ff0000 ++ + #define AR_PHY_M_SLEEP 0x99f0 + #define AR_PHY_REFCLKDLY 0x99f4 + #define AR_PHY_REFCLKPD 0x99f8 |