diff options
author | Felix Fietkau <nbd@openwrt.org> | 2011-01-26 11:33:50 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2011-01-26 11:33:50 +0000 |
commit | a1ee44e27fb86dc3333cad4108e1e25f94e3cfb9 (patch) | |
tree | c5fbe80798a7b0aeffbc62de502352e82a9e112e /package/mac80211/patches | |
parent | 3ec2817f2359d606ddfea7deab183dd6a349abf6 (diff) | |
download | upstream-a1ee44e27fb86dc3333cad4108e1e25f94e3cfb9.tar.gz upstream-a1ee44e27fb86dc3333cad4108e1e25f94e3cfb9.tar.bz2 upstream-a1ee44e27fb86dc3333cad4108e1e25f94e3cfb9.zip |
mac80211: Improve ath5k/ar71xx PCI bug WAR
It has been confirmed by Atheros that this PCI bug affects the RX side only,
so we can keep the 128B DMA size for TX.
With this change we can double the thruput of ath5k from 15Mps to 30Mbps.
We have been using this patch since more than 6 month in a production
environment without problems and a significant performance improvement.
It has also been said to fix HW encryption:
http://www.mail-archive.com/ath5k-devel@lists.ath5k.org/msg04311.html
Patch from: kentarou matsuyama <matsuyama@thinktube.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@25104 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'package/mac80211/patches')
-rw-r--r-- | package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch index b216b9dbeb..d181971316 100644 --- a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch +++ b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch @@ -9,7 +9,7 @@ { AR5K_RXCFG, AR5K_DMASIZE_128B }, +#else + /* WAR for AR71xx PCI bug */ -+ { AR5K_TXCFG, AR5K_DMASIZE_4B }, ++ { AR5K_TXCFG, AR5K_DMASIZE_128B }, + { AR5K_RXCFG, AR5K_DMASIZE_4B }, +#endif { AR5K_CFG, AR5K_INIT_CFG }, @@ -29,7 +29,7 @@ +#else + /* WAR for AR71xx PCI bug */ + AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, -+ AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_4B); ++ AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B); + AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, + AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B); +#endif |