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author | John Crispin <john@openwrt.org> | 2010-12-12 22:57:16 +0000 |
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committer | John Crispin <john@openwrt.org> | 2010-12-12 22:57:16 +0000 |
commit | 9f47e80bb30bed05ebcdfe671d4f2a9e9c7bfe55 (patch) | |
tree | 3d80c2524b0e73b5f7c9982eca4fe9301efdf75a /package/lqdsl/src/ifxmips_atm_fw_regs_danube.h | |
parent | f590b304ef7d22242e08c86866cbb37927f0a404 (diff) | |
download | upstream-9f47e80bb30bed05ebcdfe671d4f2a9e9c7bfe55.tar.gz upstream-9f47e80bb30bed05ebcdfe671d4f2a9e9c7bfe55.tar.bz2 upstream-9f47e80bb30bed05ebcdfe671d4f2a9e9c7bfe55.zip |
adds new lantiq kernel. once the codebase is fully tested and know to be working on all the devices previously supported by ifxmips, we will drop ifxmips support.
SVN-Revision: 24526
Diffstat (limited to 'package/lqdsl/src/ifxmips_atm_fw_regs_danube.h')
-rw-r--r-- | package/lqdsl/src/ifxmips_atm_fw_regs_danube.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/package/lqdsl/src/ifxmips_atm_fw_regs_danube.h b/package/lqdsl/src/ifxmips_atm_fw_regs_danube.h new file mode 100644 index 0000000000..c0dfc6a2e0 --- /dev/null +++ b/package/lqdsl/src/ifxmips_atm_fw_regs_danube.h @@ -0,0 +1,30 @@ +#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H +#define IFXMIPS_ATM_FW_REGS_DANUBE_H + + + +/* + * Host-PPE Communication Data Address Mapping + */ +#define FW_VER_ID SB_BUFFER(0x2001) +#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */ +#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */ +#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */ +#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */ +#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */ +#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */ +#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */ +#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */ +#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20)) +#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7)) +#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i))) +#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27)) +#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27)) +#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410)) +#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i))) +#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i))) +#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i))) + + + +#endif // IFXMIPS_ATM_FW_REGS_DANUBE_H |