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authorEneas U de Queiroz <cotequeiroz@gmail.com>2020-02-21 15:44:39 -0300
committerChristian Lamparter <chunkeey@gmail.com>2020-02-28 22:46:09 +0100
commitee4a0afdcdf0c11528d685efd64fb8f4b4efcbb1 (patch)
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parent26681de412df956f154ae938dcc587065ed3973a (diff)
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ipq40xx: use neon crypto drivers
This adds the neon based implementations of AES & SHA256. For AES, according to the kernel config help: Use a faster and more secure NEON based implementation of AES in CBC, CTR and XTS modes. Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode and for XTS mode encryption, CBC and XTS mode decryption speedup is around 25%. (CBC encryption speed is not affected by this driver.) This implementation does not rely on any lookup tables so it is believed to be invulnerable to cache timing attacks. ... The observed speedups on ipq40xx are more modest: speedup is around 20% for CTR mode and for XTS mode encryption, CBC and XTS mode decryption speedup is around 10%. Measurements were made using tcrypt, with 1024-bytes blocks for CTR & CBC, and 4096-bytes for XTS. The aes-neon-bs driver uses a fallback for CBC encryption; that fallback could be either the generic driver written in C, or the scalar arm-asm one. Even though aes-arm is 1.9% slower, it is more resilient to timing attacks (the reason for being slower), so it is being included here. The neon sha256 module increases performance over the generic module by 33%. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> [Enable only ciphers for now, reorder patch in series to help bisect as new symbols could lead to build failures, 5.4] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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