diff options
author | Felix Fietkau <nbd@openwrt.org> | 2014-02-22 13:43:48 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2014-02-22 13:43:48 +0000 |
commit | 3ae79cd84801750ab659bdb82420897e898d5951 (patch) | |
tree | aa00f8ad12c4f27e181c064fce116f2e2e3fac9f /package/kernel | |
parent | ec4ab71c542337afecf456b1f3efc170f90a561d (diff) | |
download | upstream-3ae79cd84801750ab659bdb82420897e898d5951.tar.gz upstream-3ae79cd84801750ab659bdb82420897e898d5951.tar.bz2 upstream-3ae79cd84801750ab659bdb82420897e898d5951.zip |
ath9k: fix issues with 5/10 mhz channel bandwidth (#14916)
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 39689
Diffstat (limited to 'package/kernel')
-rw-r--r-- | package/kernel/mac80211/patches/300-pending_work.patch | 31 | ||||
-rw-r--r-- | package/kernel/mac80211/patches/550-ath9k_entropy_from_adc.patch | 4 |
2 files changed, 33 insertions, 2 deletions
diff --git a/package/kernel/mac80211/patches/300-pending_work.patch b/package/kernel/mac80211/patches/300-pending_work.patch index b0c90737bb..fc428cf125 100644 --- a/package/kernel/mac80211/patches/300-pending_work.patch +++ b/package/kernel/mac80211/patches/300-pending_work.patch @@ -1,3 +1,21 @@ +commit b14fbb554fc65a2e0b5c41a319269b0350f187e7 +Author: Felix Fietkau <nbd@openwrt.org> +Date: Sat Feb 22 14:35:25 2014 +0100 + + ath9k: do not set half/quarter channel flags in AR_PHY_MODE + + 5/10 MHz channel bandwidth is configured via the PLL clock, instead of + the AR_PHY_MODE register. Using that register is AR93xx specific, and + makes the mode incompatible with earlier chipsets. + + In some early versions, these flags were apparently applied at the wrong + point in time and thus did not cause connectivity issues, however now + they are causing problems, as pointed out in this OpenWrt ticket: + + https://dev.openwrt.org/ticket/14916 + + Signed-off-by: Felix Fietkau <nbd@openwrt.org> + commit 0f1cb7be2551b30b02cd54c897e0e29e483cfda5 Author: Felix Fietkau <nbd@openwrt.org> Date: Sat Feb 22 13:43:29 2014 +0100 @@ -3296,3 +3314,16 @@ Date: Thu Jan 23 20:06:34 2014 +0100 "%17s: %2d\n", "MCI Reset", sc->debug.stats.reset[RESET_TYPE_MCI]); +--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c +@@ -868,10 +868,6 @@ static void ar9003_hw_set_rfmode(struct + + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) + rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); +- if (IS_CHAN_QUARTER_RATE(chan)) +- rfMode |= AR_PHY_MODE_QUARTER; +- if (IS_CHAN_HALF_RATE(chan)) +- rfMode |= AR_PHY_MODE_HALF; + + if (rfMode & (AR_PHY_MODE_QUARTER | AR_PHY_MODE_HALF)) + REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, diff --git a/package/kernel/mac80211/patches/550-ath9k_entropy_from_adc.patch b/package/kernel/mac80211/patches/550-ath9k_entropy_from_adc.patch index 12f8b7e765..011c99e3b7 100644 --- a/package/kernel/mac80211/patches/550-ath9k_entropy_from_adc.patch +++ b/package/kernel/mac80211/patches/550-ath9k_entropy_from_adc.patch @@ -18,7 +18,7 @@ void (*spectral_scan_trigger)(struct ath_hw *ah); --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c -@@ -1768,6 +1768,26 @@ static void ar9003_hw_tx99_set_txpower(s +@@ -1764,6 +1764,26 @@ static void ar9003_hw_tx99_set_txpower(s ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_14], 0)); } @@ -45,7 +45,7 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah) { struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); -@@ -1798,6 +1818,7 @@ void ar9003_hw_attach_phy_ops(struct ath +@@ -1794,6 +1814,7 @@ void ar9003_hw_attach_phy_ops(struct ath priv_ops->set_radar_params = ar9003_hw_set_radar_params; priv_ops->fast_chan_change = ar9003_hw_fast_chan_change; |