mac80211: rt2x00: cleanup ePA, RXIQ and TX-LOFT code

consolidate patch 651-rt2x00-remove-unneccesary-code.patch.
fixup the most obvious whitespace problems in RXIQ and TX-LOFT code.
always backup registers bbpr1, bbpr4, bbpr241 and bbpr242 to avoid
compiler warning about them being potentially uninitialized.
no functional changes (intended)

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

1 files changed, 58 insertions, 61 deletions

diff --git a/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch b/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch
index 463d3aad23..31a860c1a7 100644
--- a/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch
+++ b/package/kernel/mac80211/patches/rt2x00/986-rt2x00-add-TX-LOFT-calibration.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -9000,6 +9000,957 @@ restore_value:
+@@ -9000,6 +9000,954 @@ restore_value:
  }
  EXPORT_SYMBOL_GPL(rt2800_rxiq_calibration);
  
@@ -132,7 +132,7 @@
 +		for (record_index = 0; record_index < 13; record_index++) {
 +			bank = rf_record[chain_index][record_index].bank;
 +			rf_register = rf_record[chain_index][record_index].reg;
-+			value = rf_record[chain_index][record_index].value;			
++			value = rf_record[chain_index][record_index].value;
 +			rt2800_rfcsr_write_bank(rt2x00dev, bank, rf_register, value);
 +			rt2x00_dbg(rt2x00dev, "bank: %d, rf_register: %d, value: %x\n", bank, rf_register, value);
 +		}
@@ -205,9 +205,9 @@
 +		rt2800_bbp_write(rt2x00dev, 159, tidxi);
 +		rt2800_bbp_write(rt2x00dev, 159, tidxi);
 +		rt2800_bbp_write(rt2x00dev, 159, tidxi);
-+	
++
 +		macvalue = rt2800_register_read(rt2x00dev, 0x057C);
-+	
++
 +		fftout_i = (macvalue >> 16);
 +		fftout_i = (fftout_i & 0x8000) ? (fftout_i - 0x10000) : fftout_i;
 +		fftout_q = (macvalue & 0xffff);
@@ -215,8 +215,7 @@
 +		ptmp = (fftout_i * fftout_i);
 +		ptmp = ptmp + (fftout_q * fftout_q);
 +		ptmp = ptmp >> 1;
-+		pint = pint + ptmp;	
-+		
++		pint = pint + ptmp;
 +	}
 +
 +	return pint;
@@ -269,7 +268,7 @@
 +}
 +EXPORT_SYMBOL_GPL(rt2800_write_dc);
 +
-+static void rt2800_loft_search(struct rt2x00_dev *rt2x00dev, u8 ch_idx, u8 alc_idx, u8 dc_result[][RF_ALC_NUM][2])	
++static void rt2800_loft_search(struct rt2x00_dev *rt2x00dev, u8 ch_idx, u8 alc_idx, u8 dc_result[][RF_ALC_NUM][2])
 +{
 +	u32 p0 = 0, p1 = 0, pf = 0;
 +	char idx0 = 0, idx1 = 0;
@@ -283,7 +282,7 @@
 +
 +	for (bidx = 5; bidx >= 0; bidx--) {
 +		for (iorq = 0; iorq <= 1; iorq++) {
-+			rt2x00_dbg(rt2x00dev, "\n========================================================\n");                 
++			rt2x00_dbg(rt2x00dev, "\n========================================================\n");
 +
 +			if (idxf[iorq] == 0x20) {
 +				idx0 = 0x20;
@@ -300,7 +299,7 @@
 +			rt2800_write_dc(rt2x00dev, ch_idx, 0, iorq, idx1);
 +			p1 = rt2800_do_fft_accumulation(rt2x00dev, 0x0A, 0);
 +
-+			rt2x00_dbg(rt2x00dev, "alc=%u, IorQ=%u, idx_final=%2x\n", alc_idx, iorq, idxf[iorq]); 
++			rt2x00_dbg(rt2x00dev, "alc=%u, IorQ=%u, idx_final=%2x\n", alc_idx, iorq, idxf[iorq]);
 +			rt2x00_dbg(rt2x00dev, "p0=%x, p1=%x, pf=%x, idx_0=%x, idx_1=%x, ibit=%x !\n", p0, p1, pf, idx0, idx1, ibit);
 +
 +			if ((bidx != 5) && (pf <= p0) && (pf < p1)) {
@@ -327,7 +326,7 @@
 +}
 +EXPORT_SYMBOL_GPL(rt2800_loft_search);
 +
-+static void rt2800_iq_search(struct rt2x00_dev *rt2x00dev, u8 ch_idx, u8 *ges, u8 *pes)	
++static void rt2800_iq_search(struct rt2x00_dev *rt2x00dev, u8 ch_idx, u8 *ges, u8 *pes)
 +{
 +	u32 p0 = 0, p1 = 0, pf = 0;
 +	char perr = 0, gerr = 0, iq_err = 0;
@@ -390,7 +389,7 @@
 +					pf = p1;
 +					iq_err = idx1;
 +				}
-+				
++
 +				bbp = (ch_idx == 0) ? (gop == 0) ? 0x28 : 0x29 : (gop == 0) ? 0x46 : 0x47;
 +
 +				rt2800_bbp_write(rt2x00dev, 158, bbp);
@@ -400,7 +399,7 @@
 +					gerr = iq_err;
 +				else
 +					perr = iq_err;
-+					
++
 +				rt2x00_dbg(rt2x00dev, "IQCalibration pf=%8x (%2x, %2x) !\n", pf, gerr & 0x0F, perr & 0x3F);
 +
 +			}
@@ -408,14 +407,14 @@
 +
 +		if (bidx > 0)
 +			ibit = (ibit >> 1);
-+	} 
++	}
 +	gerr = (gerr & 0x08) ? (gerr & 0x0F) - 0x10 : (gerr & 0x0F);
 +	perr = (perr & 0x20) ? (perr & 0x3F) - 0x40 : (perr & 0x3F);
-+	
++
 +	gerr = (gerr < -0x07) ? -0x07 : (gerr > 0x05) ? 0x05 : gerr;
 +	gsta = gerr - 1;
 +	gend = gerr + 2;
-+	
++
 +	perr = (perr < -0x1f) ? -0x1f : (perr > 0x1d) ? 0x1d : perr;
 +	psta = perr - 1;
 +	pend = perr + 2;
@@ -425,11 +424,11 @@
 +			bbp = (ch_idx == 0) ? 0x28 : 0x46;
 +			rt2800_bbp_write(rt2x00dev, 158, bbp);
 +			rt2800_bbp_write(rt2x00dev, 159, gef & 0x0F);
-+			
++
 +			bbp = (ch_idx == 0) ? 0x29 : 0x47;
 +			rt2800_bbp_write(rt2x00dev, 158, bbp);
 +			rt2800_bbp_write(rt2x00dev, 159, pef & 0x3F);
-+			
++
 +			p1 = rt2800_do_fft_accumulation(rt2x00dev, 0x14, 1);
 +			if ((gef == gsta) && (pef == psta)) {
 +				pf = p1;
@@ -443,10 +442,10 @@
 +			}
 +			rt2x00_dbg(rt2x00dev, "Fine IQCalibration p1=%8x pf=%8x (%2x, %2x) !\n", p1, pf, gef & 0x0F, pef & 0x3F);
 +		}
-+		
++
 +	ges[ch_idx] = gerr & 0x0F;
 +	pes[ch_idx] = perr & 0x3F;
-+	
++
 +	rt2x00_info(rt2x00dev, "IQCalibration Done! CH = %u, (gain=%2x, phase=%2x)\n", ch_idx, gerr & 0x0F, perr & 0x3F);
 +
 +	return;
@@ -512,7 +511,7 @@
 +	u8 rf_gain[] = {0x00, 0x01, 0x02, 0x04, 0x08, 0x0c};
 +	u8 rfvga_gain_table[] = {0x24, 0x25, 0x26, 0x27, 0x28, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3F};
 +
-+	u8 vga_gain[] = {14, 14};   
++	u8 vga_gain[] = {14, 14};
 +	u8 bbp_2324gain[] = {0x16, 0x14, 0x12, 0x10, 0x0c, 0x08};
 +	u8 bbp = 0, ch_idx = 0, rf_alc_idx = 0, idx = 0;
 +	u8 bbpr30, rfb0r39, rfb0r42;
@@ -553,7 +552,7 @@
 +			udelay(50);
 +		else
 +			break;
-+	} 
++	}
 +
 +	for (ch_idx = 0; ch_idx < 2; ch_idx++) {
 +		rt2800_rf_configstore(rt2x00dev, rf_store, ch_idx);
@@ -597,13 +596,13 @@
 +
 +		rt2800_bbp_write(rt2x00dev, 158, 0x05);
 +		rt2800_bbp_write(rt2x00dev, 159, 0x00);
-+	
++
 +		rt2800_bbp_write(rt2x00dev, 158, 0x01);
 +		if (ch_idx == 0)
 +			rt2800_bbp_write(rt2x00dev, 159, 0x00);
 +		else
 +			rt2800_bbp_write(rt2x00dev, 159, 0x01);
-+	
++
 +		vga_gain[ch_idx] = 18;
 +		for (rf_alc_idx = 0; rf_alc_idx < 3; rf_alc_idx++) {
 +			rt2800_bbp_write(rt2x00dev, 23, bbp_2324gain[rf_alc_idx]);
@@ -617,7 +616,7 @@
 +			macvalue = (0x0000F1F1);
 +			rt2800_register_write(rt2x00dev, RF_BYPASS3, macvalue);
 +
-+ 			if (rf_alc_idx == 0) {
++			if (rf_alc_idx == 0) {
 +				rt2800_write_dc(rt2x00dev, ch_idx, 0, 1, 0x21);
 +				for (;vga_gain[ch_idx] > 0;vga_gain[ch_idx] = vga_gain[ch_idx] - 2) {
 +					rfvalue = rfvga_gain_table[vga_gain[ch_idx]];
@@ -628,26 +627,26 @@
 +					p0 = rt2800_do_fft_accumulation(rt2x00dev, 0x0A, 0);
 +					rt2800_write_dc(rt2x00dev, ch_idx, 0, 0, 0x21);
 +					p1 = rt2800_do_fft_accumulation(rt2x00dev, 0x0A, 0);
-+					rt2x00_dbg(rt2x00dev, "LOFT AGC %d %d\n", p0, p1); 
-+					if ((p0 < 7000*7000) && (p1 < (7000*7000))) {						
++					rt2x00_dbg(rt2x00dev, "LOFT AGC %d %d\n", p0, p1);
++					if ((p0 < 7000*7000) && (p1 < (7000*7000))) {
 +						break;
 +					}
 +				}
 +
 +				rt2800_write_dc(rt2x00dev, ch_idx, 0, 0, 0x00);
 +				rt2800_write_dc(rt2x00dev, ch_idx, 0, 1, 0x00);
-+				
-+				rt2x00_dbg(rt2x00dev, "Used VGA %d %x\n",vga_gain[ch_idx], rfvga_gain_table[vga_gain[ch_idx]]); 
++
++				rt2x00_dbg(rt2x00dev, "Used VGA %d %x\n",vga_gain[ch_idx], rfvga_gain_table[vga_gain[ch_idx]]);
 +
 +				if (vga_gain[ch_idx] < 0)
 +					vga_gain[ch_idx] = 0;
-+		 	}			
++		 	}
 +
 +			rfvalue = rfvga_gain_table[vga_gain[ch_idx]];
-+			
++
 +			rt2800_rfcsr_write_dccal(rt2x00dev, 3, rfvalue);
 +			rt2800_rfcsr_write_dccal(rt2x00dev, 4, rfvalue);
-+	
++
 +			rt2800_loft_search(rt2x00dev, ch_idx, rf_alc_idx, loft_dc_search_result);
 +		}
 +	}
@@ -660,29 +659,29 @@
 +			rt2x00_dbg(rt2x00dev, " ALC %2x,", bbp);
 +
 +			rt2800_bbp_write(rt2x00dev, 158, 0xb1);
-+			bbp = loft_dc_search_result[CHAIN_0][rf_alc_idx][0x00]; 
-+			bbp = bbp & 0x3F; 
++			bbp = loft_dc_search_result[CHAIN_0][rf_alc_idx][0x00];
++			bbp = bbp & 0x3F;
 +			rt2800_bbp_write(rt2x00dev, 159, bbp);
 +			rt2x00_dbg(rt2x00dev, " I0 %2x,", bbp);
 +
 +			rt2800_bbp_write(rt2x00dev, 158, 0xb2);
-+			bbp = loft_dc_search_result[CHAIN_0][rf_alc_idx][0x01]; 
-+			bbp = bbp & 0x3F; 
++			bbp = loft_dc_search_result[CHAIN_0][rf_alc_idx][0x01];
++			bbp = bbp & 0x3F;
 +			rt2800_bbp_write(rt2x00dev, 159, bbp);
 +			rt2x00_dbg(rt2x00dev, " Q0 %2x,", bbp);
 +
 +			rt2800_bbp_write(rt2x00dev, 158, 0xb8);
-+			bbp = loft_dc_search_result[CHAIN_1][rf_alc_idx][0x00]; 
-+			bbp = bbp & 0x3F; 
++			bbp = loft_dc_search_result[CHAIN_1][rf_alc_idx][0x00];
++			bbp = bbp & 0x3F;
 +			rt2800_bbp_write(rt2x00dev, 159, bbp);
 +			rt2x00_dbg(rt2x00dev, " I1 %2x,", bbp);
 +
 +			rt2800_bbp_write(rt2x00dev, 158, 0xb9);
-+			bbp = loft_dc_search_result[CHAIN_1][rf_alc_idx][0x01]; 
-+			bbp = bbp & 0x3F; 
++			bbp = loft_dc_search_result[CHAIN_1][rf_alc_idx][0x01];
++			bbp = bbp & 0x3F;
 +			rt2800_bbp_write(rt2x00dev, 159, bbp);
 +			rt2x00_dbg(rt2x00dev, " Q1 %2x\n", bbp);
-+		} 
++		}
 +	}
 +
 +	rt2800_bbp_write(rt2x00dev, 23, 0x00);
@@ -703,8 +702,8 @@
 +	rt2800_rf_configrecover(rt2x00dev, rf_store);
 +
 +	rt2800_register_write(rt2x00dev, TX_PIN_CFG, macorg1);
-+  	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04);
-+  	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00);
++	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04);
++	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00);
 +	rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00);
 +	rt2800_register_write(rt2x00dev, RF_CONTROL0, macorg2);
 +	udelay(1);
@@ -725,12 +724,10 @@
 +	macorg4 = rt2800_register_read(rt2x00dev, RF_CONTROL3);
 +	macorg5 = rt2800_register_read(rt2x00dev, RF_BYPASS3);
 +
-+	if (test_bit(CAPABILITY_EXTERNAL_PA_TX0, &rt2x00dev->cap_flags)) {
-+		bbpr1 = rt2800_bbp_read(rt2x00dev, 1);
-+		bbpr4 = rt2800_bbp_read(rt2x00dev, 4);
-+		bbpr241 = rt2800_bbp_read(rt2x00dev, 241);
-+		bbpr242 = rt2800_bbp_read(rt2x00dev, 242);
-+	}
++	bbpr1 = rt2800_bbp_read(rt2x00dev, 1);
++	bbpr4 = rt2800_bbp_read(rt2x00dev, 4);
++	bbpr241 = rt2800_bbp_read(rt2x00dev, 241);
++	bbpr242 = rt2800_bbp_read(rt2x00dev, 242);
 +	mac13b8 = rt2800_register_read(rt2x00dev, 0x13b8);
 +
 +	macvalue = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
@@ -779,7 +776,7 @@
 +	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000004);
 +	rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00003306);
 +	udelay(1);
-+	
++
 +	rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x0000000F);
 +
 +	if (!test_bit(CAPABILITY_EXTERNAL_PA_TX0, &rt2x00dev->cap_flags)) {
@@ -833,7 +830,7 @@
 +		bbp = (ch_idx == 0) ? 0x28 : 0x46;
 +		rt2800_bbp_write(rt2x00dev, 158, bbp);
 +		rt2800_bbp_write(rt2x00dev, 159, 0x00);
-+		
++
 +		if (test_bit(CAPABILITY_EXTERNAL_PA_TX0, &rt2x00dev->cap_flags)) {
 +			rt2800_bbp_write(rt2x00dev, 23, 0x06);
 +			rt2800_bbp_write(rt2x00dev, 24, 0x06);
@@ -848,7 +845,7 @@
 +			rfvalue = rfvga_gain_table[vga_gain[ch_idx]];
 +			rt2800_rfcsr_write_dccal(rt2x00dev, 3, rfvalue);
 +			rt2800_rfcsr_write_dccal(rt2x00dev, 4, rfvalue);
-+			
++
 +			bbp = (ch_idx == 0) ? 0x29 : 0x47;
 +			rt2800_bbp_write(rt2x00dev, 158, bbp);
 +			rt2800_bbp_write(rt2x00dev, 159, 0x00);
@@ -883,14 +880,14 @@
 +
 +		if (vga_gain[ch_idx] > 18)
 +			vga_gain[ch_idx] = 18;
-+		rt2x00_dbg(rt2x00dev, "Used VGA %d %x\n",vga_gain[ch_idx], rfvga_gain_table[vga_gain[ch_idx]]); 
++		rt2x00_dbg(rt2x00dev, "Used VGA %d %x\n",vga_gain[ch_idx], rfvga_gain_table[vga_gain[ch_idx]]);
 +
 +		bbp = (ch_idx == 0) ? 0x29 : 0x47;
 +		rt2800_bbp_write(rt2x00dev, 158, bbp);
 +		rt2800_bbp_write(rt2x00dev, 159, 0x00);
 +
 +		rt2800_iq_search(rt2x00dev, ch_idx, ger, per);
-+	}	
++	}
 +
 +	rt2800_bbp_write(rt2x00dev, 23, 0x00);
 +	rt2800_bbp_write(rt2x00dev, 24, 0x00);
@@ -901,17 +898,17 @@
 +	rt2800_bbp_write(rt2x00dev, 159, bbp);
 +
 +	rt2800_bbp_write(rt2x00dev, 158, 0x29);
-+	bbp = per[CHAIN_0] & 0x3F; 
++	bbp = per[CHAIN_0] & 0x3F;
 +	rt2800_bbp_write(rt2x00dev, 159, bbp);
 +
 +	rt2800_bbp_write(rt2x00dev, 158, 0x46);
-+	bbp = ger[CHAIN_1] & 0x0F; 
++	bbp = ger[CHAIN_1] & 0x0F;
 +	rt2800_bbp_write(rt2x00dev, 159, bbp);
 +
 +	rt2800_bbp_write(rt2x00dev, 158, 0x47);
-+	bbp = per[CHAIN_1] & 0x3F; 
-+	rt2800_bbp_write(rt2x00dev, 159, bbp); 
-+ 
++	bbp = per[CHAIN_1] & 0x3F;
++	rt2800_bbp_write(rt2x00dev, 159, bbp);
++
 +	if (test_bit(CAPABILITY_EXTERNAL_PA_TX0, &rt2x00dev->cap_flags)) {
 +		rt2800_bbp_write(rt2x00dev, 1, bbpr1);
 +		rt2800_bbp_write(rt2x00dev, 241, bbpr241);
@@ -939,7 +936,7 @@
 +	rt2800_rf_configrecover(rt2x00dev, rf_store);
 +
 +	rt2800_register_write(rt2x00dev, TX_PIN_CFG, macorg1);
-+  	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00);
++	rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00);
 +	rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00);
 +	rt2800_register_write(rt2x00dev, RF_CONTROL0, macorg2);
 +	udelay(1);
@@ -958,7 +955,7 @@
  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
  				       bool set_bw, bool is_ht40)
  {
-@@ -9612,6 +10563,7 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -9612,6 +10560,7 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rxdcoc_calibration(rt2x00dev);
  	rt2800_bw_filter_calibration(rt2x00dev, true);
  	rt2800_bw_filter_calibration(rt2x00dev, false);
@@ -974,7 +971,7 @@
  #define STA_IDS_SIZE	(WCID_END - WCID_START + 2)
 +#define CHAIN_0		0x0
 +#define CHAIN_1		0x1
-+#define RF_ALC_NUM	6 
++#define RF_ALC_NUM	6
 +#define CHAIN_NUM	2
 +
 +typedef struct rf_reg_pair {