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| author | Felix Fietkau <nbd@nbd.name> | 2016-10-08 13:53:14 +0200 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2016-10-13 17:06:03 +0200 |
| commit | ad51e09fd1301484820a466a49447a34d7504882 (patch) | |
| tree | 06d56b89cf8709b0e9ca63528f8efc411089ddf5 /package/kernel/mac80211/patches/653-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch | |
| parent | 4379bcb1b4b73fb8487a14bec9554a17d4726e35 (diff) | |
| download | upstream-ad51e09fd1301484820a466a49447a34d7504882.tar.gz upstream-ad51e09fd1301484820a466a49447a34d7504882.tar.bz2 upstream-ad51e09fd1301484820a466a49447a34d7504882.zip | |
mac80211: update to wireless-testing 2016-10-08
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'package/kernel/mac80211/patches/653-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch')
| -rw-r--r-- | package/kernel/mac80211/patches/653-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/653-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch b/package/kernel/mac80211/patches/653-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch new file mode 100644 index 0000000000..7d150eb31f --- /dev/null +++ b/package/kernel/mac80211/patches/653-0018-rtl8xxxu-Do-not-set-REG_FPGA0_TX_INFO-on-8188eu.patch @@ -0,0 +1,25 @@ +From 519d0047f84cdd1050418bb86dd34a0c6df1206a Mon Sep 17 00:00:00 2001 +From: Jes Sorensen <Jes.Sorensen@redhat.com> +Date: Wed, 20 Jul 2016 14:32:46 -0400 +Subject: [PATCH] rtl8xxxu: Do not set REG_FPGA0_TX_INFO on 8188eu + +The vendor driver doesn't set this for 8188eu either. It is unclear if +this is only relevant for gen1 parts. + +Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> +--- + drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c ++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c +@@ -3962,7 +3962,8 @@ static int rtl8xxxu_init_device(struct i + goto exit; + + /* RFSW Control - clear bit 14 ?? */ +- if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E) ++ if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E && ++ priv->rtl_chip != RTL8188E) + rtl8xxxu_write32(priv, REG_FPGA0_TX_INFO, 0x00000003); + + val32 = FPGA0_RF_TRSW | FPGA0_RF_TRSWB | FPGA0_RF_ANTSW | |