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authorDaniel Kestrel <kestrel1974@t-online.de>2021-06-05 23:46:58 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2022-01-06 00:22:50 +0100
commit34a3eaf07f6a814d77cbdaa6c8a14604a37f7784 (patch)
tree2409d0dd9c716ea234f88f6eff6eaff98716799c /package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c
parent87a19c9345db7554441dbd10f8c4460f6629c10a (diff)
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ltq-deu: changes for hash multithread callers and md5 endianess
The algorithms sha1, sha1_hmac and md5_hmac all use ENDI=1. The md5 algorithm uses ENDI=0 and the endian_swap methods to reverse the endianess switch by using user CPU time, which is unnecessary overhead. Danube and AR9 devices do not set endianess for SHA1, so is done for MD5. Furthermore the patch replaces endian_swap with le32_to_cpu for md5 and md5 hmac algorithms and removes endian_swap for them. The init functions initialize the algorithm in the hardware. The lock is not used to write to the control register. If another thread calls another hash algo before update or final, the result will be wrong. Therefore move the algorithm init to the lock protected sections in the transform or final methods. Setting the hw key for the hmac algorithms is now done from within the lock protected sections in their final methods. The lock protecting is removed from the _hmac_setkey_hw functions. In final for md5 and sha1 the lock section is removed, because all the work was already done in transform (which is called from final). As such only copying the hash to the output is required. MD5 and MD5_HMAC produce 16 byte hashes (4 DWORDS) only, therefor writing register D5R to the hash output is removed for MD5_HMAC. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
Diffstat (limited to 'package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c')
-rw-r--r--package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c57
1 files changed, 15 insertions, 42 deletions
diff --git a/package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c b/package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c
index f7dbee4fdc..376ff64d05 100644
--- a/package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c
+++ b/package/kernel/lantiq/ltq-deu/src/ifxmips_md5.c
@@ -81,18 +81,6 @@ struct md5_ctx {
extern int disable_deudma;
-/*! \fn static u32 endian_swap(u32 input)
- * \ingroup IFX_MD5_FUNCTIONS
- * \brief perform dword level endian swap
- * \param input value of dword that requires to be swapped
-*/
-static u32 endian_swap(u32 input)
-{
- u8 *ptr = (u8 *)&input;
-
- return ((ptr[3] << 24) | (ptr[2] << 16) | (ptr[1] << 8) | ptr[0]);
-}
-
/*! \fn static void md5_transform(u32 *hash, u32 const *in)
* \ingroup IFX_MD5_FUNCTIONS
* \brief main interface to md5 hardware
@@ -107,16 +95,18 @@ static void md5_transform(struct md5_ctx *mctx, u32 *hash, u32 const *in)
CRTCL_SECT_HASH_START;
+ MD5_HASH_INIT;
+
if (mctx->started) {
- hashs->D1R = endian_swap(*((u32 *) hash + 0));
- hashs->D2R = endian_swap(*((u32 *) hash + 1));
- hashs->D3R = endian_swap(*((u32 *) hash + 2));
- hashs->D4R = endian_swap(*((u32 *) hash + 3));
+ hashs->D1R = *((u32 *) hash + 0);
+ hashs->D2R = *((u32 *) hash + 1);
+ hashs->D3R = *((u32 *) hash + 2);
+ hashs->D4R = *((u32 *) hash + 3);
}
for (i = 0; i < 16; i++) {
- hashs->MR = endian_swap(in[i]);
-// printk("in[%d]: %08x\n", i, endian_swap(in[i]));
+ hashs->MR = in[i];
+// printk("in[%d]: %08x\n", i, in[i]);
};
//wait for processing
@@ -124,10 +114,10 @@ static void md5_transform(struct md5_ctx *mctx, u32 *hash, u32 const *in)
// this will not take long
}
- *((u32 *) hash + 0) = endian_swap (hashs->D1R);
- *((u32 *) hash + 1) = endian_swap (hashs->D2R);
- *((u32 *) hash + 2) = endian_swap (hashs->D3R);
- *((u32 *) hash + 3) = endian_swap (hashs->D4R);
+ *((u32 *) hash + 0) = hashs->D1R;
+ *((u32 *) hash + 1) = hashs->D2R;
+ *((u32 *) hash + 2) = hashs->D3R;
+ *((u32 *) hash + 3) = hashs->D4R;
mctx->started = 1;
@@ -155,11 +145,6 @@ static int md5_init(struct shash_desc *desc)
struct md5_ctx *mctx = shash_desc_ctx(desc);
volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START;
- hash->controlr.ENDI = 0;
- hash->controlr.SM = 1;
- hash->controlr.ALGO = 1; // 1 = md5 0 = sha1
- hash->controlr.INIT = 1; // Initialize the hash operation by writing a '1' to the INIT bit.
-
mctx->byte_count = 0;
mctx->started = 0;
return 0;
@@ -227,24 +212,12 @@ static int md5_final(struct shash_desc *desc, u8 *out)
}
memset(p, 0, padding);
- mctx->block[14] = endian_swap(mctx->byte_count << 3);
- mctx->block[15] = endian_swap(mctx->byte_count >> 29);
-
-#if 0
- le32_to_cpu_array(mctx->block, (sizeof(mctx->block) -
- sizeof(u64)) / sizeof(u32));
-#endif
+ mctx->block[14] = le32_to_cpu(mctx->byte_count << 3);
+ mctx->block[15] = le32_to_cpu(mctx->byte_count >> 29);
md5_transform(mctx, mctx->hash, mctx->block);
- CRTCL_SECT_HASH_START;
-
- *((u32 *) out + 0) = endian_swap (hashs->D1R);
- *((u32 *) out + 1) = endian_swap (hashs->D2R);
- *((u32 *) out + 2) = endian_swap (hashs->D3R);
- *((u32 *) out + 3) = endian_swap (hashs->D4R);
-
- CRTCL_SECT_HASH_END;
+ memcpy(out, mctx->hash, MD5_DIGEST_SIZE);
// Wipe context
memset(mctx, 0, sizeof(*mctx));